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Simple Makefile to be integrated as a sub repo for each module in the system_verilog_hardware_lib project (https://gitlab.bsc.es/jmendoza/system_verilog_hardware_lib).

Clone of https://rodinia.cs.virginia.edu with modifications to run on mn5

Object detection, tracking and semantics.

RISC-V Open Source Supervisor Binary Interface

BLAS-like Library Instantiation Software Framework