From aa091847384b92eb278f442d79f7afbc7baeeb9f Mon Sep 17 00:00:00 2001 From: Marc Date: Mon, 12 Apr 2021 11:16:07 +0200 Subject: [PATCH] removed original --- grlib-original/Makefile | 2 - grlib-original/bin/Makefile | 1973 - grlib-original/bin/Makefile.config | 143 - grlib-original/bin/ahbrom.c | 177 - .../bin/aldec/riviera_ws_map_xilinx_libs.do | 39 - grlib-original/bin/altera/altera_mf.vhd | 77 - grlib-original/bin/atc_run_multi.tcl | 1 - grlib-original/bin/cds.lib | 1 - grlib-original/bin/def.npl | 2 - grlib-original/bin/echo.bat | 1 - grlib-original/bin/editise.txt | 31 - grlib-original/bin/ex_cmds.tcl | 146 - grlib-original/bin/gpl.sed | 19 - grlib-original/bin/gr.sed | 8 - grlib-original/bin/head.xise | 15 - grlib-original/bin/libs.txt | 0 grlib-original/bin/modelsim.ini | 358 - grlib-original/bin/mt1.mpf | 14 - grlib-original/bin/padsrec.tcl | 81 - grlib-original/bin/pre-sim-run.tcl | 128 - grlib-original/bin/quartus.qpf | 7 - grlib-original/bin/quartus.qsf_head | 9 - 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.../lib/gaisler/leon5v0/cpucore5.vhd | 619 - .../lib/gaisler/leon5v0/dbgmod5.vhd | 2472 - .../lib/gaisler/leon5v0/inst_text.vhd | 341 - grlib-original/lib/gaisler/leon5v0/irqmp5.vhd | 510 - .../lib/gaisler/leon5v0/itbufmem5.vhd | 76 - grlib-original/lib/gaisler/leon5v0/iu5.vhd | 13074 - .../lib/gaisler/leon5v0/leon5int.vhd | 1178 - .../lib/gaisler/leon5v0/leon5sys.vhd | 596 - .../lib/gaisler/leon5v0/nanofpu.vhd | 1844 - .../lib/gaisler/leon5v0/perf_leon5.vhd | 194 - .../lib/gaisler/leon5v0/regfile5_dff.vhd | 219 - .../lib/gaisler/leon5v0/regfile5_ram.vhd | 692 - .../lib/gaisler/leon5v0/tbufmem5.vhd | 92 - .../lib/gaisler/leon5v0/vhdlsyn.txt | 16 - grlib-original/lib/gaisler/memctrl/ftmctrl.in | 60 - .../lib/gaisler/memctrl/ftmctrl.in.h | 122 - .../lib/gaisler/memctrl/ftmctrl.in.help | 296 - .../lib/gaisler/memctrl/ftmctrl.in.vhd | 15 - .../lib/gaisler/memctrl/ftsdctrl.in | 14 - .../lib/gaisler/memctrl/ftsdctrl.in.h | 24 - .../lib/gaisler/memctrl/ftsdctrl.in.help | 29 - .../lib/gaisler/memctrl/ftsdctrl.in.vhd | 6 - .../lib/gaisler/memctrl/ftsrctrl.in | 92 - .../lib/gaisler/memctrl/ftsrctrl.in.h | 183 - .../lib/gaisler/memctrl/ftsrctrl.in.help | 343 - .../lib/gaisler/memctrl/ftsrctrl.in.vhd | 16 - .../lib/gaisler/memctrl/memctrl.vhd | 598 - grlib-original/lib/gaisler/memctrl/sdctrl.in | 13 - .../lib/gaisler/memctrl/sdctrl.in.h | 24 - .../lib/gaisler/memctrl/sdctrl.in.help | 29 - .../lib/gaisler/memctrl/sdctrl.in.vhd | 6 - grlib-original/lib/gaisler/memctrl/sdctrl.vhd | 837 - .../lib/gaisler/memctrl/sdctrl64.vhd | 819 - .../lib/gaisler/memctrl/sdmctrl.vhd | 816 - grlib-original/lib/gaisler/memctrl/srctrl.in | 34 - .../lib/gaisler/memctrl/srctrl.in.h | 75 - .../lib/gaisler/memctrl/srctrl.in.help | 42 - .../lib/gaisler/memctrl/srctrl.in.vhd | 12 - grlib-original/lib/gaisler/memctrl/srctrl.vhd | 459 - grlib-original/lib/gaisler/memctrl/ssrctrl.in | 8 - .../lib/gaisler/memctrl/ssrctrl.in.h | 8 - .../lib/gaisler/memctrl/ssrctrl.in.help | 9 - .../lib/gaisler/memctrl/ssrctrl.in.vhd | 4 - .../lib/gaisler/memctrl/vhdlsyn.txt | 14 - .../lib/gaisler/misc/ahb_mst_iface.vhd | 202 - grlib-original/lib/gaisler/misc/ahbdma.vhd | 187 - grlib-original/lib/gaisler/misc/ahbdpram.vhd | 170 - grlib-original/lib/gaisler/misc/ahbmmux.vhd | 90 - grlib-original/lib/gaisler/misc/ahbram.in | 20 - grlib-original/lib/gaisler/misc/ahbram.in.h | 42 - .../lib/gaisler/misc/ahbram.in.help | 26 - grlib-original/lib/gaisler/misc/ahbram.in.vhd | 6 - grlib-original/lib/gaisler/misc/ahbram.vhd | 292 - grlib-original/lib/gaisler/misc/ahbrom.in | 6 - grlib-original/lib/gaisler/misc/ahbrom.in.h | 18 - .../lib/gaisler/misc/ahbrom.in.help | 25 - grlib-original/lib/gaisler/misc/ahbrom.in.vhd | 7 - grlib-original/lib/gaisler/misc/ahbsmux.vhd | 290 - grlib-original/lib/gaisler/misc/ahbstat.in | 4 - grlib-original/lib/gaisler/misc/ahbstat.in.h | 8 - .../lib/gaisler/misc/ahbstat.in.help | 11 - .../lib/gaisler/misc/ahbstat.in.vhd | 4 - grlib-original/lib/gaisler/misc/ahbstat.vhd | 208 - grlib-original/lib/gaisler/misc/ahbtrace.vhd | 94 - .../lib/gaisler/misc/ahbtrace_mb.vhd | 104 - .../lib/gaisler/misc/ahbtrace_mmb.vhd | 694 - grlib-original/lib/gaisler/misc/apb3cdc.vhd | 149 - grlib-original/lib/gaisler/misc/apbps2.vhd | 342 - grlib-original/lib/gaisler/misc/apbvga.vhd | 348 - grlib-original/lib/gaisler/misc/charrom.vhd | 2559 - .../lib/gaisler/misc/charrom_package.vhd | 48 - grlib-original/lib/gaisler/misc/ftahbram.in | 26 - grlib-original/lib/gaisler/misc/ftahbram.in.h | 65 - .../lib/gaisler/misc/ftahbram.in.help | 27 - .../lib/gaisler/misc/ftahbram.in.vhd | 10 - grlib-original/lib/gaisler/misc/gptimer.in | 12 - grlib-original/lib/gaisler/misc/gptimer.in.h | 55 - .../lib/gaisler/misc/gptimer.in.help | 36 - .../lib/gaisler/misc/gptimer.in.vhd | 10 - grlib-original/lib/gaisler/misc/gptimer.vhd | 591 - grlib-original/lib/gaisler/misc/gracectrl.in | 2 - .../lib/gaisler/misc/gracectrl.in.h | 4 - .../lib/gaisler/misc/gracectrl.in.help | 3 - .../lib/gaisler/misc/gracectrl.in.vhd | 3 - grlib-original/lib/gaisler/misc/gracectrl.vhd | 419 - grlib-original/lib/gaisler/misc/grgpio.in | 7 - grlib-original/lib/gaisler/misc/grgpio.in.h | 10 - .../lib/gaisler/misc/grgpio.in.help | 16 - grlib-original/lib/gaisler/misc/grgpio.in.vhd | 5 - grlib-original/lib/gaisler/misc/grgpio.vhd | 475 - grlib-original/lib/gaisler/misc/grgpio2.in | 7 - grlib-original/lib/gaisler/misc/grgpio2.in.h | 10 - .../lib/gaisler/misc/grgpio2.in.help | 16 - .../lib/gaisler/misc/grgpio2.in.vhd | 5 - grlib-original/lib/gaisler/misc/grgprbank.vhd | 156 - grlib-original/lib/gaisler/misc/grgpreg.vhd | 158 - grlib-original/lib/gaisler/misc/grsysmon.in | 2 - grlib-original/lib/gaisler/misc/grsysmon.in.h | 4 - .../lib/gaisler/misc/grsysmon.in.help | 3 - .../lib/gaisler/misc/grsysmon.in.vhd | 3 - grlib-original/lib/gaisler/misc/grsysmon.vhd | 475 - grlib-original/lib/gaisler/misc/grtachom.vhd | 359 - grlib-original/lib/gaisler/misc/grversion.in | 8 - .../lib/gaisler/misc/grversion.in.h | 10 - .../lib/gaisler/misc/grversion.in.help | 12 - .../lib/gaisler/misc/grversion.in.vhd | 5 - grlib-original/lib/gaisler/misc/grversion.vhd | 130 - grlib-original/lib/gaisler/misc/logan.vhd | 495 - grlib-original/lib/gaisler/misc/misc.vhd | 1810 - grlib-original/lib/gaisler/misc/ps2.in | 3 - grlib-original/lib/gaisler/misc/ps2.in.h | 4 - grlib-original/lib/gaisler/misc/ps2.in.help | 4 - grlib-original/lib/gaisler/misc/ps2.in.vhd | 3 - grlib-original/lib/gaisler/misc/ps2vga.in | 6 - grlib-original/lib/gaisler/misc/ps2vga.in.h | 10 - .../lib/gaisler/misc/ps2vga.in.help | 16 - grlib-original/lib/gaisler/misc/ps2vga.in.vhd | 5 - grlib-original/lib/gaisler/misc/rstgen.vhd | 133 - grlib-original/lib/gaisler/misc/svgactrl.in | 2 - grlib-original/lib/gaisler/misc/svgactrl.in.h | 4 - .../lib/gaisler/misc/svgactrl.in.help | 6 - .../lib/gaisler/misc/svgactrl.in.vhd | 3 - grlib-original/lib/gaisler/misc/svgactrl.vhd | 748 - grlib-original/lib/gaisler/misc/vhdlsyn.txt | 61 - grlib-original/lib/gaisler/net/edcl.in | 21 - grlib-original/lib/gaisler/net/edcl.in.h | 44 - grlib-original/lib/gaisler/net/edcl.in.help | 34 - grlib-original/lib/gaisler/net/edcl.in.vhd | 8 - grlib-original/lib/gaisler/net/net.vhd | 838 - grlib-original/lib/gaisler/net/vhdlsyn.txt | 4 - .../lib/gaisler/noelv/clint/clint.vhd | 270 - .../lib/gaisler/noelv/clint/clint_ahb.vhd | 368 - .../lib/gaisler/noelv/clint/riscv.vhd | 80 - .../lib/gaisler/noelv/clint/vhdlsyn.txt | 3 - .../lib/gaisler/noelv/core/bhtnv.vhd | 356 - .../lib/gaisler/noelv/core/btbnv.vhd | 320 - .../lib/gaisler/noelv/core/cachememnv.vhd | 423 - .../lib/gaisler/noelv/core/cctrlnv.vhd | 5079 - .../lib/gaisler/noelv/core/cpucorenv.vhd | 794 - .../lib/gaisler/noelv/core/div64.vhd | 381 - .../lib/gaisler/noelv/core/fakefpunv.vhd | 1102 - .../lib/gaisler/noelv/core/iunv.vhd | 12484 - .../lib/gaisler/noelv/core/mmuconfig.vhd | 1149 - .../lib/gaisler/noelv/core/mul64.vhd | 188 - .../lib/gaisler/noelv/core/nanofpunv.vhd | 2785 - .../lib/gaisler/noelv/core/noelvint.vhd | 2447 - grlib-original/lib/gaisler/noelv/core/pmp.vhd | 304 - .../lib/gaisler/noelv/core/progbuf.vhd | 96 - .../lib/gaisler/noelv/core/rasnv.vhd | 153 - .../lib/gaisler/noelv/core/regfile64dffnv.vhd | 207 - .../gaisler/noelv/core/regfile64sramnv.vhd | 272 - .../lib/gaisler/noelv/core/rvdm.vhd | 110 - .../lib/gaisler/noelv/core/rvdmx.vhd | 1116 - .../lib/gaisler/noelv/core/tbufmemnv.vhd | 108 - .../lib/gaisler/noelv/core/utilnv.vhd | 794 - grlib-original/lib/gaisler/noelv/noelv.in | 53 - grlib-original/lib/gaisler/noelv/noelv.in.h | 24 - .../lib/gaisler/noelv/noelv.in.help | 20 - grlib-original/lib/gaisler/noelv/noelv.in.vhd | 8 - .../lib/gaisler/noelv/noelv32/vhdlsyn.txt | 28 - .../lib/gaisler/noelv/pkg/noelv.vhd | 444 - .../lib/gaisler/noelv/pkg/noelv_cfg.vhd | 33 - .../lib/gaisler/noelv/pkg/noelv_cfg_32.vhd | 33 - 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.../gaisler/pci/grpci2/grpci2_phy_wrapper.vhd | 313 - .../lib/gaisler/pci/grpci2/pcilib2.vhd | 367 - .../gaisler/pci/grpci2/wrapper/grpci2_gen.vhd | 498 - grlib-original/lib/gaisler/pci/pci.vhd | 583 - grlib-original/lib/gaisler/pci/pcipads.vhd | 277 - .../lib/gaisler/pci/pcitrace/pcitrace.in | 11 - .../lib/gaisler/pci/pcitrace/pcitrace.in.h | 17 - .../lib/gaisler/pci/pcitrace/pcitrace.in.help | 14 - .../lib/gaisler/pci/pcitrace/pcitrace.in.vhd | 4 - .../lib/gaisler/pci/ptf/pt_pci_arb.vhd | 123 - .../lib/gaisler/pci/ptf/pt_pci_master.vhd | 525 - .../lib/gaisler/pci/ptf/pt_pci_monitor.vhd | 453 - .../lib/gaisler/pci/ptf/pt_pci_target.vhd | 733 - grlib-original/lib/gaisler/pci/ptf/pt_pkg.vhd | 842 - grlib-original/lib/gaisler/pci/vhdlsim.txt | 5 - grlib-original/lib/gaisler/pci/vhdlsyn.txt | 22 - grlib-original/lib/gaisler/pcie/pcie.in | 35 - grlib-original/lib/gaisler/pcie/pcie.in.h | 42 - grlib-original/lib/gaisler/pcie/pcie.in.help | 31 - grlib-original/lib/gaisler/pcie/pcie.in.vhd | 8 - grlib-original/lib/gaisler/pcie/pcie.vhd | 271 - grlib-original/lib/gaisler/pcie/vhdlsyn.txt | 4 - grlib-original/lib/gaisler/plic/grplic.vhd | 409 - .../lib/gaisler/plic/grplic_ahb.vhd | 521 - grlib-original/lib/gaisler/plic/plic.vhd | 132 - .../lib/gaisler/plic/plic_encoder.vhd | 171 - .../lib/gaisler/plic/plic_gateway.vhd | 187 - .../lib/gaisler/plic/plic_target.vhd | 83 - grlib-original/lib/gaisler/plic/vhdlsyn.txt | 6 - grlib-original/lib/gaisler/sim/ahbram_sim.vhd | 392 - grlib-original/lib/gaisler/sim/ahbrep.vhd | 156 - grlib-original/lib/gaisler/sim/aximem.vhd | 229 - grlib-original/lib/gaisler/sim/axirep.vhd | 191 - grlib-original/lib/gaisler/sim/axixmem.vhd | 390 - grlib-original/lib/gaisler/sim/ddr2ram.vhd | 714 - grlib-original/lib/gaisler/sim/ddr3ram.vhd | 810 - grlib-original/lib/gaisler/sim/ddrram.vhd | 520 - grlib-original/lib/gaisler/sim/delay_wire.vhd | 85 - grlib-original/lib/gaisler/sim/phy.vhd | 772 - grlib-original/lib/gaisler/sim/pwm_check.vhd | 729 - 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.../lib/gaisler/spi/spimctrl.in.help | 37 - .../lib/gaisler/spi/spimctrl.in.vhd | 11 - grlib-original/lib/gaisler/spi/spimctrl.vhd | 775 - grlib-original/lib/gaisler/spi/vhdlsim.txt | 1 - grlib-original/lib/gaisler/spi/vhdlsyn.txt | 7 - grlib-original/lib/gaisler/srmmu/libmmu.vhd | 260 - grlib-original/lib/gaisler/srmmu/mmu.vhd | 682 - .../lib/gaisler/srmmu/mmuconfig.vhd | 500 - grlib-original/lib/gaisler/srmmu/mmuiface.vhd | 286 - grlib-original/lib/gaisler/srmmu/mmulru.vhd | 192 - grlib-original/lib/gaisler/srmmu/mmulrue.vhd | 131 - grlib-original/lib/gaisler/srmmu/mmutlb.vhd | 716 - .../lib/gaisler/srmmu/mmutlbcam.vhd | 243 - grlib-original/lib/gaisler/srmmu/mmutw.vhd | 322 - grlib-original/lib/gaisler/srmmu/vhdlsyn.txt | 9 - .../lib/gaisler/subsys/leon_dsu_stat_base.in | 421 - .../gaisler/subsys/leon_dsu_stat_base.in.h | 522 - .../gaisler/subsys/leon_dsu_stat_base.in.help | 557 - .../gaisler/subsys/leon_dsu_stat_base.in.vhd | 57 - .../lib/gaisler/subsys/leon_dsu_stat_base.vhd | 527 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grlib-original/lib/gaisler/uart/uart2.in.vhd | 4 - grlib-original/lib/gaisler/uart/vhdlsyn.txt | 6 - grlib-original/lib/gaisler/usb/grusb.vhd | 498 - grlib-original/lib/gaisler/usb/grusb_dcl.in | 7 - grlib-original/lib/gaisler/usb/grusb_dcl.in.h | 14 - .../lib/gaisler/usb/grusb_dcl.in.help | 7 - .../lib/gaisler/usb/grusb_dcl.in.vhd | 5 - grlib-original/lib/gaisler/usb/grusbdc.in | 42 - grlib-original/lib/gaisler/usb/grusbdc.in.h | 123 - .../lib/gaisler/usb/grusbdc.in.help | 155 - grlib-original/lib/gaisler/usb/grusbdc.in.vhd | 40 - grlib-original/lib/gaisler/usb/grusbhc.in | 59 - grlib-original/lib/gaisler/usb/grusbhc.in.h | 155 - .../lib/gaisler/usb/grusbhc.in.help | 159 - grlib-original/lib/gaisler/usb/grusbhc.in.vhd | 18 - grlib-original/lib/gaisler/usb/vhdlsyn.txt | 40 - grlib-original/lib/grlib/amba/ahbctrl.vhd | 1067 - .../lib/grlib/amba/ahblitm2ahbm.vhd | 293 - grlib-original/lib/grlib/amba/ahbmst.vhd | 182 - grlib-original/lib/grlib/amba/amba.in | 17 - grlib-original/lib/grlib/amba/amba.in.h | 36 - grlib-original/lib/grlib/amba/amba.in.help | 53 - grlib-original/lib/grlib/amba/amba.in.vhd | 12 - grlib-original/lib/grlib/amba/amba.vhd | 1859 - grlib-original/lib/grlib/amba/amba_tp.vhd | 1686 - grlib-original/lib/grlib/amba/apbctrl.vhd | 102 - grlib-original/lib/grlib/amba/apbctrldp.vhd | 106 - grlib-original/lib/grlib/amba/apbctrlsp.vhd | 103 - grlib-original/lib/grlib/amba/apbctrlx.vhd | 478 - grlib-original/lib/grlib/amba/defmst.vhd | 57 - grlib-original/lib/grlib/amba/devices.vhd | 1318 - grlib-original/lib/grlib/amba/dma2ahb.vhd | 531 - grlib-original/lib/grlib/amba/dma2ahb_pkg.vhd | 130 - grlib-original/lib/grlib/amba/dma2ahb_tp.vhd | 1611 - grlib-original/lib/grlib/amba/vhdlsim.txt | 6 - grlib-original/lib/grlib/amba/vhdlsyn.txt | 15 - grlib-original/lib/grlib/dftlib/dftlib.vhd | 69 - .../lib/grlib/dftlib/synciotest.vhd | 243 - grlib-original/lib/grlib/dftlib/trstmux.vhd | 48 - grlib-original/lib/grlib/dftlib/vhdlsyn.txt | 3 - grlib-original/lib/grlib/dirs.txt | 10 - .../lib/grlib/generic_bm/ahb_be.vhd | 394 - .../lib/grlib/generic_bm/axi4_be.vhd | 608 - .../lib/grlib/generic_bm/bm_fre.vhd | 545 - .../lib/grlib/generic_bm/bm_me_rc.vhd | 528 - .../lib/grlib/generic_bm/bm_me_wc.vhd | 408 - .../lib/grlib/generic_bm/bmahbmst.vhd | 286 - .../lib/grlib/generic_bm/fifo_control_rc.vhd | 265 - .../lib/grlib/generic_bm/fifo_control_wc.vhd | 198 - .../lib/grlib/generic_bm/generic_bm_ahb.vhd | 375 - .../lib/grlib/generic_bm/generic_bm_axi.vhd | 453 - .../lib/grlib/generic_bm/generic_bm_pkg.vhd | 1160 - .../lib/grlib/generic_bm/vhdlsyn.txt | 12 - grlib-original/lib/grlib/modgen/leaves.vhd | 24230 - grlib-original/lib/grlib/modgen/multlib.vhd | 63 - grlib-original/lib/grlib/modgen/vhdlsyn.txt | 2 - grlib-original/lib/grlib/riscv/cpu_disas.vhd | 182 - grlib-original/lib/grlib/riscv/riscv.vhd | 738 - .../lib/grlib/riscv/riscv_disas.vhd | 1509 - grlib-original/lib/grlib/riscv/vhdlsim.txt | 2 - grlib-original/lib/grlib/riscv/vhdlsyn.txt | 1 - grlib-original/lib/grlib/sparc/cpu_disas.vhd | 137 - grlib-original/lib/grlib/sparc/sparc.vhd | 275 - .../lib/grlib/sparc/sparc_disas.vhd | 742 - grlib-original/lib/grlib/sparc/vhdlsim.txt | 2 - grlib-original/lib/grlib/sparc/vhdlsyn.txt | 1 - grlib-original/lib/grlib/stdlib/config.vhd | 78 - .../lib/grlib/stdlib/config_types.vhd | 73 - grlib-original/lib/grlib/stdlib/stdio.vhd | 285 - grlib-original/lib/grlib/stdlib/stdio_tb.vhd | 156 - grlib-original/lib/grlib/stdlib/stdlib.vhd | 810 - grlib-original/lib/grlib/stdlib/testlib.vhd | 822 - grlib-original/lib/grlib/stdlib/version.vhd | 5 - grlib-original/lib/grlib/stdlib/vhdlsim.txt | 2 - grlib-original/lib/grlib/stdlib/vhdlsyn.txt | 4 - grlib-original/lib/grlib/util/debug.in | 3 - grlib-original/lib/grlib/util/debug.in.h | 4 - grlib-original/lib/grlib/util/debug.in.help | 16 - grlib-original/lib/grlib/util/debug.in.vhd | 3 - grlib-original/lib/grlib/util/fpudummy.vhd | 33 - grlib-original/lib/grlib/util/util.vhd | 77 - grlib-original/lib/grlib/util/vhdlsim.txt | 1 - grlib-original/lib/gsi/dirs.txt | 1 - grlib-original/lib/gsi/ssram/core_burst.vhd | 525 - grlib-original/lib/gsi/ssram/functions.vhd | 3201 - grlib-original/lib/gsi/ssram/g880e18bt.vhd | 141 - grlib-original/lib/gsi/ssram/vhdlsim.txt | 3 - grlib-original/lib/libs.txt | 22 - grlib-original/lib/micron/dirs.txt | 2 - grlib-original/lib/micron/libs.txt | 1 - .../lib/micron/sdram/components.vhd | 367 - grlib-original/lib/micron/sdram/mobile_sdr.v | 2131 - .../lib/micron/sdram/mt48lc16m16a2.vhd | 1532 - grlib-original/lib/micron/sdram/vhdlsim.txt | 3 - grlib-original/lib/micron/sdram/vlogsim.txt | 2 - grlib-original/lib/opencores/can/can_top.vhd | 7207 - grlib-original/lib/opencores/can/cancomp.vhd | 95 - grlib-original/lib/opencores/can/vhdlsyn.txt | 4 - grlib-original/lib/opencores/dirs.txt | 3 - .../lib/opencores/ge_1000baseX/clean_rst.v | 63 - .../opencores/ge_1000baseX/decoder_8b10b.v | 362 - .../opencores/ge_1000baseX/encoder_8b10b.v | 267 - .../lib/opencores/ge_1000baseX/ge_1000baseX.v | 739 - .../opencores/ge_1000baseX/ge_1000baseX_an.v | 504 - .../ge_1000baseX/ge_1000baseX_comp.vhd | 63 - .../ge_1000baseX/ge_1000baseX_constants.v | 124 - .../ge_1000baseX/ge_1000baseX_mdio.v | 322 - .../ge_1000baseX/ge_1000baseX_regs.v | 63 - .../opencores/ge_1000baseX/ge_1000baseX_rx.v | 929 - .../ge_1000baseX/ge_1000baseX_sync.v | 403 - .../ge_1000baseX/ge_1000baseX_test.v | 246 - .../opencores/ge_1000baseX/ge_1000baseX_tx.v | 699 - .../lib/opencores/ge_1000baseX/svlogsyn.txt | 6 - .../lib/opencores/ge_1000baseX/timescale.v | 47 - .../lib/opencores/ge_1000baseX/vhdlsyn.txt | 1 - .../lib/opencores/ge_1000baseX/vlogsyn.txt | 7 - .../lib/opencores/i2c/i2c_master_bit_ctrl.vhd | 731 - .../opencores/i2c/i2c_master_byte_ctrl.vhd | 388 - grlib-original/lib/opencores/i2c/i2coc.vhd | 71 - grlib-original/lib/opencores/i2c/vhdlsyn.txt | 3 - grlib-original/lib/spansion/dirs.txt | 1 - grlib-original/lib/spansion/flash/vhdlsim.txt | 1 - grlib-original/lib/spw/comp/spwcomp.vhd | 815 - grlib-original/lib/spw/comp/vhdlsyn.txt | 1 - grlib-original/lib/spw/dirs.txt | 3 - grlib-original/lib/spw/wrapper/grspw2_gen.vhd | 406 - .../lib/spw/wrapper/grspw_codec_gen.vhd | 243 - grlib-original/lib/spw/wrapper/grspw_gen.vhd | 317 - grlib-original/lib/spw/wrapper/vhdlsyn.txt | 3 - grlib-original/lib/tech/altera/dirs.txt | 1 - .../lib/tech/altera/simprims/vhdlsim.txt | 2 - grlib-original/lib/tech/altera_mf/dirs.txt | 1 - .../lib/tech/altera_mf/simprims/vhdlsim.txt | 2 - .../atc18/components/atmel_components.vhd | 112 - .../tech/atc18/components/atmel_simprims.vhd | 252 - .../lib/tech/atc18/components/vhdlsim.txt | 3 - grlib-original/lib/tech/atc18/dirs.txt | 1 - grlib-original/lib/tech/cycloneiii/dirs.txt | 1 - .../lib/tech/cycloneiii/simprims/vhdlsim.txt | 2 - grlib-original/lib/tech/dware/dirs.txt | 1 - .../dware/simprims/DW_Foundation_arith.vhd | 5 - .../dware/simprims/DW_Foundation_comp.vhd | 37 - .../simprims/DW_Foundation_comp_arith.vhd | 47 - .../lib/tech/dware/simprims/DWpackages.vhd | 160 - .../lib/tech/dware/simprims/vhdlsim.txt | 4 - grlib-original/lib/tech/ec/dirs.txt | 1 - grlib-original/lib/tech/ec/orca/ORCA_L.vhd | 3742 - grlib-original/lib/tech/ec/orca/global.vhd | 16 - grlib-original/lib/tech/ec/orca/mem3.vhd | 235 - grlib-original/lib/tech/ec/orca/orca.vhd | 27536 - .../lib/tech/ec/orca/orca_ecmem.vhd | 1350 - grlib-original/lib/tech/ec/orca/orcacomp.vhd | 2573 - grlib-original/lib/tech/ec/orca/vhdlsim.txt | 4 - grlib-original/lib/tech/eclipsee/dirs.txt | 1 - .../lib/tech/eclipsee/simprims/eclipse.vhd | 134 - .../lib/tech/eclipsee/simprims/vhdlsim.txt | 1 - grlib-original/lib/tech/gtech/dirs.txt | 1 - .../lib/tech/gtech/simprims/vhdlsim.txt | 179 - .../lib/tech/saed32/components/vlogsim.txt | 4 - grlib-original/lib/tech/saed32/dirs.txt | 1 - grlib-original/lib/tech/secureip/dirs.txt | 1 - .../lib/tech/secureip/ise/vlogsim.txt | 61 - grlib-original/lib/tech/secureip_ver/dirs.txt | 2 - .../lib/tech/secureip_ver/ise/vlogsim.txt | 61 - grlib-original/lib/tech/simprim/dirs.txt | 1 - .../tech/simprim/vcomponents/vcomponents.vhd | 3 - .../lib/tech/simprim/vcomponents/vhdlsim.txt | 1 - .../tech/snps/dw02/comp/DW02_components.vhd | 70 - .../lib/tech/snps/dw02/comp/vhdlsyn.txt | 1 - grlib-original/lib/tech/snps/dw02/dirs.txt | 1 - grlib-original/lib/tech/stratixii/dirs.txt | 1 - .../lib/tech/stratixii/simprims/vhdlsim.txt | 2 - grlib-original/lib/tech/stratixiii/dirs.txt | 1 - .../lib/tech/stratixiii/simprims/vhdlsim.txt | 2 - .../tech/umc18/components/umc_components.vhd | 242 - .../tech/umc18/components/umc_simprims.vhd | 643 - .../lib/tech/umc18/components/vhdlsim.txt | 3 - grlib-original/lib/tech/umc18/dirs.txt | 1 - grlib-original/lib/tech/unimacro/dirs.txt | 1 - .../lib/tech/unimacro/ise/vhdlsyn.txt | 1 - grlib-original/lib/tech/unisim/dirs.txt | 1 - .../lib/tech/unisim/ise/unisim_VCOMP.vhd | 31964 - .../lib/tech/unisim/ise/unisim_VITAL.vhd | 284924 - .../lib/tech/unisim/ise/unisim_VPKG.vhd | 1462 - .../lib/tech/unisim/ise/vhdlsim.txt | 18 - grlib-original/lib/tech/unisims_ver/dirs.txt | 2 - grlib-original/lib/tech/virage/dirs.txt | 2 - .../lib/tech/virage/simprims/vhdlsim.txt | 1 - .../tech/virage/simprims/virage_simprims.vhd | 589 - .../lib/tech/virage/vcomponents/vhdlsim.txt | 1 - .../virage/vcomponents/virage_vcomponents.vhd | 192 - .../lib/tech/xilinxcorelib_ver/dirs.txt | 2 - .../lib/techmap/alltech/allclkgen.vhd | 888 - grlib-original/lib/techmap/alltech/allddr.vhd | 1207 - grlib-original/lib/techmap/alltech/allmem.vhd | 2116 - grlib-original/lib/techmap/alltech/allmul.vhd | 75 - .../lib/techmap/alltech/allpads.vhd | 1030 - grlib-original/lib/techmap/alltech/alltap.vhd | 461 - .../lib/techmap/alltech/vhdlsyn.txt | 6 - .../techmap/altera_mf/clkgen_altera_mf.vhd | 235 - .../techmap/altera_mf/memory_altera_mf.vhd | 605 - .../lib/techmap/altera_mf/tap_altera_mf.vhd | 142 - .../lib/techmap/altera_mf/vhdlsim.txt | 4 - .../lib/techmap/altera_mf/vhdlsyn.txt | 3 - .../lib/techmap/atc18/pads_atc18.vhd | 279 - grlib-original/lib/techmap/atc18/vhdlsyn.txt | 2 - grlib-original/lib/techmap/clocks/clkgen.in | 46 - grlib-original/lib/techmap/clocks/clkgen.in.h | 70 - .../lib/techmap/clocks/clkgen.in.help | 101 - .../lib/techmap/clocks/clkgen.in.vhd | 11 - .../lib/techmap/cycloneiii/alt/aclkout.vhd | 136 - .../lib/techmap/cycloneiii/alt/actrlout.vhd | 74 - .../lib/techmap/cycloneiii/alt/admout.vhd | 106 - .../lib/techmap/cycloneiii/alt/adqin.vhd | 116 - .../lib/techmap/cycloneiii/alt/adqout.vhd | 202 - .../lib/techmap/cycloneiii/alt/adqsin.vhd | 56 - .../lib/techmap/cycloneiii/alt/adqsout.vhd | 157 - .../lib/techmap/cycloneiii/alt/apll.vhd | 305 - .../techmap/cycloneiii/cycloneiii_clkgen.vhd | 252 - .../techmap/cycloneiii/cycloneiii_ddr_phy.vhd | 608 - .../techmap/cycloneiii/ddr_phy_cycloneiii.vhd | 463 - .../lib/techmap/cycloneiii/vhdlsim.txt | 4 - .../lib/techmap/cycloneiii/vhdlsyn.txt | 14 - grlib-original/lib/techmap/dirs.txt | 5 - .../lib/techmap/dware/mul_dware.vhd | 121 - grlib-original/lib/techmap/dware/vhdlsyn.txt | 1 - grlib-original/lib/techmap/ec/ddr_ec.vhd | 64 - grlib-original/lib/techmap/ec/memory_ec.vhd | 1532 - grlib-original/lib/techmap/ec/vhdlsyn.txt | 2 - .../lib/techmap/eclipsee/memory_eclipse.vhd | 126 - .../lib/techmap/eclipsee/vhdlsyn.txt | 1 - grlib-original/lib/techmap/gencomp/clkgen.in | 28 - .../lib/techmap/gencomp/clkgen.in.h | 44 - .../lib/techmap/gencomp/clkgen.in.help | 73 - .../lib/techmap/gencomp/clkgen.in.vhd | 8 - .../lib/techmap/gencomp/gencomp.vhd | 2373 - .../lib/techmap/gencomp/netcomp.vhd | 1657 - grlib-original/lib/techmap/gencomp/tech.in | 83 - grlib-original/lib/techmap/gencomp/tech.in.h | 182 - .../lib/techmap/gencomp/tech.in.help | 67 - .../lib/techmap/gencomp/tech.in.vhd | 8 - .../lib/techmap/gencomp/vhdlsyn.txt | 2 - .../lib/techmap/grdware/mul_dware.vhd | 122 - .../lib/techmap/grdware/vhdlsyn.txt | 1 - .../lib/techmap/inferred/ddr_inferred.vhd | 107 - .../lib/techmap/inferred/ddr_phy_inferred.vhd | 492 - .../lib/techmap/inferred/ddrphy_datapath.vhd | 239 - .../lib/techmap/inferred/fifo_inferred.vhd | 368 - .../techmap/inferred/lpddr2_phy_inferred.vhd | 285 - .../lib/techmap/inferred/memory_inferred.vhd | 506 - .../lib/techmap/inferred/mul_inferred.vhd | 144 - .../lib/techmap/inferred/sim_pll.vhd | 209 - .../lib/techmap/inferred/vhdlsim.txt | 2 - .../lib/techmap/inferred/vhdlsyn.txt | 8 - grlib-original/lib/techmap/maps/cdcbus.vhd | 111 - grlib-original/lib/techmap/maps/clkand.vhd | 221 - grlib-original/lib/techmap/maps/clkgen.vhd | 264 - grlib-original/lib/techmap/maps/clkinv.vhd | 67 - grlib-original/lib/techmap/maps/clkmux.vhd | 152 - grlib-original/lib/techmap/maps/clkpad.vhd | 110 - grlib-original/lib/techmap/maps/clkpad_ds.vhd | 80 - .../lib/techmap/maps/cpu_disas_net.vhd | 142 - grlib-original/lib/techmap/maps/ddr_ireg.vhd | 91 - grlib-original/lib/techmap/maps/ddr_oreg.vhd | 92 - grlib-original/lib/techmap/maps/ddrphy.vhd | 1364 - grlib-original/lib/techmap/maps/grfpw_net.vhd | 844 - grlib-original/lib/techmap/maps/grgates.vhd | 302 - .../lib/techmap/maps/grlfpw_net.vhd | 1331 - .../lib/techmap/maps/grpci2_phy_net.vhd | 835 - grlib-original/lib/techmap/maps/inpad.vhd | 142 - grlib-original/lib/techmap/maps/inpad_ddr.vhd | 123 - grlib-original/lib/techmap/maps/inpad_ds.vhd | 105 - grlib-original/lib/techmap/maps/iodpad.vhd | 150 - grlib-original/lib/techmap/maps/iopad.vhd | 216 - grlib-original/lib/techmap/maps/iopad_ddr.vhd | 143 - grlib-original/lib/techmap/maps/iopad_ds.vhd | 156 - grlib-original/lib/techmap/maps/iopad_tm.vhd | 98 - grlib-original/lib/techmap/maps/leon3_net.vhd | 1029 - grlib-original/lib/techmap/maps/leon4_net.vhd | 487 - .../lib/techmap/maps/lvds_combo.vhd | 90 - grlib-original/lib/techmap/maps/memrwcol.vhd | 183 - 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-VER=$(VNAME)2020.4 -BID=4261 -CC=gcc -SED=sed - -ASICLIBS = ihp25 sgb25vrh ut025crh virage rh_lib18t rh_lib18t_io2 rh_lib13t\ - atc18 artisan umc18 virage90 tsmc90 dare nextreme atc18rha_cell smic13 \ - tm65gplus st65lp st65gp cmos9sf nextreme2 gf65g saed32 gf22fdx -FPGALIBS = apa proasic3 axcelerator ec fusion unisim virtex virtex5 secureip unimacro altera altera_mf \ - stratixii eclipsee cycloneiii stratixiii synplify simprim stratixiv \ - proasic3e proasic3l smartfusion2 rtg4 polarfire nx - -ifeq ("$(GRLIB_CONFIG)","") -GRLIB_CONFIG = dummy -endif -ifeq ("$(GRLIB_SIMULATOR)","") -GRLIB_SIMULATOR = ModelSim -endif - - -# Select LEON3 version -# The switch between gaisler/leon3 and gaisler/leon3pkgv1v2 is handled -# by a hack in the script generation (see if (test $$l = "leon3") ..) -ifeq ("$(GRLIB_LEON3_VERSION)","") -GRLIB_LEON3_VERSION = 3 -else -ifeq ("$(GRLIB_LEON3_VERSION)","2") -DIRSKIP += leon3v3 grfpc grlfpc -DIRADD += leon3v1 leon3ftv2 grfpcv1 grlfpcv1 grfpcft grlfpcft -endif -ifeq ("$(GRLIB_LEON3_VERSION)","1") -DIRSKIP += leon3v3 grfpc grlfpc -DIRADD += leon3v1 leon3ftv1 grfpcv1 grlfpcv1 grfpcft grlfpcft -endif -endif - -# Target technology libraries and techmap -ifeq ("$(TECHLIBS)","") -TECHLIBS=$(FPGALIBS) $(ASICLIBS) -endif -# The unisim techmap in GRLIB has been divided into several parts since -# new releases of the Xilinx libs lack support for the older technologies. -# The hack below expands techlibs for technologies that previously only -# required unisim but now also require the techmap/virtex directory -ifneq (,$(findstring unisim,$(TECHLIBS))) -# Virtex2, Virtex4, Spartan3, Spartan3e and Spartan6 currently depend -# on techmap/virtex -ifneq (,$(filter Virtex2 Virtex2p Virtex4 Spartan3 Spartan-3A-DSP Spartan3E Spartan6,$(TECHNOLOGY))) -ifeq (,$(findstring virtex,$(TECHLIBS))) -TECHLIBS+=virtex -endif -endif -endif - -# Option to avoid scan of tech/, useful when tech libraries are compiled -# with separate tool: -ifeq ("$(SKIP_SIM_TECHLIBS)","") -XTECHLIBS = $(TECHLIBS:%=tech/% ) -endif -SIMLIBS = hynix micron cypress -ACTELLIBS = apa apa3 axcelerator proasic3 proasic3e proasic3l fusion smartfusion2 rtg4 polarfire -XILINXLIBS = unisim simprim unimacro virtex virtex5 -ALTERALIBS = altera_mf stratixii altera cycloneiii stratixiii -ALTERAFILES = $(ALTERALIBS:%=lib/techmap/%) $(RMCOMLIBS:%=lib/tech/%) netlists/altera -LATTICELIBS = ec - - - -BRMLIBS = core1553bbc core1553brm core1553brt gr1553 -COREPCILIB = corePCIF -CONTRIBLIBS = openchip gleichmann contrib sun - -RMFTLIBS=ihp25 sgb25vrh ut025crh rh_lib18t rh_lib18t_io2 rh_lib13t pere05 \ - rhumc tsmc90 atc18rha_cell -RMCOMLIBS=artisan cust1 virage90 nextreme nextreme2 - -RMFTLIBSX = $(RMFTLIBS:%=lib/techmap/%) $(RMFTLIBS:%=lib/tech/%) -RMCOMLIBSX = $(RMCOMLIBS:%=lib/techmap/%) $(RMCOMLIBS:%=lib/tech/%) -RMFPGALIBSX = $(ASICLIBS:%=lib/techmap/%) $(ASICLIBS:%=lib/tech/%) - -ALIB = alib -ACOM = acom -quiet $(ACOMOPT) -ALOG = alog -quiet $(ALOGOPT) -AVHDL = avhdl - -VLIB = vlib -ifeq ("$(GRLIB_SIMULATOR)", "ALDEC") -VCOM = vcom -incr -nowarn ELAB1_0026 -nowarn COMP96_0259 -quiet $(VCOMOPT) -VLOG = vlog -incr -v2k5 -quiet $(VLOGOPT) -SVLOG = vlog -incr -quiet $(VLOGOPT) -else -VCOM = vcom -quiet $(VCOMOPT) -VLOG = vlog -quiet $(VLOGOPT) -SVLOG = $(VLOG) -endif - - -OS = `uname` - -ifeq ("$(SIMTOP)","") -SIMTOP=$(TOP) -endif - -ifeq ("$(SIMINST)","") -SIMINST=$(TOP) -endif - -ifeq ("$(LIBSKIP)","") -XLIBSKIP="x" -else -XLIBSKIP= $(LIBSKIP:%=%|) dummy -endif - -XXDIRSKIP=$(DIRSKIP:%=%/core) -YDIRSKIP=$(DIRSKIP) $(XXDIRSKIP) $(LIBSKIP) - -ifeq ("$(YDIRSKIP)","") -XDIRSKIP="dummy" -else -XDIRSKIP= $(YDIRSKIP:%=%|) $(LIBSKIP:%=%|) dummy -endif - -XFILESKIP = $(FILESKIP:%=%|) $(LIBSKIP:%=*_%.vhd|) dummy -# Note that XFILESKIP is updated in Xilinx targets below - - -# GRLIB_NHCPU defines # of CPUs available on host for synthesis, value -# may be used in script generation -ifeq ("$(GRLIB_NHCPU)","") -GRLIB_NHCPU=4 -endif - -all: help - -help: - @echo - @echo " installation targets: : see doc/grlib.pdf for library installation targets" - @echo - @echo " interactive targets:" - @echo " simulation:" - @echo " make avhdl-launch : start Active-HDL GUI mode" - @echo " make avhdl : compile design using Active-HDL gui mode" - @echo " make ncsim-launch : start NCSim GUI" - @echo " make riviera-launch : start RivieraPRO" - @echo " make vsim-launch : start ModelSim/QuestaSim" - @echo " make vcs-launch : start VCS" - @echo " verification:" - @echo " make alint-launch : start Alint elaboration time linting" - @echo " make fpro-launch : start FormalPro GUI" - @echo " implementation:" - @echo " make actel-launch : start Actel Designer for current project" - @echo " make ise-launch : start ISE project navigator for XST project" - @echo " make ise-launch-synp : start ISE project navigator for synplify project" - @echo " make libero-launch : start Microsemi Libero" - @echo " make planahead-launch : start PlanAhead project navigator" - @echo " make quartus-launch : start Quartus for current project" - @echo " make quartus-launch-synp : start Quartus for synplify project" - @echo " make synplify-launch : start Synplify" - @echo " make vivado-launch : start Vivado project navigator" - @echo " make nanoxmap-launch : start NanoXmap GUI" - @echo " other GRLIB targets:" - @echo " make xgrlib : start GRLIB GUI" - @echo - @echo " batch targets:" - @echo " simulation:" - @echo " make vsimsa : compile design using Active-HDL batch mode" - @echo " make riviera : compile design using riviera" - @echo " make vsim : compile design using modelsim" - @echo " make ncsim : compile design using ncsim" - @echo " make ghdl : compile design using GHDL" - @echo " make vcs-elab : compile and elaborate design using VCS" - @echo " verification:" - @echo " make alint-comp : alint compilation time linting" - @echo " make fm : Formal equivalence check using Synopsys Formality" - @echo " implementation:" - @echo " make actel : synthesize with synplify, place&route Actel Designer" - @echo " make dc : synthesize design usign Synopsys Design Compiler" - @echo " make ise : synthesize and place&route with Xilinx ISE" - @echo " make ise-map : synthesize design using Xilinx XST" - @echo " make ise-prec : synthesize with precision, place&route with Xilinx ISE" - @echo " make ise-synp : synthesize with synplify, place&route with Xilinx ISE" - @echo " make isp-synp : synthesize with synplify, place&route with ISPLever" - @echo " make libero : syntiesize, place&route and generate bit file with Microsemi Libero" - @echo " make planahead : synthesize and place&route with Xilinx PlanAhead" - @echo " make precision : synthesize design using precision" - @echo " make quartus : synthesize and place&route using Quartus" - @echo " make quartus-map : synthesize design using Quartus" - @echo " make quartus-synp : synthesize with synplify, place&route with Quartus" - @echo " make synplify : synthesize design using synplify" - @echo " make vivado : synthesize and place&route with Xilinx Vivado" - @echo " make nanoxpython : synthesize and place&route with NanoXplore NanoXmap" - @echo " other GRLIB targets:" - @echo " make scripts : generate compile scripts only" - @echo " make clean : remove all temporary files" - @echo " make distclean : remove all temporary files" - @echo - -make xgrlib: - @if test -r "/mingw/bin/wish84.exe"; then \ - if !(test -r "/mingw/bin/echo.bat"); then \ - cp $(GRLIB)/bin/echo.bat /mingw/bin/echo.bat; \ - fi; \ - if !(test -r "/mingw/bin/wish"); then \ - cp $(GRLIB)/bin/wish /mingw/bin/wish; \ - fi; \ - fi; \ - unset LD_LIBRARY_PATH ; \ - $(GRLIB)/bin/xgrlib.tcl $(TOP) $(TECHNOLOGY) $(DEVICE) $(BOARD) - -############ AHB ROM Generation ######################## - -FILE=prom.exe - -#leon5 designs should use BCC1. In leon5 design set OBJCOPY_CMD=sparc-gaisler-elf-objcopy -ifeq ("$(OBJCOPY_CMD)","") -OBJCOPY_CMD=sparc-elf-objcopy -endif - -ahbrom: $(GRLIB)/bin/ahbrom.c - @if test -r "/mingw/bin/gcc.exe"; then \ - $(CC) $(GRLIB)/bin/ahbrom.c -o ahbrom -lwsock32; \ - else \ - $(CC) $(GRLIB)/bin/ahbrom.c -o ahbrom; \ - fi; - -ahbrom.bin: - $(OBJCOPY_CMD) -O binary $(FILE) $@ - -ahbrom.vhd: - make ahbrom - make ahbrom.bin - ./ahbrom ahbrom.bin $@ - -ahbrom64.vhd: - make ahbrom - make ahbrom.bin - ./ahbrom ahbrom.bin $@ 64 - -ahbrom128.vhd: - make ahbrom - make ahbrom.bin - ./ahbrom ahbrom.bin $@ 128 - -######### Active-HDL batch mode targets ############ - -vsimsa: compile.vsim - @cat libs.do | sed -e s/modelsim/activehdl/ | sed -e s/vlib/alib/ > alibs-batch.do - @echo "do alibs-batch.do" > vsimsa-batch.do - @vsimsa vsimsa-batch.do - @vmap work activehdl/work - @make -f make.vsim - @-rm -f alibs-batch.do vsimsa-batch.do - -vsimsa-run: - @vsim $(SIMTOP) < $(GRLIB)/bin/runvsim.do - -vsimsa-launch: vsimsa-run - -vsimsa-clean: - -rm -rf activehdl vsimsa.cfg library.cfg wave.asdb alibs-batch.do vsimsa-batch.do - -#vsimsa-modelsim: -# echo "importmodelsim $(SIMTOP).mpf" . > activehdl.tcl -# echo "quiet on" >> activehdl.tcl -# echo "SET SIM_WORKING_FOLDER ..\\.." >> activehdl.tcl -# AVHDL -do activehdl.tcl & - -######### Active-HDL gui mode targets ############ - -avhdl avhdl.tcl: compile.asim - @echo "createdesign work ." > avhdl.tcl - @echo "opendesign -a work.adf" >> avhdl.tcl - @cat alibs.do >> avhdl.tcl - @echo "" >> avhdl.tcl - @cat make.asim-addfile >> avhdl.tcl - @cat make.asim >> avhdl.tcl - @echo "" >> avhdl.tcl - @echo SET SIM_WORKING_FOLDER $$\DSN/.. >> avhdl.tcl - @echo "" >> avhdl.tcl - @echo asim work.$(SIMTOP) >> avhdl.tcl - -avhdl-run: avhdl-launch - -avhdl-launch: avhdl.tcl - @avhdl -do avhdl.tcl - -avhdl-clean: - -rm -rf work avhdl.tcl vsimsa.cfg wave.asdb - -######### Riviera targets ############ - -ifeq ("$(GRLIB_SIMULATOR)", "ALDEC") -riviera: make.riviera - @MTI_DEFAULT_LIB_TYPE=0 vsimsa -quiet -do "do libs.do; quit" - make -f make.riviera - -riviera-run: -ifeq ("$(VSIMOPT)","") - @vsim -c $(SIMTOP) -do $(GRLIB)/bin/runvsim.do -else - @vsim -c $(VSIMOPT) -endif - -riviera-launch: -ifeq ("$(VSIMOPT)","") - @vsim $(SIMTOP) -do $(GRLIB)/bin/runvsim.do -else - @vsim $(VSIMOPT) -endif - -else -### Riviera targets using WS - -riviera_ws: riviera_ws_create.do - vsimsa -quiet -do "do riviera_ws_create.do; quit" - -riviera: riviera_ws - vsimsa -quiet -do "workspace.open riviera_ws/riviera_ws.rwsp; workspace.compile; quit" - -ifeq ("$(ASIMOPT)","") -ASIMOPT = $(VSIMOPT) -endif - -# Allow to override -ifeq ("$(RIVIERA_DO)","") -RIVIERA_DO = workspace.open riviera_ws/riviera_ws.rwsp; simulation.initialize $(SIMTOP) -endif - -riviera-run: riviera_ws - cp *.srec riviera_ws/ -ifeq ("$(VSIMOPT)","") - vsimsa -c -do "$(RIVIERA_DO); do $(realpath $(GRLIB))/bin/runvsim.do" -else - vsimsa -c $(ASIMOPT) -do "$(RIVIERA_DO); $(ASIMDO)" -endif - -riviera-launch: riviera_ws - cp *.srec riviera_ws/ -ifeq ("$(VSIMOPT)","") - riviera -do "$(RIVIERA_DO); do $(realpath $(GRLIB))/bin/runvsim.do" -else - riviera $(ASIMOPT) -do "$(RIVIERA_DO); $(ASIMDO)" -endif - -endif ### end of Riviera targets using WS - -riviera-clean: - -rm -rf riviera_ws riviera_ws_*.do vsimsa.cfg wave.asdb library.cfg .riviera_project rlibs.do compile.riviera make.riviera dataset.asdb - -######### Alint targets ############ - -# Alint compilation time linting -alint-comp: compile.vsim - @vsim -c -do "do libs.do; quit" - @sed -r -e 's/\b(vcom|vlog)\b/\1 -alint -alint_elabchecks -alint_avdb alint\.avdb/' make.vsim > make.alint - @make -f make.alint - @vmap work modelsim/work - -# Alint elaboration time linting -alint-elab: alint-comp - vlint -c -alint_maxwarn none -alint_maxrulewarn none -alint_avdb alint.avdb -asim $(TOP) - -######### Modelsim targets ############ - -UNISIMSRC = $(XILINX)/vhdl/src/unisims/unisim_VPKG.vhd \ - $(XILINX)/vhdl/src/unisims/unisim_VCOMP.vhd \ - $(XILINX)/vhdl/src/unisims/unisim_VITAL.vhd - -SIMPRIMSRC = $(XILINX)/vhdl/src/simprims/simprim_Vpackage.vhd \ - $(XILINX)/vhdl/src/simprims/simprim_Vcomponents.vhd \ - $(XILINX)/vhdl/src/simprims/simprim_VITAL.vhd - -vsim: make.work - @make -f make.work - -make.work: compile.vsim modelsim - @make -f make.vsim - @echo "" > make.work - @for i in `cat libs.txt`; do vmake $$i >> make.work ; done - @cat make.work | sed 's/\([a-zA-Z]\)\(:[\\\/]\)/\/cygdrive\/\L\1\//' > make.work2 - @mv make.work2 make.work - -# If we have paths with ':' we assume that we are running on Cygwin: -vsim-fix: -# @cat make.work | sed 's/\([a-zA-Z]\)\(:\\\)/\/\1\//' > make.work2 - @cat make.work | sed 's/\([a-zA-Z]\)\(:[\\\/]\)/\/cygdrive\/\L\1\//' > make.work2 - @mv make.work2 make.work - -ifeq ("$(VCSELAB)","") -VCSELAB = -debug_access+all -endif - -vcs-comp: make.simv - @sh vcs_libs - @make -f make.simv - -vcs-elab: vcs-comp - vcs work.$(SIMTOP) $(VCSELAB) - -vcs-run: vcs-elab - ./simv - -vcs-launch: vcs-elab - ./simv -gui - -vcs-clean: - rm -rf vcs/ simv.daidir/ csrc DVEfiles/ - rm -f simv vcs_libs synopsys_sim.setup .vdbg_combination_lock .vlogansetup.args .vlogansetup.env ucli.key inter.vpd - - -modelsim: compile.vsim - @MTI_DEFAULT_LIB_TYPE=0 vsim -c -quiet -do "do libs.do; quit" - -vsim-grlib: modelsim - make vsim -# @for i in `cat libs.txt`; do \ -# make -f modelsim/make.$$i ; \ -# done ; - -vsim-run: vsim -ifeq ("$(VSIMOPT)","") - @vsim -c -voptargs="+acc -nowarn 1" $(SIMTOP) < $(GRLIB)/bin/runvsim.do -else - @vsim -c $(VSIMOPT) -endif - -vsim-launch: scripts modelsim -ifeq ("$(VSIMOPT)","") - @vsim -i -quiet -voptargs="+acc -nowarn 1" $(SIMTOP) -else - vsim -i -quiet $(VSIMOPT) -endif - -vsim-mcb: scripts - -vlib modelsim - -vlib modelsim/unisim - vcom -quiet -explicit -work unisim $(XILINX)/vhdl/src/unisims/secureip/MCB.vhd - -vsim-unisim: modelsim - vcom -quiet -explicit -work unisim $(UNISIMSRC) - -vsim-simprim: modelsim - vcom -quiet -explicit -work simprim -ignorevitalerrors $(SIMPRIMSRC) - -# Ugly hardcode of testbench.vhd.. -vsim-netgen-syn: - vcom -quiet -explicit -work work netgen/translate/$(TOP)_translate.vhd - vcom -quiet -explicit -work work testbench.vhd - -vsim-netgen-par: - vcom -quiet -explicit -work work netgen/par/$(TOP)_timesim.vhd - vcom -quiet -explicit -work work testbench.vhd - -vsim-clean: - -rm -rf modelsim transcript *.mti stdout.log vsim.wlf vsim_stacktrace.vstf \ - $(SIMTOP).mpf.bak $(SIMTOP).mti *.mpf wlft* - -######### FormalPro targets ############ - -fpro-launch: $(TOP)_rtl_fpro.fl - formalpro -gui -a -fl $(TOP)_rtl_fpro.fl -mod $(TOP) - -# Target rtl2rtl for sanity check -fpro-launch-rtl2rtl: $(TOP)_rtl_fpro.fl - formalpro -gui -a -fl $(TOP)_rtl_fpro.fl -mod $(TOP) -b -fl $(TOP)_rtl_fpro.fl -mod $(TOP) - -fpro-run-rtl2rtl: $(TOP)_rtl_fpro.fl - formalpro -a -fl $(TOP)_rtl_fpro.fl -mod $(TOP) -b -fl $(TOP)_rtl_fpro.fl -mod $(TOP) - -fpro-clean: - -rm -rf $(TOP)_rtl_fpro.fl formalpro.log formalpro.cache - - -######### GHDL targets ############ -# Outdated files are resolved by "GHDLM". - -GHDL ?= ghdl -GHDLI = $(GHDL) -i -GHDLM = $(GHDL) -m -GHDLIOPT ?= --mb-comments -GHDLMOPT ?= -fexplicit --ieee=synopsys --mb-comments --warn-no-binding -O2 -GHDLRUNOPT ?= --assert-level=error --ieee-asserts=disable - -# Compile design - -.PHONY: ghdl-import -ghdl-import gnu: make.ghdl - make -f make.ghdl ghdl-import - -.PHONY: ghdl -ghdl: $(SIMTOP) - -# Analyse outdated files and elaborate design. -.PHONY: $(SIMTOP) -$(SIMTOP): gnu - $(GHDLM) $(GHDLMOPT) --workdir=gnu/work --work=work `cat ghdl.path` $@ - -# Run testbench SIMTOP -.PHONY: ghdl-run -ghdl-run: $(SIMTOP) - ./$(SIMTOP) $(GHDLRUNOPT) - -.PHONY: ghdl-vcd -ghdl-vcd: $(SIMTOP) - ./$(SIMTOP) $(GHDLRUNOPT) --vcd=$(SIMTOP).vcd - -ghdl-clean: - -rm -rf gnu $(SIMTOP) make.ghdl - -######### NcSim targets ############ - -ncsim: xncsim/done - ncupdate $(SIMTOP) - -ncsim-run: ncsim - ncsim $(SIMTOP) - -ncsim-launch: ncsim - ncsim -gui $(SIMTOP)& - -xncsim xncsim/done : compile.ncsim - -rm -rf xncsim - make -f make.ncsim - touch xncsim/done - -ncsim-clean: - -rm -rf xncsim nc*.log ncsim.key - -######### Lattice ISPLEVER targets ############ - - - -isp-synp: $(TOP)_synplify.prj synplify/$(TOP).edf - $(GRLIB)/bin/route_lattice $(TOP) $(UCF) $(PART) synplify $(ISPLIB) $(ISPPACKAGE) $(BITGEN) - -isp-prec: $(TOP)_precision.prj precision/$(TOP).edf - $(GRLIB)/bin/route_lattice $(TOP) $(UCF) $(PART) precision $(ISPLIB) $(ISPPACKAGE) $(BITGEN) - -isp-launch-synp: $(TOP)_synplify.prj synplify/$(TOP).edf - projnav ./$(TOP).syn - -isp-launch-prec: $(TOP)_precision.prj precision/$(TOP).edf - projnav ./$(TOP)_precision.syn - -diamond-launch: $(TOP).ldf - diamond $(TOP).ldf - -isp-prom: - synsvf $(PROMGENPAR) -isp-clean: - -rm -rf $(TOP).dir *.jid *.alt *.lci *.mt *.nc1 *.nc2 *.p?t \ - *.err compxlib.cfg *.jhd *.lct $(TOP).log *.ngy *.prf *.pt *.rev \ - *.syn *.t2b *.tcm *.tcp *.tw1 $(TOP).tcl *.sty *.svl *.env fonts.dir \ - $(TOP)_tcl.ini lattice $(TOP).ldf $(TOP).lpf - - -######### Xilinx targets ############ -ifeq ("$(NETLISTTECH)","") -# Some netlists are reused for other FPGA families -ifeq ("$(TECHNOLOGY)","zynq7000") -NETLISTTECH = Zynq -else -ifeq ("$(TECHNOLOGY)","Virtex7") -NETLISTTECH = Virtex7 -else -ifeq ("$(TECHNOLOGY)","Kintex7") -NETLISTTECH = Kintex7 -else -ifeq ("$(TECHNOLOGY)","Artix7") -NETLISTTECH = Artix7 -else -ifeq ("$(TECHNOLOGY)","Spartan6") -NETLISTTECH = Spartan3 -else -ifeq ("$(TECHNOLOGY)","Virtex6") -NETLISTTECH = Virtex6 -else -ifeq ("$(TECHNOLOGY)","Virtex2p") -NETLISTTECH = Virtex2 -else -ifeq ("$(TECHNOLOGY)","Spartan3A") -NETLISTTECH = Spartan3 -else -ifeq ("$(TECHNOLOGY)","Spartan3E") -NETLISTTECH = Spartan3 -else -ifeq ("$(TECHNOLOGY)","Spartan-3A-DSP") -NETLISTTECH = Spartan3 -else -ifeq ("$(TECHNOLOGY)","KintexU") -NETLISTTECH = kintexu -else -NETLISTTECH = $(TECHNOLOGY) -endif -endif -endif -endif -endif -endif -endif -endif -endif -endif -endif -endif -######### Xilinx ISE targets ############ - -XSTVHDL = elaborate -ifmt vhdl -work_lib -XSTVLOG = elaborate -ifmt verilog -work_lib -XSTLIBSKIPX = $(ASICLIBS) $(BRMLIBS) $(ACTELLIBS) $(ALTERALIBS) \ - $(LATTICELIBS) $(COREPCILIB) $(SIMLIBS) -XSTLIBSKIP = $(XSTLIBSKIPX:%=%|) dware -XSTDIRSKIPX = $(ASICLIBS) $(ACTELLIBS) $(ALTERALIBS) $(LATTICELIBS) -XSTDIRSKIP = $(XSTDIRSKIPX:%=%|) dware -#XSTSKIPX = $(XSTLIBSKIPX:%=*_%.vhd |) -XSTSKIP = $(XSTSKIPX) b1553* | pci_components* | pcicore* | snpsmul.vhd - -ifeq ("$(ISETECH)","") -ISETECH=$(TECHNOLOGY) -endif - -ifeq ("$(ISE11TECH)","") -ISE11TECH=$(ISETECH) -endif - -# Xilinx FT-FPGA addon package targets, note: may modify COMPXLIBTECH -ifneq ("$(GRLIB)","") --include $(GRLIB)/bin/xtmr/Makefile -endif - -## Xilinx ISE project properties that can be overrideen -# Pack I/O Registers/Latches into IOBs -ifeq ("$(GRLIB_XIL_PN_Pack_Reg_Latches_into_IOBs)","") -GRLIB_XIL_PN_Pack_Reg_Latches_into_IOBs=For Inputs and Outputs -endif -# Simulator -ifeq ("$(GRLIB_XIL_PN_Simulator)","") -ifeq ("$(GRLIB_SIMULATOR)","ModelSim") -GRLIB_XIL_PN_Simulator=Modelsim-SE VHDL -else -ifeq ("$(GRLIB_SIMULATOR)","ModelSim-SE") -GRLIB_XIL_PN_Simulator=Modelsim-SE VHDL -else -ifeq ("$(GRLIB_SIMULATOR)","ModelSim-PE") -GRLIB_XIL_PN_Simulator=ModelSim-PE VHDL -else -GRLIB_XIL_PN_Simulator=ISim \(VHDL/Verilog\) -endif -endif -endif -endif - -## End of Xilinx ISE project properties - -NUCF = $(UCF:%=-uc % ) - -ise: $(TOP).ngc - ngdbuild $(TOP).ngc -aul $(NUCF) -p $(DEVICE) -sd $(GRLIB)/netlists/xilinx/$(NETLISTTECH) - map -pr b -w -ol $(EFFORT) -p $(DEVICE) $(TOP) $(ISEMAPOPT) - par -ol $(EFFORT) -w $(TOP) $(TOP).ncd - trce -v 5 $(TOP).ncd $(TOP).pcf - bitgen $(TOP) -d -m -w -f $(BITGEN) - -ise-synp: $(TOP)_synplify.prj synplify/$(TOP).edf - ngdbuild synplify/$(TOP).edf -aul $(NUCF) -p $(DEVICE) -sd $(GRLIB)/netlists/xilinx/$(NETLISTTECH) - map -pr b -w -ol $(EFFORT) -p $(DEVICE) $(TOP) $(ISEMAPOPT) - par -ol $(EFFORT) -w $(TOP) $(TOP).ncd - trce -v 5 $(TOP).ncd $(TOP).pcf - bitgen $(TOP) -d -m -w -f $(BITGEN) - -ise-prec: $(TOP).psp precision/$(TOP).edf - ngdbuild precision/$(TOP).edf -aul $(NUCF) -p $(DEVICE) -sd $(GRLIB)/netlists/xilinx/$(NETLISTTECH) - map -pr b -w -ol $(EFFORT) -p $(DEVICE) $(TOP) $(ISEMAPOPT) - par -ol $(EFFORT) -w $(TOP) $(TOP).ncd - trce -v 5 $(TOP).ncd $(TOP).pcf - bitgen $(TOP) -d -m -w -f $(BITGEN) - -ise-launch8 xst-launch: $(TOP).npl $(TOP)_ise.tcl - ise $(TOP).npl>& ise.err& - -ise-launch10 ise-launch9: $(TOP).ise - ise $(TOP).ise - -ise-launch11 : $(TOP).xise - ise $(TOP).xise - -ise-launch : - @isever=`promgen | grep Rele | awk '{print $$2}'`; \ - case $$isever in \ - 8*) \ - make ise-launch8 ;;\ - 9*) \ - make ise-launch9 ;;\ - 10*) \ - make ise-launch10 ;;\ - *) \ - make ise-launch11 ;;\ - esac - - - -ise-launch-synp: $(TOP).npl $(TOP)_synplify.prj synplify/$(TOP).edf $(TOP)_synplify.prj - ise $(TOP)_synplify.npl>& ise.err& - -$(TOP).xst: compile.xst $(TOP)_files.prj - @rm -f $(TOP).xst - @$(GRLIB)/bin/xstrun $(TOP) $(TOP).vhd $(DEVICE) >> $(TOP).xst - @echo -ofn $(TOP) $(XSTOPT) -define {XSTDUMMY $(SYNPVLOGDEFS)} -sd $(GRLIB)/netlists/xilinx/$(NETLISTTECH) >> $(TOP).xst - -ise-xstmod : - $(GRLIB)/bin/xstmod $(CORE) $(CORE).vhd $(DEVICE) vhdl > tmp.xst - xst -ifn tmp.xst - -ise-map xst-map ise-xst xst: $(TOP).ngc - -$(TOP).ngc: $(TOP).xst $(VHDLSYNFILES) $(VERILOGSYNFILES) compile.xst - -rm -rf xst - @-mkdir xst xst/projnav.tmp - xst -ifn $(TOP).xst - -$(TOP).ngd: - @if test -r "$(TOP).ngc"; then \ - ngdbuild $(TOP).ngc -aul $(NUCF) -p $(DEVICE) -sd $(GRLIB)/netlists/xilinx/$(NETLISTTECH) ; \ - fi; \ - if test -r "synplify/$(TOP).edf"; then \ - ngdbuild synplify/$(TOP).edf -aul $(NUCF) -p $(DEVICE) -sd $(GRLIB)/netlists/xilinx/$(NETLISTTECH) ; \ - fi; \ - if test -r "precision/$(TOP).edf"; then \ - ngdbuild precision/$(TOP).edf -aul $(NUCF) -p $(DEVICE) -sd $(GRLIB)/netlists/xilinx/$(NETLISTTECH) ; \ - fi; - -$(TOP).ise: $(TOP)_ise.tcl - @echo "Creating $(TOP).ise using xtclsh - this can take up to 20 minutes." - xtclsh $(TOP)_ise.tcl - -ise-prom: -ifeq ("$(PROMGENPAR)","") - @echo "no prom programming support for this board" - @exit 1 -else - promgen $(PROMGENPAR) - cp $(TOP).bit $(BOARD).bit - cp $(TOP).msk $(BOARD).msk -endif - -ise-cp-ref: - cp bitfiles/*.* . - -ise-prog-prom: ise-prom - impact -batch $(GRLIB)/boards/$(BOARD)/prom.cmd - -ise-prog-prom-usb: ise-prom - impact -batch $(GRLIB)/boards/$(BOARD)/prom-usb.cmd - -ise-prog-prom-ref: ise-cp-ref ise-prom - impact -batch $(GRLIB)/boards/$(BOARD)/prom.cmd - -ise-prog-prom-ref-usb: ise-cp-ref ise-prom - impact -batch $(GRLIB)/boards/$(BOARD)/prom-usb.cmd - -ise-prog-fpga: - cp $(TOP).bit $(BOARD).bit - cp $(TOP).msk $(BOARD).msk - impact -batch $(GRLIB)/boards/$(BOARD)/fpga.cmd - -ise-prog-fpga-usb: - cp $(TOP).bit $(BOARD).bit - cp $(TOP).msk $(BOARD).msk - impact -batch $(GRLIB)/boards/$(BOARD)/fpga-usb.cmd - - -ise-prog-fpga-ref: ise-cp-ref - cp $(TOP).bit $(BOARD).bit - cp $(TOP).msk $(BOARD).msk - impact -batch $(GRLIB)/boards/$(BOARD)/fpga.cmd - -ise-prog-fpga-ref-usb: ise-cp-ref - cp $(TOP).bit $(BOARD).bit - cp $(TOP).msk $(BOARD).msk - impact -batch $(GRLIB)/boards/$(BOARD)/fpga-usb.cmd - -ise-netgen-syn: $(TOP).ngd - netgen -rpw 100 -tpw 100 -ar Structure -tm $(TOP) \ - -w -dir netgen/translate -ofmt vhdl -sim $(TOP).ngd $(TOP)_translate.vhd - -ise-netgen-par: - netgen -s 1 -pcf $(TOP).pcf -rpw 100 -tpw 0 -ar Structure -tm $(TOP) \ - -insert_pp_buffers true -w -dir netgen/par -ofmt vhdl -sim $(TOP).ncd $(TOP)_timesim.vhd - -ise-clean xst-clean: - -rm -rf xst *.srp xstmods *.twr *.pad _impact* coregen.log \ - tmp.xst *.ngc __projnav* *.stx *.lso *.dhp automake.log \ - $(TOP)*_vhdl.prj *.bit *.bgn *.bld \ - *.cmd_log *.ll *.mrp *.msk *.ncd *.ngd *.syr *.xpi *.csv \ - *pad.txt *.ngm *.lst *.drc *.par *.pcf *.ngo *.mcs *.prm \ - *.sig *.rba *.rbb *.rbd *.rbt *.msd _ngo _impact* stdout.log \ - ngd2vhdl.log _xmsgs tmp.txt $(TOP)*.unroutes $(TOP)*_usage.xml *.cfi \ - $(TOP)*.ise* $(TOP)*.npl* xlnx_auto_0* *.xrpt *.ptwx $(TOP)*_xdb \ - $(TOP)*_summary.html $(TOP)*.restore $(TOP).ntrc_log $(TOP)*.twx \ - $(TOP)*_map.map $(TOP)*.ngr $(TOP)*.xise $(TOP)*.gise $(TOP)*.psr \ - device_usage_statistics.html* __*.lock \ - *.xwbt *webtalk* par_usage_statistics.html fuse.log fuse.xmsgs \ - fuseRelaunch.cmd iseconfig isim isim.cmd isim.log testbench_beh.prj \ - version_isim_beh.wdb xilinxsim.ini .ngc2edfcache netgen - -UNISIM = $(XILINX)/vhdl/src/unisims -UNISIMFILES = unisim_VPKG.vhd unisim_VCOMP.vhd unisim_VITAL.vhd \ - unisim_virtex5_SMODEL.vhd -UNISIMSECIPFILES = MCB.vhd GTXE1.vhd \ - GTP_DUAL.vhd GTPA1_DUAL.vhd GT11.vhd \ - GT11CLK.vhd GT11CLK_MGT.vhd GT11_CUSTOM.vhd \ - GT11_DUAL.vhd GTX_DUAL.vhd GTHE1_QUAD.vhd \ - PCIE_2_0.vhd PCIE_A1.vhd -UNISIMSECIPFILESSKIP = $(UNISIMSECIPFILES:%=|%) - -# Workaround for secureip files being part of unisim and secureip techlib -# being unavailable -ifneq (,$(findstring unisim,$(TECHLIBS))) -ifeq (,$(filter secureip secureip_ver,$(TECHLIBS))) -# Skip unisim secureip files if secureip is missing from techlibs. -# Bad things will happen if there are file name collisions with -# other libraries.. -XFILESKIP+= $(UNISIMSECIPFILESSKIP) -endif -endif - -GRUNISIM = $(GRLIB)/lib/tech/unisim/ise -SIMPRIM = $(XILINX)/vhdl/src/simprims -UNIMACRO = $(XILINX)/vhdl/src/unimacro -UNISIMS_VER = $(XILINX)/verilog/src/unisims -GRUNISIMS_VER = $(GRLIB)/lib/tech/unisims_ver/ise -XILINXCORELIB_VER = $(XILINX)/verilog/src/ -GRXILINXCORELIB_VER = $(GRLIB)/lib/tech/xilinxcorelib_ver/ise - - -install-unimacro: - @echo UNIMACRO source path: $(UNIMACRO); \ - if test -r $(UNIMACRO); then \ - cp $(UNIMACRO)/*.vhd $(GRLIB)/lib/tech/unimacro/ise; \ - for i in $(UNIMACRO)/*.vhd ; do basename $$i >> $(GRLIB)/lib/tech/unimacro/ise/vhdlsyn.txt; done; \ - fi - -remove-unimacro: - @-rm $(GRLIB)/lib/tech/unimacro/ise/*.vhd; echo "" > $(GRLIB)/lib/tech/unimacro/ise/vhdlsyn.xt - -install-unisim: -ifeq ("$(GRLIB_SIMULATOR)","Xilinx") - @echo "GRLIB_SIMULATOR is Xilinx. Unisim installation not required, aborted." -else - @echo UNISIM source path: $(UNISIM); \ - for i in $(UNISIMFILES); do \ - if test -r $(UNISIM)/$$i; then \ - cp $(UNISIM)/$$i $(GRUNISIM);\ - echo installing $$i ;\ - else \ - if [ "unisim_VITAL.vhd" = $$i ]; then \ - if test -r $(UNISIM)/primitive/vhdl_analyze_order; then \ - echo "creating unisim_VITAL.vhd from primitives" ; \ - echo "" > $(GRUNISIM)/unisim_VITAL.vhd; \ - for j in `cat $(UNISIM)/primitive/vhdl_analyze_order`; do \ - cat $(UNISIM)/primitive/$$j >> $(GRUNISIM)/unisim_VITAL.vhd; \ - done ; \ - fi ; \ - fi ; \ - fi ; \ - done -endif - -install-xilinxcorelib_ver: -ifeq ("$(GRLIB_SIMULATOR)","Xilinx") - @echo "GRLIB_SIMULATOR is Xilinx. Library installation not required, aborted." -else - @if [ -d $(GRXILINXCORELIB_VER) ]; then \ - echo "xilinxcorelib_ver library already installed"; else \ - echo installing xilinxcorelib_ver in $(GRXILINXCORELIB_VER) ; \ - mkdir -p $(GRXILINXCORELIB_VER) ; \ - for i in $(XILINXCORELIB_VER)/*.v; do \ - cp $$i $(GRXILINXCORELIB_VER) ; \ - echo `basename $$i` >> $(GRXILINXCORELIB_VER)/vlogsim.txt ; \ - done; fi -endif - -install-unisim_ver: install-xilinxcorelib_ver -ifeq ("$(GRLIB_SIMULATOR)","Xilinx") - @echo "GRLIB_SIMULATOR is Xilinx. Unisim installation not required, aborted." -else - @if [ -f $(GRUNISIMS_VER)/noexist ]; then \ - echo "unisims_ver library already installed"; else \ - echo installing unisims_ver in $(GRUNISIMS_VER) ; \ - mkdir -p $(GRUNISIMS_VER) ; \ - for i in $(UNISIMS_VER)/*.v; do \ - cat $$i >> $(GRUNISIMS_VER)/unisims_ver.v ; \ -# cp $$i $(GRUNISIMS_VER) ; \ -# echo `basename $$i` >> $(GRUNISIMS_VER)/vlogsim.txt ; \ - done ; \ - echo unisims_ver.v > $(GRUNISIMS_VER)/vlogsim.txt ; \ - fi -endif - -# Undocumented target, functionality was previously part of install-unisim target. -patch-unisim: - if (test -r $(GRUNISIM)/unisim_VITAL.vhd); then \ - cat $(GRUNISIM)/unisim_VITAL.vhd | sed -e s/'SIM_COLLISION_CHECK : string := "ALL"'/'SIM_COLLISION_CHECK : string := "GENERATE_X_ONLY"'/ \ - > $(GRUNISIM)/unisim_vitalx.vhd;\ - cp $(GRUNISIM)/unisim_vitalx.vhd $(GRUNISIM)/unisim_VITAL.vhd;\ - rm $(GRUNISIM)/unisim_vitalx.vhd;\ - echo patching unisim_VITAL.vhd ;\ - fi - -ifeq ("$(GRLIB_SIMULATOR)","ALDEC") -XILINX_SECUREIP_PATH = aldec -else -ifeq ("$(GRLIB_SIMULATOR)","ALDEC_RWS") -XILINX_SECUREIP_PATH = aldec -else -XILINX_SECUREIP_PATH = mti -endif -endif - -install-secureip: install-unisim -ifeq ("$(GRLIB_SIMULATOR)","Xilinx") - @echo "GRLIB_SIMULATOR is Xilinx. SecureIP installation not required, aborted." -else - @echo UNISIM source path: $(UNISIM); \ - for i in $(UNISIMSECIPFILES); do \ - cp $(UNISIM)/secureip/$$i $(GRUNISIM);\ - echo installing $$i ;\ - done - @if (test -r $(XILINX)/secureip/$(XILINX_SECUREIP_PATH)/mcb_$(XILINX_SECUREIP_PATH)); then \ - echo installing $(XILINX)/secureip ;\ - cp $(XILINX)/secureip/$(XILINX_SECUREIP_PATH)/mcb_$(XILINX_SECUREIP_PATH)/*.vp $(GRLIB)/lib/tech/secureip/ise;\ - fi ; \ - if (test -r $(XILINX)/secureip/$(XILINX_SECUREIP_PATH)/pcie_2_0_$(XILINX_SECUREIP_PATH)); then \ - cp $(XILINX)/secureip/$(XILINX_SECUREIP_PATH)/pcie_2_0_$(XILINX_SECUREIP_PATH)/*.vp $(GRLIB)/lib/tech/secureip/ise; \ - fi ; \ - if (test -r $(XILINX)/secureip/$(XILINX_SECUREIP_PATH)/gtxe1_$(XILINX_SECUREIP_PATH)); then \ - cp $(XILINX)/secureip/$(XILINX_SECUREIP_PATH)/gtxe1_$(XILINX_SECUREIP_PATH)/*.vp $(GRLIB)/lib/tech/secureip/ise; \ - fi ; \ - if (test -r $(XILINX)/secureip/$(XILINX_SECUREIP_PATH)/gtpa1_dual_$(XILINX_SECUREIP_PATH)); then \ - cp $(XILINX)/secureip/$(XILINX_SECUREIP_PATH)/gtpa1_dual_$(XILINX_SECUREIP_PATH)/*.vp $(GRLIB)/lib/tech/secureip/ise; \ - fi ; \ - if (test -r $(XILINX)/secureip/$(XILINX_SECUREIP_PATH)/gtp_dual_fast_$(XILINX_SECUREIP_PATH)); then \ - cp $(XILINX)/secureip/$(XILINX_SECUREIP_PATH)/gtp_dual_fast_$(XILINX_SECUREIP_PATH)/*.vp $(GRLIB)/lib/tech/secureip/ise; \ - fi ; \ - if (test -r $(XILINX)/secureip/$(XILINX_SECUREIP_PATH)/gtx_dual_fast_$(XILINX_SECUREIP_PATH)); then \ - cp $(XILINX)/secureip/$(XILINX_SECUREIP_PATH)/gtx_dual_fast_$(XILINX_SECUREIP_PATH)/*.vp $(GRLIB)/lib/tech/secureip/ise; \ - fi ; \ - if (test -r $(XILINX)/secureip/$(XILINX_SECUREIP_PATH)/pcie_a1_$(XILINX_SECUREIP_PATH)); then \ - cp $(XILINX)/secureip/$(XILINX_SECUREIP_PATH)/pcie_a1_$(XILINX_SECUREIP_PATH)/*.vp $(GRLIB)/lib/tech/secureip/ise; \ - fi -endif - -install-secureip_ver: install-unisim_ver -ifeq ("$(GRLIB_SIMULATOR)","Xilinx") - @echo "GRLIB_SIMULATOR is Xilinx. SecureIP installation not required, aborted." -else - @echo UNISIM source path: $(UNISIM); \ - for i in $(UNISIMSECIPFILES); do \ - cp $(UNISIM)/secureip/$$i $(GRUNISIM);\ - echo installing $$i ;\ - done - @if (test -r $(XILINX)/secureip/$(XILINX_SECUREIP_PATH)/mcb_$(XILINX_SECUREIP_PATH)); then \ - echo installing $(XILINX)/secureip ;\ - cp $(XILINX)/secureip/$(XILINX_SECUREIP_PATH)/mcb_$(XILINX_SECUREIP_PATH)/*.vp $(GRLIB)/lib/tech/secureip_ver/ise;\ - fi ; \ - if (test -r $(XILINX)/secureip/$(XILINX_SECUREIP_PATH)/pcie_2_0_$(XILINX_SECUREIP_PATH)); then \ - cp $(XILINX)/secureip/$(XILINX_SECUREIP_PATH)/pcie_2_0_$(XILINX_SECUREIP_PATH)/*.vp $(GRLIB)/lib/tech/secureip_ver/ise; \ - fi ; \ - if (test -r $(XILINX)/secureip/$(XILINX_SECUREIP_PATH)/gtxe1_$(XILINX_SECUREIP_PATH)); then \ - cp $(XILINX)/secureip/$(XILINX_SECUREIP_PATH)/gtxe1_$(XILINX_SECUREIP_PATH)/*.vp $(GRLIB)/lib/tech/secureip_ver/ise; \ - fi ; \ - if (test -r $(XILINX)/secureip/$(XILINX_SECUREIP_PATH)/gtpa1_dual_$(XILINX_SECUREIP_PATH)); then \ - cp $(XILINX)/secureip/$(XILINX_SECUREIP_PATH)/gtpa1_dual_$(XILINX_SECUREIP_PATH)/*.vp $(GRLIB)/lib/tech/secureip_ver/ise; \ - fi ; \ - if (test -r $(XILINX)/secureip/$(XILINX_SECUREIP_PATH)/gtp_dual_fast_$(XILINX_SECUREIP_PATH)); then \ - cp $(XILINX)/secureip/$(XILINX_SECUREIP_PATH)/gtp_dual_fast_$(XILINX_SECUREIP_PATH)/*.vp $(GRLIB)/lib/tech/secureip_ver/ise; \ - fi ; \ - if (test -r $(XILINX)/secureip/$(XILINX_SECUREIP_PATH)/gtx_dual_fast_$(XILINX_SECUREIP_PATH)); then \ - cp $(XILINX)/secureip/$(XILINX_SECUREIP_PATH)/gtx_dual_fast_$(XILINX_SECUREIP_PATH)/*.vp $(GRLIB)/lib/tech/secureip_ver/ise; \ - fi ; \ - if (test -r $(XILINX)/secureip/$(XILINX_SECUREIP_PATH)/pcie_a1_$(XILINX_SECUREIP_PATH)); then \ - cp $(XILINX)/secureip/$(XILINX_SECUREIP_PATH)/pcie_a1_$(XILINX_SECUREIP_PATH)/*.vp $(GRLIB)/lib/tech/secureip_ver/ise; \ - fi -endif - -remove-secureip uninstall-secureip remove-unisim uninstall-unisim: - @-rm $(GRLIB)/lib/tech/secureip/ise/*.vp $(GRLIB)/lib/tech/secureip_ver/ise/*.vp - @-rm -r $(GRLIB)/lib/tech/unisims_ver/ise $(GRLIB)/lib/tech/xilinxcorelib_ver/ise - @-rm $(GRLIB)/lib/tech/unisim/ise/*.vhd - -# Simulator compxlib -ifeq ("$(GRLIB_XIL_compxlib_Simulator)","") -# Set default to ModelSim for GRLIB_XIL_compxlib_Simulator -GRLIB_XIL_compxlib_Simulator=mti_se -ifeq ("$(GRLIB_SIMULATOR)","ModelSim") -GRLIB_XIL_compxlib_Simulator=mti_se -endif -ifeq ("$(GRLIB_SIMULATOR)","ModelSim-PE") -GRLIB_XIL_compxlib_Simulator=mti_pe -endif -ifeq ("$(GRLIB_SIMULATOR)","ModelSim-SE") -GRLIB_XIL_compxlib_Simulator=mti_se -endif -ifeq ("$(GRLIB_SIMULATOR)","ALDEC") -GRLIB_XIL_compxlib_Simulator=riviera -endif -ifeq ("$(GRLIB_SIMULATOR)","ALDEC_RWS") -GRLIB_XIL_compxlib_Simulator=riviera -endif -ifeq ("$(GRLIB_SIMULATOR)","Questa") -GRLIB_XIL_compxlib_Simulator=questasim -endif -endif - -# Simulator vivado -ifeq ("$(GRLIB_XIL_simlib_Simulator)","") -# Set default to ModelSim for GRLIB_XIL_simlib_Simulator -export GRLIB_XIL_simlib_Simulator=modelsim -ifeq ("$(GRLIB_SIMULATOR)","ModelSim") -export GRLIB_XIL_simlib_Simulator=modelsim -endif -ifeq ("$(GRLIB_SIMULATOR)","ModelSim-PE") -export GRLIB_XIL_simlib_Simulator=modelsim -endif -ifeq ("$(GRLIB_SIMULATOR)","ModelSim-SE") -export GRLIB_XIL_simlib_Simulator=modelsim -endif -ifeq ("$(GRLIB_SIMULATOR)","ALDEC") -export GRLIB_XIL_simlib_Simulator=riviera -endif -ifeq ("$(GRLIB_SIMULATOR)","ALDEC_RWS") -export GRLIB_XIL_simlib_Simulator=riviera -endif -ifeq ("$(GRLIB_SIMULATOR)","Questa") -export GRLIB_XIL_simlib_Simulator=questa -endif -endif - -ifeq ("$(COMPXLIBTECH)","") -COMPXLIBTECH=$(ISETECH) -endif - -ifeq ("$(GRLIB_COMPILE_VIVADO_IP)","") -VIVADOCOMPILEIP=-no_ip_compile -endif - - -# install-simprim, compile-simprim/xilinxcorelib/unisim/xilinx-simlibs are tailored for ModelSim/Questa -# (target dir is ./modelsim) -install-simprim: - @echo "install-simprim is not supported. compile-simprim can be used to compile simprim for ModelSim" - -compile-simprim: - compxlib -s $(GRLIB_XIL_compxlib_Simulator) -l vhdl -arch $(COMPXLIBTECH) -lib simprim -w -dir ./modelsim - -compile-xilinxcorelib: - compxlib -s $(GRLIB_XIL_compxlib_Simulator) -l vhdl -arch $(COMPXLIBTECH) -lib xilinxcorelib -w -dir ./modelsim - -compile-unisim: - compxlib -s $(GRLIB_XIL_compxlib_Simulator) -l vhdl -arch $(COMPXLIBTECH) -lib unisim -w -dir ./modelsim - -compile-xilinx-simlibs: - compxlib -s $(GRLIB_XIL_compxlib_Simulator) -l vhdl -arch $(COMPXLIBTECH) -lib unisim -lib simprim -lib xilinxcorelib -w -dir ./modelsim - -# Needs to depend on modelsim.ini so that the file is not overwritten by subsequent commands -# Selects family all since GRLIB techmap layer has Virtex-5-specific primitives (for example) -# Compilation of IPs can be turned on by setting GRLIB_COMPILE_VIVADO_IP to a non-empty value -# This is turned off by default, since the IPs aren't used in the template designs -compile_xilinx_7series_lib: modelsim.ini -ifneq ("$(GRLIB_SIMULATOR)","Xilinx") - -@mkdir -p ./xilinx_lib - @if [ -d ./xilinx_lib/unisims_ver ]; then \ - echo "Xilinx library already compiled"; else \ - echo "compile_simlib -quiet -directory ./xilinx_lib/ -family all -language all -simulator $(GRLIB_XIL_simlib_Simulator) $(VIVADOCOMPILEIP) -library unisim -library simprim " > ./xilinx_lib/$(TOP)_simlib.tcl ; \ - vivado -mode batch -source ./xilinx_lib/$(TOP)_simlib.tcl ; \ - fi; -endif - -map_xilinx_7series_lib: compile_xilinx_7series_lib -ifneq ("$(GRLIB_SIMULATOR)","Xilinx") -ifneq ("$(GRLIB_SIMULATOR)","ALDEC_RWS") - @if [ -d ./xilinx_lib/unisims_ver ]; then \ - vmap secureip_ver ./xilinx_lib/secureip ; \ - vmap secureip ./xilinx_lib/secureip ; \ - vmap axi_bfm ./xilinx_lib/secureip ; \ - vmap unisims_ver ./xilinx_lib/unisims_ver ; \ - vmap unisim ./xilinx_lib/unisim ; \ - vmap unimacro_ver ./xilinx_lib/unimacro_ver ; \ - vmap unimacro ./xilinx_lib/unimacro ; \ - vmap simprim_ver ./xilinx_lib/simprims_ver ; \ - vmap unifast_ver ./xilinx_lib/unifast_ver ; \ - vmap unifast ./xilinx_lib/unifast_ver ; else \ - echo "Xilinx Library not found. Please make sure you have installed the correct version of the Xilinx Library. This can also be caused by a simulator error. Please make sure a simulator supported by the Xilinx Vivado version is installed." ; exit 1 ; \ - fi; -else - vsimsa -c -do $(GRLIB)/bin/aldec/riviera_ws_map_xilinx_libs.do -endif -else - echo "GRLIB_SIMULATOR is Xilinx, skipping map of libraries"; exit 1 -endif - -clean-xilinx-lib: - -rm -rf xilinx_lib compxlib.* .cxl.*.version - -ip_7series_generate: vivado/$(TOP)_vivado.tcl $(VHDLSYNFILES) $(VERILOGSYNFILES) -ifeq ($(CONFIG_MIG_7SERIES),y) - @if [ -d ./vivado/$(DESIGN)/$(DESIGN).srcs/sources_1/ip ]; then \ - echo "Xilinx IPs already generated!"; else \ - vivado -mode batch -source ./vivado/$(TOP)_vivado.tcl ; \ - fi; -endif - -mig_7series: ip_7series_generate compile_xilinx_7series_lib map_xilinx_7series_lib -ifneq ("$(GRLIB_SIMULATOR)","Xilinx") -ifeq ($(CONFIG_MIG_7SERIES),y) -ifneq ("$(GRLIB_SIMULATOR)","ALDEC_RWS") - if [ -f ./vivado/$(DESIGN)/$(DESIGN).srcs/sources_1/ip/mig/mig/user_design/rtl/mig.v ]; then \ - vlog -work gaisler \ - ./vivado/$(DESIGN)/$(DESIGN).srcs/sources_1/ip/mig/mig/user_design/rtl/mig.v \ - ./vivado/$(DESIGN)/$(DESIGN).srcs/sources_1/ip/mig/mig/user_design/rtl/mig_mig_sim.v \ - ./vivado/$(DESIGN)/$(DESIGN).srcs/sources_1/ip/mig/mig/user_design/rtl/clocking/*.v \ - ./vivado/$(DESIGN)/$(DESIGN).srcs/sources_1/ip/mig/mig/user_design/rtl/controller/*.v \ - ./vivado/$(DESIGN)/$(DESIGN).srcs/sources_1/ip/mig/mig/user_design/rtl/ecc/*.v \ - ./vivado/$(DESIGN)/$(DESIGN).srcs/sources_1/ip/mig/mig/user_design/rtl/ip_top/*.v \ - ./vivado/$(DESIGN)/$(DESIGN).srcs/sources_1/ip/mig/mig/user_design/rtl/phy/*.v \ - ./vivado/$(DESIGN)/$(DESIGN).srcs/sources_1/ip/mig/mig/user_design/rtl/ui/*.v ;\ - vlog -work work $(XILINX_VIVADO)/data/verilog/src/glbl.v ;\ - fi; - if [ -f ./vivado/$(DESIGN)/$(DESIGN).srcs/sources_1/ip/mig/mig/user_design/rtl/axi/*axi_mc.v ]; then \ - vlog -work gaisler ./vivado/$(DESIGN)/$(DESIGN).srcs/sources_1/ip/mig/mig/user_design/rtl/axi/*.v ;\ - fi; -else -# The design.file.property command below is a hack so that the Verilog MIG IP, in (VHDL) -# library gaisler, will find components from unisim. Otherwise errors will be given during -# riviera elaboration. No documentation has been found about this. The command is intended -# to have the same effects as adding libs using: -# -> properties -> Enries -> Libraries - @echo "workspace.open riviera_ws/riviera_ws.rwsp; workspace.design.setactive gaisler" > riviera_ws_add_mig_7series.do - @for f in ./vivado/$(DESIGN)/$(DESIGN).srcs/sources_1/ip/mig/mig/user_design/rtl/mig.v \ - ./vivado/$(DESIGN)/$(DESIGN).srcs/sources_1/ip/mig/mig/user_design/rtl/mig_mig_sim.v \ - ./vivado/$(DESIGN)/$(DESIGN).srcs/sources_1/ip/mig/mig/user_design/rtl/clocking/*.v \ - ./vivado/$(DESIGN)/$(DESIGN).srcs/sources_1/ip/mig/mig/user_design/rtl/controller/*.v \ - ./vivado/$(DESIGN)/$(DESIGN).srcs/sources_1/ip/mig/mig/user_design/rtl/ecc/*.v \ - ./vivado/$(DESIGN)/$(DESIGN).srcs/sources_1/ip/mig/mig/user_design/rtl/ip_top/*.v \ - ./vivado/$(DESIGN)/$(DESIGN).srcs/sources_1/ip/mig/mig/user_design/rtl/phy/*.v \ - ./vivado/$(DESIGN)/$(DESIGN).srcs/sources_1/ip/mig/mig/user_design/rtl/ui/*.v ; do \ - echo "design.file.add .$$f" >> riviera_ws_add_mig_7series.do ; \ - echo "design.file.property " `basename $$f` "compilation/verilog/verilog-libraries \"secureip_ver;secureip;axi_bfm;unisims_ver;unisim;unimacro_ver;unimacro;simprim_ver;simprim;unifast_ver;unifast\"" >> riviera_ws_add_mig_7series.do; \ - done; - @echo "workspace.design.setactive work; design.file.add $(XILINX_VIVADO)/data/verilog/src/glbl.v ; quit" >> riviera_ws_add_mig_7series.do - @vsimsa -quiet -do riviera_ws_add_mig_7series.do -endif -endif -endif - -sgmii_7series: ip_7series_generate compile_xilinx_7series_lib map_xilinx_7series_lib -ifneq ("$(GRLIB_SIMULATOR)","Xilinx") -ifeq ($(CONFIG_GRETH_ENABLE),y) -ifneq ("$(GRLIB_SIMULATOR)","ALDEC_RWS") - if [ -f./vivado/$(DESIGN)/$(DESIGN).srcs/sources_1/ip/sgmii/synth/sgmii.v ]; then \ - vlib modelsim/gig_ethernet_pcs_pma ;\ - vmap -modelsimini ./modelsim.ini gig_ethernet_pcs_pma ./modelsim/gig_ethernet_pcs_pma ;\ - vcom -work gig_ethernet_pcs_pma ./vivado/$(DESIGN)/$(DESIGN).srcs/sources_1/ip/sgmii/hdl/gig_ethernet_pcs_pma*.vhd ;\ - vlog -work work \ - ./vivado/$(DESIGN)/$(DESIGN).srcs/sources_1/ip/sgmii/synth/*.v \ - ./vivado/$(DESIGN)/$(DESIGN).srcs/sources_1/ip/sgmii/synth/*/*.v ;\ - fi; -else - @echo "workspace.open riviera_ws/riviera_ws.rwsp" > riviera_ws_add_sgmii_7series.do - @echo "workspace.design.create gig_ethernet_pcs_pma_v14_3 ." >> riviera_ws_add_sgmii_7series.do - @echo "workspace.design.setactive gig_ethernet_pcs_pma_v14_3" >> riviera_ws_add_sgmii_7series.do - @echo "amap secureip_ver ../xilinx_lib/secureip" >> riviera_ws_add_sgmii_7series.do - @echo "amap secureip ../xilinx_lib/secureip" >> riviera_ws_add_sgmii_7series.do - @echo "amap axi_bfm ../xilinx_lib/secureip" >> riviera_ws_add_sgmii_7series.do - @echo "amap unisims_ver ../xilinx_lib/unisims_ver" >> riviera_ws_add_sgmii_7series.do - @echo "amap unisim ../xilinx_lib/unisim" >> riviera_ws_add_sgmii_7series.do - @echo "amap unimacro_ver ../xilinx_lib/unimacro_ver" >> riviera_ws_add_sgmii_7series.do - @echo "amap unimacro ../xilinx_lib/unimacro" >> riviera_ws_add_sgmii_7series.do - @echo "amap simprim_ver ../xilinx_lib/simprims_ver" >> riviera_ws_add_sgmii_7series.do - @echo "amap unifast_ver ../xilinx_lib/unifast_ver" >> riviera_ws_add_sgmii_7series.do - @echo "amap unifast ../xilinx_lib/unifast_ver" >> riviera_ws_add_sgmii_7series.do - @echo "design.file.add ../vivado/$(DESIGN)/$(DESIGN).srcs/sources_1/ip/sgmii/gig_ethernet_pcs_pma_v14_3/hdl/gig_ethernet_pcs_pma_v14_3_rfs.vhd" >> riviera_ws_add_sgmii_7series.do - @echo "workspace.design.setactive work" >> riviera_ws_add_sgmii_7series.do - - @for f in ./vivado/$(DESIGN)/$(DESIGN).srcs/sources_1/ip/sgmii/synth/*.v \ - ./vivado/$(DESIGN)/$(DESIGN).srcs/sources_1/ip/sgmii/synth/*/*.v ; do \ - echo "design.file.add .$$f" >> riviera_ws_add_mig_7series.do ; \ - echo "design.file.property " `basename $$f` "compilation/verilog/verilog-libraries \"secureip_ver;secureip;axi_bfm;unisims_ver;unisim;unimacro_ver;unimacro;simprim_ver;simprim;unifast_ver;unifast\"" >> riviera_ws_add_mig_7series.do; \ - done; - @echo "quit" >> riviera_ws_add_sgmii_7series.do - @vsimsa -quiet -do riviera_ws_add_sgmii_7series.do -endif -endif -endif - -.PHONY: compile_xilinx_7series_lib map_xilinx_7series_lib mig_7series_generate mig_7series install-simprim compile-simprim compile-xilinxcorelib compile-unisim compile-xilinx-simlibs - -######### Xilinx PlanAhead targets ############ -ifeq ("$(AREA_OPT)","") -AREA_OPT =no -endif -ifeq ("$(PLANAHEAD_SYNTH_FLOW)","") -PLANAHEAD_SYNTH_FLOW="XST 14" -endif -ifeq ("$(PLANAHEAD_SYNTH_STRATEGY)","") -PLANAHEAD_SYNTH_STRATEGY="TimingWithIOBPacking" -#PLANAHEAD_SYNTH_STRATEGY="XST Defaults" -endif -ifeq ("$(PLANAHEAD_IMPL_STRATEGY)","") -PLANAHEAD_IMPL_STRATEGY="ParHighEffort" -endif -AREA_OPT_LW=$(shell echo $(AREA_OPT) | tr '[:upper:]' '[:lower:]') -ifeq ("$(AREA_OPT_LW)","yes") -PLANAHEAD_SYNTH_STRATEGY="AreaReduction" -PLANAHEAD_IMPL_STRATEGY="MapCoverArea" -endif - -## Xilinx planAhead project properties that can be overrideen -ifeq ("$(GRLIB_XIL_PlanAhead_Simulator)","") -ifeq ("$(GRLIB_SIMULATOR)","ModelSim") -GRLIB_XIL_PlanAhead_Simulator=ModelSim -else -GRLIB_XIL_PlanAhead_Simulator=ISim -endif -endif - -#PLANAHEAD_SIMSET=sim_$(DESIGN) -PLANAHEAD_SIMSET=sim_1 - -planahead-launch: planahead/$(TOP)_planAhead.tcl $(VHDLSYNFILES) $(VERILOGSYNFILES) - planAhead -mode gui -source ./planahead/$(TOP)_planAhead.tcl - @if test -r ./planahead/$(DESIGN)/$(DESIGN).runs/impl_1/$(TOP).bit; then \ - cp ./planahead/$(DESIGN)/$(DESIGN).runs/impl_1/$(TOP).bit . ; \ - cp ./planahead/$(DESIGN)/$(DESIGN).runs/impl_1/$(TOP).msk . ; \ - fi; - -planahead: planahead/$(TOP)_planAhead.tcl $(VHDLSYNFILES) $(VERILOGSYNFILES) - planAhead -mode batch -source ./planahead/$(TOP)_planAhead.tcl ./planahead/$(TOP)_planAhead_run.tcl ./planahead/$(TOP)_planAhead_end.tcl - @if test -r ./planahead/$(DESIGN)/$(DESIGN).runs/impl_1/$(TOP).bit; then \ - cp ./planahead/$(DESIGN)/$(DESIGN).runs/impl_1/$(TOP).bit . ; \ - cp ./planahead/$(DESIGN)/$(DESIGN).runs/impl_1/$(TOP).msk . ; \ - fi; - -planahead-clean: - -rm -rf ./planahead planAhead.log planAhead*.jou planAhead*.*.log - -######### Xilinx Vivado targets ############ - -VIVADOVHDL = read_vhdl -library -VIVADOVLOG = read_verilog -library - -VIVADOLIBSKIPX = $(ASICLIBS) $(BRMLIBS) $(ACTELLIBS) $(ALTERALIBS) \ - $(LATTICELIBS) $(COREPCILIB) $(SIMLIBS) -VIVADOLIBSKIP = $(VIVADOLIBSKIPX:%=%|) dware | grdware -VIVADODIRSKIPX = $(ASICLIBS) $(ACTELLIBS) $(ALTERALIBS) $(LATTICELIBS) -VIVADODIRSKIP = $(VIVADODIRSKIPX:%=%|) dware | grdware -VIVADOSKIP = $(VIVADOSKIPX) b1553* | pci_components* | pcicore* | snpsmul.vhd | clkgen_virtex.vhd | \ - memory_virtex.vhd | simple_simprim.vhd | unisim_VCOMP.vhd | unisim_VITAL.vhd | unisim_VPKG.vhd - - -ifeq ("$(VIVADO_SYNTH_FLOW)","") -VIVADO_SYNTH_FLOW=Vivado Synthesis 2012 -endif -ifeq ("$(VIVADO_SYNTH_STRATEGY)","") -VIVADO_SYNTH_STRATEGY=Vivado Synthesis Defaults -endif -ifeq ("$(VIVADO_IMPL_STRATEGY)","") -VIVADO_IMPL_STRATEGY=Vivado Implementation Defaults -endif - -## Xilinx Vivado project properties that can be overrideen -ifeq ("$(GRLIB_XIL_Vivado_Simulator)","") -GRLIB_XIL_Vivado_Simulator=XSim -ifeq ("$(GRLIB_SIMULATOR)","ModelSim") -GRLIB_XIL_Vivado_Simulator=ModelSim -endif -ifeq ("$(GRLIB_SIMULATOR)","ModelSim-PE") -GRLIB_XIL_Vivado_Simulator=ModelSim -endif -ifeq ("$(GRLIB_SIMULATOR)","ModelSim-SE") -GRLIB_XIL_Vivado_Simulator=ModelSim -endif -ifeq ("$(GRLIB_SIMULATOR)","Questa") -GRLIB_XIL_Vivado_Simulator=Questa -endif -ifeq ("$(GRLIB_SIMULATOR)","ALDEC") -GRLIB_XIL_Vivado_Simulator=Riviera -endif -ifeq ("$(GRLIB_SIMULATOR)","ALDEC_RWS") -GRLIB_XIL_Vivado_Simulator=Riviera -endif -endif - -#VIVADO_SIMSET=sim_$(DESIGN) -VIVADO_SIMSET=sim_1 - -vivado-launch: vivado/$(TOP)_vivado.tcl $(VHDLSYNFILES) $(VERILOGSYNFILES) - vivado -mode gui -source ./vivado/$(TOP)_vivado.tcl - @if test -r ./vivado/$(DESIGN)/$(DESIGN).runs/impl_1/$(TOP).bit; then \ - cp ./vivado/$(DESIGN)/$(DESIGN).runs/impl_1/$(TOP).bit . ; \ - cp ./vivado/$(DESIGN)/$(DESIGN).runs/impl_1/$(TOP).msk . ; \ - fi; - -vivado: vivado/$(TOP)_vivado.tcl $(VHDLSYNFILES) $(VERILOGSYNFILES) - vivado -mode batch -source ./vivado/$(TOP)_vivado.tcl ./vivado/$(TOP)_vivado_run.tcl | tee $(TOP)_vivado.log - @if test -r ./vivado/$(DESIGN)/$(DESIGN).runs/impl_1/$(TOP).bit; then \ - cp ./vivado/$(DESIGN)/$(DESIGN).runs/impl_1/$(TOP).bit . ; \ - cp ./vivado/$(DESIGN)/$(DESIGN).runs/impl_1/$(TOP).msk . ; \ - fi; - -vivado-clean: - -rm -rf ./vivado *vivado.log vivado*.jou vivado*.backup.log vivado*.str .Xil .cxl.*.version compile_simlib.log compile_simlib.log.bak xmd.ini xsct.ini - -vivado-detected-prog := $(shell { command -v xsct || command -v xmd; } 2>/dev/null) - -vivado-prog-fpga: - @echo "connect" > ./xsct.ini - @echo "fpga -f ./vivado/$(DESIGN)/$(DESIGN).runs/impl_1/$(TOP).bit" > ./xmd.ini - @echo "exit" >> ./xmd.ini - cat ./xmd.ini >>./xsct.ini - $(vivado-detected-prog) - -vivado-prog-fpga-ref: - @echo "connect" > ./xsct.ini - @echo "fpga -f ./bitfiles/$(TOP).bit" > ./xmd.ini - @echo "exit" >> ./xmd.ini - cat ./xmd.ini >>./xsct.ini - $(vivado-detected-prog) - -######### Altera targets ############ - -install-altera: -ifeq ("$(QUARTUS_ROOTDIR)","") - @echo "QUARTUS_ROOTDIR is not set. Altera library installation failed" -else - @if test -r $(QUARTUS_ROOTDIR)/eda/sim_lib/altera_primitives.vhd; then \ - echo installing tech/altera ;\ - cp $(QUARTUS_ROOTDIR)/eda/sim_lib/altera_primitives*.vhd $(GRLIB)/lib/tech/altera/simprims ;\ - else echo skipping tech/altera; fi ; \ - if test -r $(QUARTUS_ROOTDIR)/eda/sim_lib/altera_mf_components.vhd; then \ - echo installing tech/altera_mf ;\ - cp $(QUARTUS_ROOTDIR)/eda/sim_lib/altera_mf*.vhd $(GRLIB)/lib/tech/altera_mf/simprims ;\ - cat $(GRLIB)/bin/altera/altera_mf.vhd >> $(GRLIB)/lib/tech/altera_mf/simprims/altera_mf.vhd ;\ - else echo skipping tech/altera_mf; fi ; \ - if test -r $(QUARTUS_ROOTDIR)/eda/sim_lib/cycloneiii_atoms.vhd; then \ - echo installing tech/cycloneiii ;\ - cp $(QUARTUS_ROOTDIR)/eda/sim_lib/cycloneiii_*.vhd $(GRLIB)/lib/tech/cycloneiii/simprims ;\ - else echo skipping tech/cycloneiii - not supported by Quartus II version; fi ; \ - if test -r $(QUARTUS_ROOTDIR)/eda/sim_lib/stratixii_atoms.vhd; then \ - echo installing tech/stratixii ;\ - cp $(QUARTUS_ROOTDIR)/eda/sim_lib/stratixii_*.vhd $(GRLIB)/lib/tech/stratixii/simprims ;\ - else echo skipping tech/stratixii - not supported by Quartus II version; fi ; \ - if test -r $(QUARTUS_ROOTDIR)/eda/sim_lib/stratixiii_atoms.vhd; then \ - echo installing tech/stratixii ;\ - cp $(QUARTUS_ROOTDIR)/eda/sim_lib/stratixiii_*.vhd $(GRLIB)/lib/tech/stratixiii/simprims ;\ - else echo skipping tech/stratixiii - not supported by Quartus II version; fi ; \ - echo Altera library installation completed. -endif - -remove-altera: - -@rm $(GRLIB)/lib/tech/altera/simprims/altera_primitives*.vhd \ - $(GRLIB)/lib/tech/altera_mf/simprims/altera_mf*.vhd \ - $(GRLIB)/lib/tech/cycloneiii/simprims/cycloneiii_*.vhd \ - $(GRLIB)/lib/tech/stratixii/simprims/stratixii_*.vhd \ - $(GRLIB)/lib/tech/stratixiii/simprims/stratixiii_*.vhd - @echo Altera libraries removed from GRLIB - -######### Altera Quartus targets ############ - -#ifeq ("$(QUARTUS_ROOTDIR)","") -QUARTUS_CDB = quartus_cdb $(QUARTUSOPT) -QUARTUS_MAP = quartus_map $(QUARTUSOPT) -QUARTUS_FIT = quartus_fit $(QUARTUSOPT) -QUARTUS_ASM = quartus_asm $(QUARTUSOPT) -QUARTUS_STA = quartus_sta $(QUARTUSOPT) -QUARTUS_PGM = quartus_pgm $(QUARTUSOPT) -QUARTUS_SH = quartus_sh $(QUARTUSOPT) -#else -#QUARTUS_MAP = $(QUARTUS_ROOTDIR)/bin/quartus_map -#QUARTUS_FIT = $(QUARTUS_ROOTDIR)/bin/quartus_fit -#QUARTUS_ASM = $(QUARTUS_ROOTDIR)/bin/quartus_asm -#QUARTUS_STA = $(QUARTUS_ROOTDIR)/bin/quartus_tan -#endif -ALTCABLE ?= USB-Blaster -QLIBSKIPX = $(SIMLIBS) $(ASICLIBS) $(BRMLIBS) $(ACTELLIBS) $(XILINXLIBS) \ - $(LATTICELIBS) $(COREPCILIB) -QUARTUSLIBSKIP = $(QLIBSKIPX:%=%|) dware -QDIRSKIPX = $(ASICLIBS) $(ACTELLIBS) $(XILINXLIBS) $(LATTICELIBS) -QDIRSKIP = $(QDIRSKIPX:%=%|) dware | satcan | leon2ft -QUARTUSSKIP = b1553* | pci_components* | pcicore* | snpsmul.vhd - -quartus-vqm: - -@case $(TECHNOLOGY) in \ - CYCLONEII) \ - cp $(GRLIB)/netlists/altera/cyclone2/*.vqm . ;;\ - CYCLONEIII) \ - cp $(GRLIB)/netlists/altera/cyclone3/*.vqm . ;;\ - CYCLONEIV) \ - cp $(GRLIB)/netlists/altera/cyclone3/*.vqm . ;;\ - CYCLONEIV-E) \ - cp $(GRLIB)/netlists/altera/cyclone3/*.vqm . ;;\ - CYCLONEV) \ - cp $(GRLIB)/netlists/altera/cyclone5/*.vqm . ;;\ - STRATIXV) \ - cp $(GRLIB)/netlists/altera/stratix5/*.vqm . ;;\ - STRATIXIV) \ - cp $(GRLIB)/netlists/altera/stratix4/*.vqm . ;;\ - STRATIXIII) \ - cp $(GRLIB)/netlists/altera/stratix3/*.vqm . ;;\ - STRATIXII) \ - cp $(GRLIB)/netlists/altera/stratix2/*.vqm . ;;\ - esac - -quartus: quartus-vqm - make quartus-map quartus-route - -quartus-synp: $(TOP)_synplify.prj synplify/$(TOP).edf quartus-vqm - @-cp synplify/*.hex . - $(QUARTUS_MAP) --import_settings_files=on --export_settings_files=off $(TOP)_synplify -c $(TOP)_synplify - $(if $(strip $(QSF_NEXT)),$(QUARTUS_SH) -t $(QSF_NEXT) quartus_map $(TOP)_synplify $(TOP)_synplify,) - $(QUARTUS_CDB) --merge $(TOP)_synplify - $(QUARTUS_FIT) --import_settings_files=off --export_settings_files=off $(TOP)_synplify -c $(TOP)_synplify - $(if $(strip $(QSF_NEXT)),$(QUARTUS_SH) -t $(QSF_NEXT) quartus_fit $(TOP)_synplify $(TOP)_synplify,) - $(QUARTUS_ASM) --import_settings_files=off --export_settings_files=off $(TOP)_synplify -c $(TOP)_synplify - $(if $(strip $(QSF_NEXT)),$(QUARTUS_SH) -t $(QSF_NEXT) quartus_asm $(TOP)_synplify $(TOP)_synplify,) - $(QUARTUS_STA) $(TOP)_synplify - -quartus-launch: $(TOP)_quartus.qsf quartus-vqm - quartus $(TOP)_quartus.qpf - -quartus-launch-synp: $(TOP)_synplify.prj synplify/$(TOP).edf quartus-vqm - quartus $(TOP)_synplify.qpf - -quartus-map: $(TOP)_quartus.qsf quartus-vqm - $(QUARTUS_MAP) --import_settings_files=on --export_settings_files=off $(TOP)_quartus -c $(TOP)_quartus - $(if $(strip $(QSF_NEXT)),$(QUARTUS_SH) -t $(QSF_NEXT) quartus_map $(TOP)_quartus $(TOP)_quartus,) - -quartus-route: $(TOP)_quartus.qsf - $(QUARTUS_CDB) --merge $(TOP)_quartus - $(QUARTUS_FIT) --import_settings_files=off --export_settings_files=off $(TOP)_quartus -c $(TOP)_quartus - $(if $(strip $(QSF_NEXT)),$(QUARTUS_SH) -t $(QSF_NEXT) quartus_fit $(TOP)_quartus $(TOP)_quartus,) - $(QUARTUS_ASM) --import_settings_files=off --export_settings_files=off $(TOP)_quartus -c $(TOP)_quartus - $(if $(strip $(QSF_NEXT)),$(QUARTUS_SH) -t $(QSF_NEXT) quartus_asm $(TOP)_quartus $(TOP)_quartus,) - $(QUARTUS_STA) $(TOP)_quartus - -quartus-prog-fpga: - $(QUARTUS_PGM) -c $(ALTCABLE) -m JTAG -o p\;$(TOP)_quartus.sof - -quartus-prog-fpga-ref: - cp bitfiles/$(TOP)_quartus.sof $(TOP)_ref.sof - $(QUARTUS_PGM) -c $(ALTCABLE) -m JTAG -o p\;$(TOP)_ref.sof - -quartus-srec: - $(QUARTUS_PGM) - -quartus-clean: - -rm -rf db *.syr *.qws automake.log dumpdata.txt \ - *.rpt *.done *.eqn *.pof *.summary *.ttf *.pin *.sof \ - *.jam *.jbc cmp_state.ini simulation undo_redo.txt *.vqm *.qdf \ - *.csf *.psf *.quartus *.smsg .undefinedlib .jaguarc .unorderedFilePath \ - incremental_db PLLJ_PLLSPE_INFO.txt *.jdi $(TOP)_quartus.sld - -######## Synplify targets ######################## - -SYNPVHDL = add_file -vhdl -lib -SYNPVLOG = add_file -verilog -SYNPLIBSKIP = $(ASICLIBS) -XSYNPLIBSKIP = $(SYNPLIBSKIP:%=%|) dummy -XSYNPDIRSKIP = $(SYNPLIBSKIP:%=%|) dummy - -SYNPSKIP = snpsmul.vhd - -SYNPLIFY = synplify_pro - - -synplify synplify-map: $(TOP)_synplify.prj synplify/$(TOP).edf - -synplify-launch: $(TOP)_synplify.prj - $(SYNPLIFY) $(TOP)_synplify.prj && \ - if test -r synplify//$(TOP).edn; then \ - echo "GRLIB: Detected synplify/$(TOP).edn, copying to synplify/$(TOP).edf"; \ - cp synplify/$(TOP).edn synplify/$(TOP).edf; \ - fi & - -@mkdir synplify>& tmp.err; touch synplify/dummy.mif - -@mv synplify/*.mif . - -synplify/$(TOP).edf: $(VHDLSYNFILES) $(VERILOGSYNFILES) - $(SYNPLIFY) -batch $(TOP)_synplify.prj - @touch synplify/dummy.mif - -@mv synplify/*.mif . - @if test -r synplify/$(TOP).edn; then \ - echo "GRLIB: Detected synplify/$(TOP).edn, copying to synplify/$(TOP).edf"; \ - cp synplify/$(TOP).edn synplify/$(TOP).edf; \ - fi; - -$(TOP)_synplify.prj: compile.synp - @echo source compile.synp > $(TOP)_synplify.prj - @for i in $(VERILOGOPTSYNFILES) $(VERILOGSYNFILES); do \ - if test -r $$i; then \ - echo add_file "-verilog -lib work" $$i >> $(TOP)_synplify.prj; \ - fi; \ - done - @for i in $(VHDLOPTSYNFILES) $(VHDLSYNFILES); do \ - if test -r $$i; then \ - echo add_file "-vhdl -lib work" $$i >> $(TOP)_synplify.prj; \ - fi; \ - done - @if test -r $(GRLIB)/netlists/xilinx/$(NETLISTTECH)/edifsyn.txt; then \ - for q in `cat $(GRLIB)/netlists/xilinx/$(NETLISTTECH)/edifsyn.txt`; do \ - if test -r $(GRLIB)/netlists/xilinx/$(NETLISTTECH)/$$q; then \ - echo add_file -edif $(GRLIB)/netlists/xilinx/$(NETLISTTECH)/$$q >> $(TOP)_synplify.prj ; \ - fi; \ - done; \ - fi - @for i in $(SDCFILE); do echo add_file "-constraint " $$i >> $(TOP)_synplify.prj; done - @for i in $(FDCFILE); do echo add_file "-fpga_constraint " $$i >> $(TOP)_synplify.prj; done - @cat $(GRLIB)/bin/synplify.prj | sed -e s/TOP/$(TOP)/ \ - -e s/TECHNOLOGY/$(TECHNOLOGY)/ \ - -e s/PART/$(PART)/ -e s/SPEED/$(SPEED)/ -e s/SYNFREQ/$(SYNFREQ)/ >> $(TOP)_synplify.prj -ifneq ("$(PACKAGE)","") - @echo set_option -package $(PACKAGE) >> $(TOP)_synplify.prj -endif -ifneq ("$(SYNPVLOGDEFS)","") - @echo set_option -hdl_define -set \"$(SYNPVLOGDEFS)\" >> $(TOP)_synplify.prj -endif -ifneq ("$(SYNPVLOGINC)","") - @echo set_option -include_path \"$(SYNPVLOGINC)\" >> $(TOP)_synplify.prj -endif -ifneq ("$(SYNPVLOGSTD)","") - @echo set_option -vlog_std \"$(SYNPVLOGSTD)\" >> $(TOP)_synplify.prj -endif - @echo $(SYNPOPT) >> $(TOP)_synplify.prj - @echo impl -active \"synplify\" >> $(TOP)_synplify.prj - -synplify-clean: - -rm -rf synplify *.prd stdout.log *.mif syntmp.* synplify_* \ - $(TOP).map $(TOP)_summary.xml synlog.tcl - -######## Precision targets ######################## - -PRECLIBSKIPX = $(SIMLIBS) $(ASICLIBS) -PRECLIBSKIP = $(PRECLIBSKIPX:%=%|) dware -PRECDIRSKIP = $(PRECLIBSKIPX:%=%|) dware -PRECSKIP = dummy - - -PRECISION=precision - -precision precision-map: $(TOP)_precision.tcl $(TOP).psp precision/$(TOP).edf - -$(TOP).psp: $(TOP)_precision.tcl - $(PRECISION) -shell $(PRECISIONOPT) -file $(TOP)_precision.tcl - -precision-launch: $(TOP).psp - $(PRECISION) $(PRECISIONOPT) -project $(TOP).psp - -precision/$(TOP).edf: $(TOP)_precision.tcl $(VHDLSYNFILES) $(VERILOGSYNFILES) - $(PRECISION) -shell $(PRECISIONOPT) -file $(TOP)_precrun.tcl - -precision-clean: - -rm -rf *.psp stdout.log prec.log $(TOP)_prec* precision* $(TOP)_temp* - -######### DARE targets ############### - -ifneq ("$(GRLIB)","") --include $(GRLIB)/bin/Makefile.dare -endif - -remove-dare: - -@rm -r $(GRLIB)/lib/tech/dare/components/*.v - @echo "" > $(GRLIB)/lib/tech/dare/components/vlogsim.txt - -######### Microsemi targets ############### -PROASIC3LIBS = proasic3 proasic3e proasic3l -XLIBEROLIBSKIP = $(ASICLIBS) $(LATTICELIBS) $(GLS_LIBS) \ - $(ALTERALIBS) $(XILINXLIBS) $(PROASIC3LIBS) fusion smartfusion2 axcelerator rtg4 polarfire -LIBEROLIBSKIP = $(XLIBEROLIBSKIP:%=%|) dummy -LIBERODIRSKIPX = $(ASICLIBS) $(XILINXLIBS) $(ALTERALIBS) $(LATTICELIBS) -LIBERODIRSKIP = $(LIBERODIRSKIPX:%=%|) dummy -LIBEROSKIP = dummy - -ifeq ("$(TECHNOLOGY)","RTG4") -LIBEROPRECOMPLIBDIR=rtg4 -else ifeq ("$(TECHNOLOGY)","ProASIC3L") -LIBEROPRECOMPLIBDIR=proasic3l -else ifeq ("$(TECHNOLOGY)","ProASIC3") -LIBEROPRECOMPLIBDIR=proasic3 -else ifeq ("$(TECHNOLOGY)","ProASIC3E") -LIBEROPRECOMPLIBDIR=proasic3e -else ifeq ("$(TECHNOLOGY)","IGLOO2") -LIBEROPRECOMPLIBDIR=smartfusion2 -else ifeq ("$(TECHNOLOGY)","PolarFire") -LIBEROPRECOMPLIBDIR=polarfire -else -LIBEROPRECOMPLIBDIR=smartfusion2 -endif - -LIBERO = libero - -# DESIGNER_LAYOUT_OPT can be overridden i template design Makefile -ifeq ("$(DESIGNER_LAYOUT_OPT)","") -ifeq ("$(TECHNOLOGY)","Axcelerator") -DESIGNER_LAYOUT_OPT=-effort_level 5 -timing_driven -incremental \"OFF\" -else -DESIGNER_LAYOUT_OPT=-timing_driven -incremental \"OFF\" -endif -endif - -ifeq ("$(DESIGNER_TECHNOLOGY)","") -DESIGNER_TECHNOLOGY=$(TECHNOLOGY) -endif - -ifeq ("$(DESIGNER_PART)","") -DESIGNER_PART=$(PART) -endif - -ifeq ("$(DESIGNER_RESTRICTPROBEPINS)","") -DESIGNER_RESTRICTPROBEPINS=1 -endif - -ifeq ("$(DESIGNER_RTG4_SET_MITIGATION)","") -DESIGNER_RTG4_SET_MITIGATION=unassigned -endif - - -ifneq ("$(GRLIB)","") --include $(GRLIB)/bin/Makefile.microsemi -endif - -actel-clean: - -rm -rf *.adb report*.log ./actel hdl constraint \ - actgen constraint designer package phy_synthesis simulation \ - smartgen stimulus synthesis viewdraw libero x $(TOP)_libero.prj \ - libero_sim_files libero_syn_files coreconsole \ - libero.do component *.pdb *.pdb.depends *.stp \ - *.sdb *_layout.log *.dtf from.ufc from.mem \ - $(TOP)_libero.prjx tooldata $(TOP)_libero.tcl $(TOP)_libero/ \ - $(TOP)_libero_genbit.tcl $(TOP)_libero_progfpga.tcl - -remove-microsemi: remove-microsemi-precomp - -@for i in fusion proasic3 proasic3e proasic3l axcelerator smartfusion2 rtg4 polarfire; do \ - rm $(GRLIB)/lib/tech/$$i/components/$$i.v* ; \ - done - -remove-microsemi-precomp: - -@rm -r $(GRLIB)/lib/tech/smartfusion2/precomp_libraries/smartfusion2 - -@rm -r $(GRLIB)/lib/tech/rtg4/precomp_libraries/rtg4 - -@rm -r $(GRLIB)/lib/tech/polarfire/precomp_libraries/polarfire - -############ Synopsys ######################## - -install-gtech: - @echo GTECH source path: $(SNPS_HOME)/packages/gtech/src; \ - if test -r $(SNPS_HOME)/packages/gtech/src; then \ - cp $(SNPS_HOME)/packages/gtech/src/*.vhd $(GRLIB)/lib/tech/gtech/simprims; \ - fi - -remove-gtech: - @-rm $(GRLIB)/lib/tech/gtech/simprims/*.vhd - - -############ Synopsys DC targets ######################## - -DCVHDL = analyze -f VHDL -library -DCVLOG = analyze -f VERILOG -library -FMVHDL = read_vhdl -r -libname -FMVLOG = read_verilog -r -libname -ifeq ("$(DCSCRIPT)","") -DCSCRIPT=$(TOP)_dc.tcl -endif -ifeq ("$(FMSCRIPT)","") -FMSCRIPT=$(TOP)_fm.tcl -endif -DCLIBSKIP = $(FPGALIBS) corePCIF -DCDIRSKIP = $(FPGALIBS) corePCIF pci/pcif -#DCDIRSKIP = corePCIF pcif -XDCLIBSKIP = $(DCLIBSKIP:%=% | ) dummy -XDCDIRSKIP = $(DCDIRSKIP:%=% | ) dummy -DCSKIP = $(DCLIBSKIP:%=*_%.vhd | ) dummy - -dc-launch: $(TOP)_dc.tcl - @-mkdir -p synopsys - design_compiler& - -dc: $(TOP)_dc.tcl - @-mkdir -p synopsys - dc_shell-xg-t $(DCOPT) -f $(DCSCRIPT) | tee $(DCSCRIPT).log - -fm: $(TOP)_dc.tcl - @-mkdir -p synopsys - fm_shell $(FMOPT) -f $(FMSCRIPT) | tee $(FMSCRIPT).log - -$(TOP)_dc.tcl: compile.dc - @cp $(GRLIB)/bin/top.dc $(TOP)_dc.tcl - @for i in $(VERILOGOPTSYNFILES) $(VERILOGSYNFILES); do \ - if test -r $$i; then \ - echo $(DCVLOG) work $$i >> $(TOP)_dc.tcl; \ - echo $(FMVLOG) work $$i >> fmref.tcl; \ - fi; \ - done - @for i in $(VHDLOPTSYNFILES) $(VHDLSYNFILES); do \ - if test -r $$i; then \ - echo $(DCVHDL) work $$i >> $(TOP)_dc.tcl; \ - echo $(FMVHDL) work $$i >> fmref.tcl; \ - fi; \ - done - @echo elaborate $(TOP) >> $(TOP)_dc.tcl - -dc-clean: - -rm -rf synopsys view_command.log command.log dumpdata.txt filenames.log \ - dc.log dwsvf* alib* $(TOP)_dc.tcl fmref.tcl fm_shell_command.log \ - formality*.log *.svf $(DCSCRIPT).log $(DCSCRIPT).log.swp FM_WORK $(FMSCRIPT).log formality_svf *.mr *.pvl \ - ARCH ENTI PACK *.log.swp - -############ Cadence RTL Compiler ######################## - -RTLCVHDL = read_hdl -vhdl -lib -RTLCVLOG = read_hdl -RCSCRIPT=$(TOP).rc - -NCVHDL = ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work -NCVLOG = ncvlog -nowarn DLCPTH -nocopyright -linedebug $(NCVLOGOPT) -work - -rc: $(TOP).rc - -mkdir rtlc - rc -files $(RCSCRIPT) - -$(TOP).rc: compile.rc - @cp $(GRLIB)/bin/top.rc $(TOP).rc - @for i in $(VHDLOPTSYNFILES) $(VHDLSYNFILES); do \ - if test -r $$i; then \ - echo "read_hdl -vhdl -lib work" $$i >> $(TOP).rc; \ - fi; \ - done -# @for i in $(VERILOGOPTSYNFILES) $(VERILOGSYNFILES); do echo "read_hdl " $$i >> $(TOP).rc; done - @echo elaborate $(TOP) >> $(TOP).rc - -rc-clean: - -rm -rf rtlc rc.log rc.cmd - - -######### NanoXplore targets ############ - -install-nxlibrary: -ifeq ("$(NANOXLIBPATH)","") - @echo "NANOXLIBPATH is not set. NanoXplore library installation failed" -else - -@cp $(NANOXLIBPATH)/nxLibrary.vhdp $(GRLIB)/lib/tech/nx/components/nxLibrary.vhdp - -@cp $(NANOXLIBPATH)/nxLibrary.vhdp $(GRLIB)/lib/tech/nx/components/nxLibrary-Medium.vhdp - -@cp $(NANOXLIBPATH)/nxLibrary.vhdp $(GRLIB)/lib/tech/nx/components/nxLibrary-Large.vhdp - @echo "NanoXplore library installed in GRLIB" -endif - -remove-nxlibrary: - -@rm $(GRLIB)/lib/tech/nx/components/nxLibrary.vhdp - -@rm $(GRLIB)/lib/tech/nx/components/nxLibrary-Medium.vhdp - -@rm $(GRLIB)/lib/tech/nx/components/nxLibrary-Large.vhdp - @echo "NanoXplore libraries removed from GRLIB" - - -ifeq ("$(TIMING_DRIVEN)","") -TIMING_DRIVEN=No -endif -ifeq ("$(MAPPING_EFFORT)","") -MAPPING_EFFORT=High -endif - -#Generate project file -nanoxmap-gen: $(TOP)_nanoxmap.py - nxpython $(TOP)_nanoxmap.py -#Launch NanoXmap GUI on the project file -nanoxmap-launch: nanoxmap-gen - nxmap $(TOP)_native.nym -#Synthetize, place, route and generate bitstream in batch mode using NanoXpython -nanoxpython: nanoxmap-gen - nxpython $(TOP)_nanoxpython.py - -#Load the generated bitstream into the chip of the current board, using the JTAG interface. -nx-prog-fpga: - nxbase2_cli -i -c "chip bitstream load $(TOP)_bitfile.nxb" - -#Write the generate bitstream into the SPI flash daughter board and validate the memory content -nx-prog-prom: - nxbase2_cli -i -c "board spi flash program $(TOP)_bitfile.nxb" -c "board spi flash validate $(TOP)_bitfile.nxb" - -nanoxmap-clean: - rm -rf logs *.nxm *.nym __pycache__ _preMap.vhd *.pyc *.nxb $(TOP)_nanoxmap.py $(TOP)_nanoxpython.py $(TOP)_generated_pads.py - -######### Generic simulation target ############### - -ifeq ("$(GRLIB_SIMULATOR)", "ALDEC") -SIM=riviera -else -SIM=vsim -endif - -sim: - make $(SIM) - -sim-run: - make $(SIM)-run - -sim-launch: - make $(SIM)-launch - - -########## Gate lavel simulation targets ############### -GLS_LIBS = $(GLS_NETLIST) $(GLS_POSTSIM) - -gls-setup-lib: - vlib modelsim/$(GLS_NETLIST); vmap $(GLS_NETLIST) modelsim/$(GLS_NETLIST) - vlib modelsim/$(GLS_POSTSIM); vmap $(GLS_POSTSIM) modelsim/$(GLS_POSTSIM) - -gls-setup-dir: - @mkdir -p $(EXTRALIBS)/$(GLS_NETLIST); touch $(EXTRALIBS)/$(GLS_NETLIST)/dirs.txt; - @mkdir -p $(EXTRALIBS)/$(GLS_POSTSIM); touch $(EXTRALIBS)/$(GLS_POSTSIM)/dirs.txt; - -########## Generation of compile scripts ############### -prereqtools:= $(shell (export GRLIB=$(GRLIB) TOP=$(TOP) && tclsh $(GRLIB)/bin/scriptgen/dependencies.tcl)) - -targettools:= $(shell (export GRLIB=$(GRLIB) TOP=$(TOP) && tclsh $(GRLIB)/bin/scriptgen/targets.tcl)) - -empty:= -s:= $(empty) $(empty) -u:= | - -scripts: $(prereqtools) - -$(targettools): scriptgendone - -VARIABLE_LIST := $(shell cat $(GRLIB)/bin/scriptgen/scriptgen_variables.txt) - -scriptgen_variable_values.tcl: - @rm -f scriptgen_variable_values.tcl - @touch scriptgen_variable_values.tcl - @$(foreach v,$(VARIABLE_LIST), echo set $(v) {$(subst $(u),$(s),$($(v)))} >> scriptgen_variable_values.tcl ;) - -scriptgendone: scriptgen_variable_values.tcl - @printf "$(shell export GRLIB=$(GRLIB) OS=$(OS) && tclsh $(GRLIB)/bin/scriptgen/main.tcl)" - - - -######## Common cleaning #################### - -work-clean: $(CLEAN) vsim-clean ise-clean ncsim-clean ghdl-clean synplify-clean quartus-clean \ - actel-clean dc-clean rc-clean isp-clean precision-clean vsimsa-clean avhdl-clean \ - vivado-clean planahead-clean riviera-clean fpro-clean vcs-clean nanoxmap-clean - -rm -rf verilog.txt tkparse.exe main.tk ahbrom outdata ahbrom.bin - -scripts-clean: - -rm -rf compile\.* libs.txt $(TOP)_quartus.qsf $(TOP)_synplify.qsf *.qpf ghdl.path \ - compile\.* libs.do make\.* *.xst $(TOP)*_files.prj cds.lib *.npl $(TOP)_ise.tcl \ - .config.old hdl.var $(TOP)_dc.tcl $(TOP).rc \ - $(TOP)_synplify.prj $(SIMTOP).mpf \ - $(TOP)_designer.tcl $(TOP)_designer_act.tcl \ - modelsim.ini modelsim.ini.bak \ - alibs.do avhdl.tcl riviera_ws_create.do $(EXTRACLEAN) \ - make.ghdl simulation vivado scriptgendone scriptgen_variable_values.tcl - -scriptgen-clean: - -rm -rf scriptgenwork - -clean distclean: $(CLEAN) work-clean scripts-clean clean-xilinx-lib scriptgen-clean - -libclean: remove-alera remove-unisim remove-microsemi remove-dare remove-nxlibrary - -none-clean: - -######## xconfig targets #################### - -ifneq ($(CURLIB), $(GRLIB)) - include $(GRLIB)/bin/Makefile.config -endif - -TKCONFIG= $(GRLIB)/bin/tkconfig - -tkparse.o: $(TKCONFIG)/tkparse.c - $(CC) -g -c $< - -tkcond.o: $(TKCONFIG)/tkcond.c - $(CC) -g -c $< - -tkgen.o: $(TKCONFIG)/tkgen.c - $(CC) -g -c $< - - -tkparse.exe: tkparse.o tkcond.o tkgen.o - $(CC) -g tkparse.o tkcond.o tkgen.o -o tkparse.exe - -lconfig.tk: config.in $(CONFDEP) $(HELPDEP) - make main.tk - cat $(TKCONFIG)/header.tk main.tk $(TKCONFIG)/tail.tk > lconfig.tk - chmod a+x lconfig.tk - -main.tk : config.in tkparse.exe $(CONFDEP) $(HELPDEP) - ./tkparse.exe config.in $(GRLIB) $(EXTRALIBS) > main.tk - -$(GRLIB)/bin/Makefile.config: - make -C $(GRLIB) -f bin/Makefile cfgdep - -xconfig: lconfig.tk $(GRLIB)/bin/Makefile.config - @if test -r "/usr/bin/wish84.exe"; then /usr/bin/wish84.exe -f lconfig.tk; \ - else \ - if test -r "/mingw/bin/wish84.exe"; then \ - if !(test -r "/mingw/bin/echo.bat"); then \ - cp $(GRLIB)/bin/echo.bat /mingw/bin/echo.bat; \ - fi; \ - if !(test -r "/mingw/bin/wish"); then \ - cp $(GRLIB)/bin/wish /mingw/bin/wish; \ - fi; \ - fi; \ - unset LD_LIBRARY_PATH ; \ - wish -f lconfig.tk; \ - fi; \ - if test $$? = "2" ; then \ - cpp -P -DGRLIB_PATH=$(GRLIB) config.vhd.in > config.vhd; \ - echo config.vhd created; \ - fi - -xdep: - cpp -P -DGRLIB_PATH=$(GRLIB) config.vhd.in > config.vhd - -boardconfig: - cp $(GRLIB)/boards/$(BOARD)/config .config - cp $(GRLIB)/boards/$(BOARD)/config.h config.h - make xdep - -oldconfig: lconfig.tk $(GRLIB)/bin/Makefile.config - @if test -r "/usr/bin/wish84.exe"; then /usr/bin/wish84.exe -f lconfig.tk -regen; \ - else \ - if test -r "/mingw/bin/wish84.exe"; then \ - if !(test -r "/mingw/bin/echo.bat"); then \ - cp $(GRLIB)/bin/echo.bat /mingw/bin/echo.bat; \ - fi; \ - if !(test -r "/mingw/bin/wish"); then \ - cp $(GRLIB)/bin/wish /mingw/bin/wish; \ - fi; \ - fi; \ - unset LD_LIBRARY_PATH ; \ - wish -f lconfig.tk -regen; \ - fi; \ - if test $$? = "2" ; then \ - cpp -P -DGRLIB_PATH=$(GRLIB) config.vhd.in > config.vhd; \ - echo config.vhd recreated from .config; \ - fi - -.PHONY: xst precision synplify scripts bitfiles planahead planahead-launch vivado vivado-launch - - - -############ Maintenance - do not remove! ################## - -cfgdep: - @printf "CONFDEP = " > bin/Makefile.config - @for i in `find lib -name '*.in' -print | grep -v vhd | xargs`; do \ - echo -n '$$(GRLIB)'/$$i >> bin/Makefile.config ; \ - printf " \\" >> bin/Makefile.config ; \ - printf "\n" >> bin/Makefile.config ; \ - done; - @printf " \n" >> bin/Makefile.config - @printf "HELPDEP = " >> bin/Makefile.config - @for i in `find lib -name '*.in.help' -print | xargs`; do \ - echo -n '$$(GRLIB)'/$$i >> bin/Makefile.config ; \ - printf " \\" >> bin/Makefile.config ; \ - printf "\n" >> bin/Makefile.config ; \ - done; - @printf " \n" >> bin/Makefile.config - - -ifneq ("$(GRLIB)","") --include $(GRLIB)/bin/Makefile.dist --include $(GRLIB)/bin/Makefile.test -endif diff --git a/grlib-original/bin/Makefile.config b/grlib-original/bin/Makefile.config deleted file mode 100644 index e4bf07fa9..000000000 --- a/grlib-original/bin/Makefile.config +++ /dev/null @@ -1,143 +0,0 @@ -CONFDEP = $(GRLIB)/lib/testgrouppolito/pr/pr.in \ -$(GRLIB)/lib/grlib/util/debug.in \ -$(GRLIB)/lib/grlib/amba/amba.in \ -$(GRLIB)/lib/esa/memoryctrl/mctrl.in \ -$(GRLIB)/lib/esa/pci/pci_arb.in \ -$(GRLIB)/lib/gaisler/leon3/leon3.in \ -$(GRLIB)/lib/gaisler/leon3/l3stat.in \ -$(GRLIB)/lib/gaisler/can/can_oc.in \ -$(GRLIB)/lib/gaisler/can/grcan.in \ -$(GRLIB)/lib/gaisler/can/can_mc.in \ -$(GRLIB)/lib/gaisler/spacewire/router.in \ -$(GRLIB)/lib/gaisler/spacewire/spacewire.in \ -$(GRLIB)/lib/gaisler/usb/grusb_dcl.in \ -$(GRLIB)/lib/gaisler/usb/grusbdc.in \ -$(GRLIB)/lib/gaisler/usb/grusbhc.in \ -$(GRLIB)/lib/gaisler/pci/pcitrace/pcitrace.in \ -$(GRLIB)/lib/gaisler/pci/grpci2/grpci2.in \ -$(GRLIB)/lib/gaisler/pci/grpci1/pci_mtf.in \ -$(GRLIB)/lib/gaisler/pci/grpci1/pci_target.in \ -$(GRLIB)/lib/gaisler/pci/grpci1/pci.in \ -$(GRLIB)/lib/gaisler/pci/grpci1/pcidma.in \ -$(GRLIB)/lib/gaisler/misc/svgactrl.in \ -$(GRLIB)/lib/gaisler/misc/ps2.in \ -$(GRLIB)/lib/gaisler/misc/ahbstat.in \ -$(GRLIB)/lib/gaisler/misc/gptimer.in \ -$(GRLIB)/lib/gaisler/misc/ahbrom.in \ -$(GRLIB)/lib/gaisler/misc/grversion.in \ -$(GRLIB)/lib/gaisler/misc/grgpio2.in \ -$(GRLIB)/lib/gaisler/misc/ftahbram.in \ -$(GRLIB)/lib/gaisler/misc/gracectrl.in \ -$(GRLIB)/lib/gaisler/misc/grgpio.in \ -$(GRLIB)/lib/gaisler/misc/ps2vga.in \ -$(GRLIB)/lib/gaisler/misc/ahbram.in \ -$(GRLIB)/lib/gaisler/misc/grsysmon.in \ -$(GRLIB)/lib/gaisler/pcie/pcie.in \ -$(GRLIB)/lib/gaisler/gr1553b/gr1553b.in \ -$(GRLIB)/lib/gaisler/gr1553b/gr1553b_2.in \ -$(GRLIB)/lib/gaisler/noelv/noelv.in \ -$(GRLIB)/lib/gaisler/uart/dcom.in \ -$(GRLIB)/lib/gaisler/uart/uart1.in \ -$(GRLIB)/lib/gaisler/uart/uart2.in \ -$(GRLIB)/lib/gaisler/leon5/leon5.in \ -$(GRLIB)/lib/gaisler/leon5/debug5.in \ -$(GRLIB)/lib/gaisler/jtag/bscan.in \ -$(GRLIB)/lib/gaisler/jtag/jtag.in \ -$(GRLIB)/lib/gaisler/jtag/jtag2.in \ -$(GRLIB)/lib/gaisler/spi/spimctrl.in \ -$(GRLIB)/lib/gaisler/spi/spi2ahb.in \ -$(GRLIB)/lib/gaisler/spi/spictrl.in \ -$(GRLIB)/lib/gaisler/i2c/i2cslv.in \ -$(GRLIB)/lib/gaisler/i2c/i2c.in \ -$(GRLIB)/lib/gaisler/i2c/i2c2ahb.in \ -$(GRLIB)/lib/gaisler/irqmp/irqmp.in \ -$(GRLIB)/lib/gaisler/subsys/leon_dsu_stat_base.in \ -$(GRLIB)/lib/gaisler/net/edcl.in \ -$(GRLIB)/lib/gaisler/leon4/l4stat.in \ -$(GRLIB)/lib/gaisler/leon4/leon4.in \ -$(GRLIB)/lib/gaisler/greth/greth.in \ -$(GRLIB)/lib/gaisler/greth/greth2.in \ -$(GRLIB)/lib/gaisler/memctrl/ftsrctrl.in \ -$(GRLIB)/lib/gaisler/memctrl/ssrctrl.in \ -$(GRLIB)/lib/gaisler/memctrl/srctrl.in \ -$(GRLIB)/lib/gaisler/memctrl/ftsdctrl.in \ -$(GRLIB)/lib/gaisler/memctrl/ftmctrl.in \ -$(GRLIB)/lib/gaisler/memctrl/sdctrl.in \ -$(GRLIB)/lib/gaisler/ddr/mig_7series.in \ -$(GRLIB)/lib/gaisler/ddr/mig.in \ -$(GRLIB)/lib/gaisler/ddr/ddr2sp.in \ -$(GRLIB)/lib/gaisler/ddr/ddrsp.in \ -$(GRLIB)/lib/gaisler/l2cache/l2c.in \ -$(GRLIB)/lib/techmap/clocks/clkgen.in \ -$(GRLIB)/lib/techmap/gencomp/tech.in \ -$(GRLIB)/lib/techmap/gencomp/clkgen.in \ - -HELPDEP = $(GRLIB)/lib/testgrouppolito/pr/pr.in.help \ -$(GRLIB)/lib/grlib/util/debug.in.help \ -$(GRLIB)/lib/grlib/amba/amba.in.help \ -$(GRLIB)/lib/esa/memoryctrl/mctrl.in.help \ -$(GRLIB)/lib/esa/pci/pci_arb.in.help \ -$(GRLIB)/lib/gaisler/leon3/leon3.in.help \ -$(GRLIB)/lib/gaisler/leon3/l3stat.in.help \ -$(GRLIB)/lib/gaisler/can/can_oc.in.help \ -$(GRLIB)/lib/gaisler/can/grcan.in.help \ -$(GRLIB)/lib/gaisler/can/can_mc.in.help \ -$(GRLIB)/lib/gaisler/spacewire/spacewire.in.help \ -$(GRLIB)/lib/gaisler/spacewire/router.in.help \ -$(GRLIB)/lib/gaisler/usb/grusbhc.in.help \ -$(GRLIB)/lib/gaisler/usb/grusb_dcl.in.help \ -$(GRLIB)/lib/gaisler/usb/grusbdc.in.help \ -$(GRLIB)/lib/gaisler/pci/pcitrace/pcitrace.in.help \ -$(GRLIB)/lib/gaisler/pci/grpci2/grpci2.in.help \ -$(GRLIB)/lib/gaisler/pci/grpci1/pci.in.help \ -$(GRLIB)/lib/gaisler/misc/gptimer.in.help \ -$(GRLIB)/lib/gaisler/misc/ps2vga.in.help \ -$(GRLIB)/lib/gaisler/misc/ahbram.in.help \ -$(GRLIB)/lib/gaisler/misc/gracectrl.in.help \ -$(GRLIB)/lib/gaisler/misc/ahbstat.in.help \ -$(GRLIB)/lib/gaisler/misc/grgpio2.in.help \ -$(GRLIB)/lib/gaisler/misc/svgactrl.in.help \ -$(GRLIB)/lib/gaisler/misc/ps2.in.help \ -$(GRLIB)/lib/gaisler/misc/grsysmon.in.help \ -$(GRLIB)/lib/gaisler/misc/grgpio.in.help \ -$(GRLIB)/lib/gaisler/misc/grversion.in.help \ -$(GRLIB)/lib/gaisler/misc/ftahbram.in.help \ -$(GRLIB)/lib/gaisler/misc/ahbrom.in.help \ -$(GRLIB)/lib/gaisler/pcie/pcie.in.help \ -$(GRLIB)/lib/gaisler/gr1553b/gr1553b_2.in.help \ -$(GRLIB)/lib/gaisler/gr1553b/gr1553b.in.help \ -$(GRLIB)/lib/gaisler/noelv/noelv.in.help \ -$(GRLIB)/lib/gaisler/uart/uart2.in.help \ -$(GRLIB)/lib/gaisler/uart/uart1.in.help \ -$(GRLIB)/lib/gaisler/uart/dcom.in.help \ -$(GRLIB)/lib/gaisler/leon5/leon5.in.help \ -$(GRLIB)/lib/gaisler/leon5/debug5.in.help \ -$(GRLIB)/lib/gaisler/jtag/jtag2.in.help \ -$(GRLIB)/lib/gaisler/jtag/bscan.in.help \ -$(GRLIB)/lib/gaisler/jtag/jtag.in.help \ -$(GRLIB)/lib/gaisler/spi/spictrl.in.help \ -$(GRLIB)/lib/gaisler/spi/spi2ahb.in.help \ -$(GRLIB)/lib/gaisler/spi/spimctrl.in.help \ -$(GRLIB)/lib/gaisler/i2c/i2c.in.help \ -$(GRLIB)/lib/gaisler/i2c/i2cslv.in.help \ -$(GRLIB)/lib/gaisler/i2c/i2c2ahb.in.help \ -$(GRLIB)/lib/gaisler/irqmp/irqmp.in.help \ -$(GRLIB)/lib/gaisler/subsys/leon_dsu_stat_base.in.help \ -$(GRLIB)/lib/gaisler/net/edcl.in.help \ -$(GRLIB)/lib/gaisler/leon4/leon4.in.help \ -$(GRLIB)/lib/gaisler/leon4/l4stat.in.help \ -$(GRLIB)/lib/gaisler/greth/greth.in.help \ -$(GRLIB)/lib/gaisler/greth/greth2.in.help \ -$(GRLIB)/lib/gaisler/memctrl/ssrctrl.in.help \ -$(GRLIB)/lib/gaisler/memctrl/sdctrl.in.help \ -$(GRLIB)/lib/gaisler/memctrl/ftsdctrl.in.help \ -$(GRLIB)/lib/gaisler/memctrl/ftmctrl.in.help \ -$(GRLIB)/lib/gaisler/memctrl/ftsrctrl.in.help \ -$(GRLIB)/lib/gaisler/memctrl/srctrl.in.help \ -$(GRLIB)/lib/gaisler/ddr/ddrsp.in.help \ -$(GRLIB)/lib/gaisler/ddr/ddr2sp.in.help \ -$(GRLIB)/lib/gaisler/l2cache/l2c.in.help \ -$(GRLIB)/lib/techmap/clocks/clkgen.in.help \ -$(GRLIB)/lib/techmap/gencomp/tech.in.help \ -$(GRLIB)/lib/techmap/gencomp/clkgen.in.help \ - diff --git a/grlib-original/bin/ahbrom.c b/grlib-original/bin/ahbrom.c deleted file mode 100644 index 7be4194c5..000000000 --- a/grlib-original/bin/ahbrom.c +++ /dev/null @@ -1,177 +0,0 @@ -#include -#include -#include -#include -#include -#include -#ifdef WIN32 -#include -#endif - -main (argc, argv) - int argc; char **argv; -{ - struct stat sbuf; - unsigned char x[128]; - int i, j, res, fsize, abits, tmp, dbits, alow; - FILE *fp, *wfp; - char *suffix = ""; - char *xgeneric = ""; - - if (argc < 3) exit(1); - res = stat(argv[1], &sbuf); - if (res < 0) exit(2); - fsize = sbuf.st_size; - fp = fopen(argv[1], "rb"); - wfp = fopen(argv[2], "w+"); - if (fp == NULL) exit(2); - if (wfp == NULL) exit(2); - dbits = 32; - if (argc > 3) { - dbits = atoi(argv[3]); - } - if (dbits != 32 && dbits != 64 && dbits != 128) exit(3); - if (dbits == 64) suffix="64"; else if (dbits == 128) suffix="128"; - if (dbits != 32) xgeneric=";\n wideonly: integer := 0"; - - tmp = fsize; abits = 0; - while (tmp) {tmp >>= 1; abits++;} - tmp = (dbits >> 4); alow = 0; - while (tmp) {tmp >>= 1; alow++; } - printf("Creating %s : file size: %d bytes, address bits %d, data width %d\n", argv[2], fsize, abits, dbits); - fprintf(wfp, "\n\ -----------------------------------------------------------------------------\n\ --- This file is a part of the GRLIB VHDL IP LIBRARY\n\ --- Copyright (C) 2020 Cobham Gaisler\n\ -----------------------------------------------------------------------------\n\ --- Entity: ahbrom%s\n\ --- File: ahbrom%s.vhd\n\ --- Author: Jiri Gaisler - Gaisler Research\n\ --- Modified Alen Bardizbanyan - Cobham Gaisler (pipelined impl.)\n\ --- Description: AHB rom. 0/1-waitstate read\n\ -----------------------------------------------------------------------------\n\ -library ieee;\n\ -use ieee.std_logic_1164.all;\n\ -library grlib;\n\ -use grlib.amba.all;\n\ -use grlib.stdlib.all;\n\ -use grlib.devices.all;\n\ -use grlib.config_types.all;\n\ -use grlib.config.all;\n\ -\n\ -entity ahbrom%s is\n\ - generic (\n\ - hindex : integer := 0;\n\ - haddr : integer := 0;\n\ - hmask : integer := 16#fff#;\n\ - pipe : integer := 0;\n\ - tech : integer := 0;\n\ - kbytes : integer := 1%s);\n\ - port (\n\ - rst : in std_ulogic;\n\ - clk : in std_ulogic;\n\ - ahbsi : in ahb_slv_in_type;\n\ - ahbso : out ahb_slv_out_type\n\ - );\n\ -end;\n\ -\n\ -architecture rtl of ahbrom%s is\n\ -constant abits : integer := %d;\n\ -constant bytes : integer := %d;\n\ -constant dbits : integer := %d;\n\ -\n\ -constant hconfig : ahb_config_type := (\n\ - 0 => ahb_device_reg ( VENDOR_GAISLER, GAISLER_AHBROM, 0, 0, 0),\n\ - 4 => ahb_membar(haddr, '1', '1', hmask), others => zero32);\n\ -\n\ -signal romdata : std_logic_vector(dbits-1 downto 0);\n\ -signal romdatas : std_logic_vector(AHBDW-1 downto 0);\n\ -signal addr : std_logic_vector(abits-1 downto 2);\n\ -signal hsize : std_logic_vector(2 downto 0);\n\ -signal romaddr : std_logic_vector(abits-1 downto log2(dbits/8));\n\ -signal hready, active : std_ulogic;\n\ -\n\ -constant RESET_ALL : boolean := GRLIB_CONFIG_ARRAY(grlib_sync_reset_enable_all) = 1;\n\ -\n\ -begin\n\ -\n\ - ahbso.hresp <= \"00\";\n\ - ahbso.hsplit <= (others => '0');\n\ - ahbso.hirq <= (others => '0');\n\ - ahbso.hconfig <= hconfig;\n\ - ahbso.hindex <= hindex;\n\ -\n\ - reg : process (clk)\n\ - begin\n\ - if rising_edge(clk) then\n\ - addr <= ahbsi.haddr(abits-1 downto 2);\n\ - hsize <= ahbsi.hsize;\n\ - if RESET_ALL and rst='0' then addr <= (others => '0'); hsize <= \"000\"; end if;\n\ - end if;\n\ - end process;\n\ -\n\ - p0 : if pipe = 0 generate\n\ - ahbso.hrdata <= romdatas;\n\ - ahbso.hready <= '1';\n\ - hready <= '0';\n\ - end generate;\n\ -\n\ - active <= ahbsi.hsel(hindex) and ahbsi.htrans(1) and ahbsi.hready;\n\ - p1 : if pipe = 1 generate\n\ - ahbso.hready <= hready;\n\ - reg2 : process (clk)\n\ - begin\n\ - if rising_edge(clk) then\n\ - hready <= (not rst) or (not active) or (not(hready));\n\ - ahbso.hrdata <= romdatas;\n\ - if RESET_ALL and rst='0' then hready <= '1'; ahbso.hrdata <= (others => '0'); end if;\n\ - end if;\n\ - end process;\n\ - end generate;\n\ -\n\ - romaddr <= addr(abits-1 downto log2(dbits/8));\n\ -", suffix, suffix, suffix, xgeneric, suffix, abits, fsize, dbits); - if (dbits < 64) { - fprintf(wfp, " romdatas <= ahbdrivedata(romdata);\n"); - } else { - fprintf(wfp, "\ - romdatas <= ahbdrivedata(romdata) when wideonly/=0 or CORE_ACDM=1 else \n\ - ahbselectdata(ahbdrivedata(romdata),addr(4 downto 2),hsize);\n\ -"); - } - fprintf(wfp, "\n\ - comb : process (romaddr)\n\ - begin\n\ - case conv_integer(romaddr) is\n\ -"); - i = 0; - while (!feof(fp)) { - memset(x,0,dbits/8); - fread(x, 1, dbits/8, fp); - fprintf(wfp, " when 16#%05X# => romdata <= X\"", i++); - for (j=0; j romdata <= (others => '-');\n\ - end case;\n\ - end process;\n\ - -- pragma translate_off\n\ - bootmsg : report_version\n\ - generic map (\"ahbrom%s%s\" & tost(hindex) &\n\ - \": %d-bit AHB ROM Module, \" & tost(bytes/(dbits/8)) & \" words, \" & tost(abits-log2(dbits/8)) & \" address bits\" );\n\ - -- pragma translate_on\n\ - -- pragma translate_off\n\ - assert GRLIB_CONFIG_ARRAY\(grlib_little_endian) = 0\n\ - report \"ahbrom: little endian systems not supported\"\n\ - severity error;\n\ - -- pragma translate_on\n\ - end;\n\ -",suffix,(dbits>32)?"_":"",dbits); - - fclose (wfp); - fclose (fp); - return(0); - exit(0); -} diff --git a/grlib-original/bin/aldec/riviera_ws_map_xilinx_libs.do b/grlib-original/bin/aldec/riviera_ws_map_xilinx_libs.do deleted file mode 100644 index 49b5d4c91..000000000 --- a/grlib-original/bin/aldec/riviera_ws_map_xilinx_libs.do +++ /dev/null @@ -1,39 +0,0 @@ -workspace.open riviera_ws/riviera_ws.rwsp -workspace.design.setactive techmap -amap secureip_ver ../xilinx_lib/secureip -amap secureip ../xilinx_lib/secureip -amap axi_bfm ../xilinx_lib/secureip -amap unisims_ver ../xilinx_lib/unisims_ver -amap unisim ../xilinx_lib/unisim -amap unimacro_ver ../xilinx_lib/unimacro_ver -amap unimacro ../xilinx_lib/unimacro -amap simprim_ver ../xilinx_lib/simprims_ver -amap simprim ../xilinx_lib/simprims -amap unifast_ver ../xilinx_lib/unifast_ver -amap unifast ../xilinx_lib/unifast_ver -# Do the map for gaisler lib as well since mig is compiled into it -workspace.design.setactive gaisler -amap secureip_ver ../xilinx_lib/secureip -amap secureip ../xilinx_lib/secureip -amap axi_bfm ../xilinx_lib/secureip -amap unisims_ver ../xilinx_lib/unisims_ver -amap unisim ../xilinx_lib/unisim -amap unimacro_ver ../xilinx_lib/unimacro_ver -amap unimacro ../xilinx_lib/unimacro -amap simprim_ver ../xilinx_lib/simprims_ver -amap simprim ../xilinx_lib/simprims -amap unifast_ver ../xilinx_lib/unifast_ver -amap unifast ../xilinx_lib/unifast_ver -workspace.design.setactive work -amap secureip_ver ../xilinx_lib/secureip -amap secureip ../xilinx_lib/secureip -amap axi_bfm ../xilinx_lib/secureip -amap unisims_ver ../xilinx_lib/unisims_ver -amap unisim ../xilinx_lib/unisim -amap unimacro_ver ../xilinx_lib/unimacro_ver -amap unimacro ../xilinx_lib/unimacro -amap simprim_ver ../xilinx_lib/simprims_ver -amap simprim ../xilinx_lib/simprims -amap unifast_ver ../xilinx_lib/unifast_ver -amap unifast ../xilinx_lib/unifast_ver -quit \ No newline at end of file diff --git a/grlib-original/bin/altera/altera_mf.vhd b/grlib-original/bin/altera/altera_mf.vhd deleted file mode 100644 index 0cce76234..000000000 --- a/grlib-original/bin/altera/altera_mf.vhd +++ /dev/null @@ -1,77 +0,0 @@ - -library ieee; -use ieee.std_logic_1164.all; - --- Dummy sld_virtual_jtag - ModelSim crashes on default one - -entity sld_virtual_jtag is - - generic ( - lpm_type : string := "SLD_VIRTUAL_JTAG"; - -- required by coding standard - lpm_hint : string := "SLD_VIRTUAL_JTAG"; -- required by coding standard - sld_auto_instance_index : string := "NO"; - -- Yes of auto index is desired and no otherwise - sld_instance_index : integer := 0; - -- Index to be used if SLD_AUTO_INSTANCE_INDEX is no - sld_ir_width : integer := 1; - -- the width of the IR register - sld_sim_n_scan : integer := 0; - -- the number of scans in the simulation model - sld_sim_total_length : integer := 0; - -- the total bit width of all DR scan values - sld_sim_action : string := ""); - -- the actions to be simulated in a format specified by the documentation - port ( - tdo : in std_logic := '0'; -- tdo signal into megafunction - ir_out : in std_logic_vector(sld_ir_width - 1 downto 0) := (others => '0'); - -- parallel ir data into megafunction - tck : out std_logic; -- tck signal from megafunction - tdi : out std_logic; -- tdi signal from megafunction - ir_in : out std_logic_vector(sld_ir_width - 1 downto 0); - -- paraller ir data from megafunction - virtual_state_cdr : out std_logic; -- cdr state signal of megafunction - virtual_state_sdr : out std_logic; -- sdr state signal of megafunction - virtual_state_e1dr : out std_logic; - -- e1dr state signal of megafunction - virtual_state_pdr : out std_logic; -- pdr state signal of megafunction - virtual_state_e2dr : out std_logic; - -- e2dr state signal of megafunction - virtual_state_udr : out std_logic; -- udr state signal of megafunction - virtual_state_cir : out std_logic; -- cir state signal of megafunction - virtual_state_uir : out std_logic; -- uir state signal of megafunction - jtag_state_tlr : out std_logic; -- Test, Logic, Reset state - jtag_state_rti : out std_logic; -- Run, Test, Idle state - jtag_state_sdrs : out std_logic; -- Select DR scan state - jtag_state_cdr : out std_logic; -- capture DR state - jtag_state_sdr : out std_logic; -- Shift DR state - jtag_state_e1dr : out std_logic; -- exit 1 dr state - jtag_state_pdr : out std_logic; -- pause dr state - jtag_state_e2dr : out std_logic; -- exit 2 dr state - jtag_state_udr : out std_logic; -- update dr state - jtag_state_sirs : out std_logic; -- Select IR scan state - jtag_state_cir : out std_logic; -- capture IR state - jtag_state_sir : out std_logic; -- shift IR state - jtag_state_e1ir : out std_logic; -- exit 1 IR state - jtag_state_pir : out std_logic; -- pause IR state - jtag_state_e2ir : out std_logic; -- exit 2 IR state - jtag_state_uir : out std_logic; -- update IR state - tms : out std_logic); -- tms signal -end sld_virtual_jtag; - -architecture structural of sld_virtual_jtag is - - -begin -- structural - --- dummy drivers to avoid modelsim warnings - - tck <= '0'; - tdi <= '0'; - ir_in <= (others => '0'); - virtual_state_cdr <= '0'; - virtual_state_sdr <= '0'; - virtual_state_udr <= '0'; - -end structural; - diff --git a/grlib-original/bin/atc_run_multi.tcl b/grlib-original/bin/atc_run_multi.tcl deleted file mode 100755 index 9f1f55e09..000000000 --- a/grlib-original/bin/atc_run_multi.tcl +++ /dev/null @@ -1 +0,0 @@ -acttclsh /usr/local/actel/libero73/Libero/scripts/extended_run_shell.tcl -adb leon3mp.adb -effort_level 5 -timing_driven -n 20 -save_all diff --git a/grlib-original/bin/cds.lib b/grlib-original/bin/cds.lib deleted file mode 100644 index c76acf73c..000000000 --- a/grlib-original/bin/cds.lib +++ /dev/null @@ -1 +0,0 @@ -include $CDS_INST_DIR/tools/inca/files/cds.lib diff --git a/grlib-original/bin/def.npl b/grlib-original/bin/def.npl deleted file mode 100644 index 8c4e3b84c..000000000 --- a/grlib-original/bin/def.npl +++ /dev/null @@ -1,2 +0,0 @@ -DEVSIMULATOR Modelsim -DEVGENERATEDSIMULATIONMODEL VHDL diff --git a/grlib-original/bin/echo.bat b/grlib-original/bin/echo.bat deleted file mode 100755 index 4a12501f7..000000000 --- a/grlib-original/bin/echo.bat +++ /dev/null @@ -1 +0,0 @@ -echo "$@" diff --git a/grlib-original/bin/editise.txt b/grlib-original/bin/editise.txt deleted file mode 100644 index 1a40d60ef..000000000 --- a/grlib-original/bin/editise.txt +++ /dev/null @@ -1,31 +0,0 @@ -How to read and/or edit the new ".ise" Project Navigator project file ---------------------------------------------------------------------- - -In the "%Xilinx%\data\projnav" directory there is a script file named "iseEdit.tcl." This script was created to import and export ISE file content. - -Usage: -xtclsh iseEdit.tcl [export|import] [client=] [datafile=] [] - -Valid options are: -help : Displays this help message -export : Exports contents of the client registry section to a datafile -import : Imports contents from a data file to the client registry section -(Note: Either the -export or -import option must be specified, but not both) - -client= : Optionally specify the client to use. If not specified, -'ProjectNavigator' is used as the default client - -datafile= : Optionally specify the data file to use for export or import - - : ISE Project file name to use for export only. This must be -specified for export but should not be specified for import - -Examples: -xtclsh iseEdit.tcl export watchvhd.ise -xtclsh iseEdit.tcl import - -xtclsh iseEdit.tcl export datafile=pndata.txt watchvhd.ise -xtclsh iseEdit.tcl export client=ProjectNavigator datafile=pndata.txt watchvhd.ise -xtclsh iseEdit.tcl import datafile=pndata.txt - -xtclsh iseEdit.tcl import client=ProjectNavigator datafile=pndata.txt diff --git a/grlib-original/bin/ex_cmds.tcl b/grlib-original/bin/ex_cmds.tcl deleted file mode 100644 index bf11efce8..000000000 --- a/grlib-original/bin/ex_cmds.tcl +++ /dev/null @@ -1,146 +0,0 @@ - -############################################################### -# -# eX command script, (C) 2007 eASIC Corp. -# Automatically generated by CDB -# -# $Id: etools_fe.pm,v 1.17 2008/04/04 13:37:18 richard Exp $ -############################################################### - -set my_home $env(EX_HOME) -source ../../../env.tcl -source $my_home/scripts/genDesignDataFile.tcl -source $my_home/scripts/genLibMap.tcl - -logging attach console -logging attach file ex.log -logging level set drc.rtlentry.eclkgateimpl INFO -logging setmsgcount --logname=udesign.tclscript --maxcount=5000 -logging setmsgcount --logname=drc.all.gendd.warn --maxcount=5000 -logging setmsgcount --logname=drc.all.portpropagation --maxcount=5000 -logging setmsgcount --logname=drc.all.undrivennet --maxcount=5000 - -puts "############### Starting project file add ###############" -project new ${design} -if [info exists verilogList] { - project hdloptions -verilog -v $my_home/data/dw_comp.v - foreach f $verilogList { eval project file add -rtl_verilog $f } -} -if [info exists vhdlList] { -# HMS - modification to simplify the usage of VHDL libraries - file delete -force work - file mkdir work - foreach f $vhdlList { - set libspace [string first " " $f] - if {$libspace == -1} { - eval project file add $f - } else { - set lib [string range $f 0 [expr $libspace - 1]] - file delete -force $lib - file mkdir $lib - eval project file add -libmap $f - } - } - - #automatically handle VHDL packages -# set revised {} -# ::easic::ex_libmap $vhdlList revised -# set num [llength $revised] -# set cnt [expr $num - 1] -# for {set i 0} {$i < $cnt} {incr i} { -# set libfs [lindex $revised $i] -# set lib [lindex $libfs 0] -# set fs [lindex $libfs 1] -# file delete -force $lib -# file mkdir $lib -# eval project file add -libmap $lib $fs -# } -# set nonlibfs [lindex $revised $cnt] -# foreach f $nonlibfs { eval project file add -rtl_vhdl $f } -} - -# eASIC Library -if {[file exists $env(ETOOLS_HOME)/ip_lib]} { - foreach lib [glob -nocomplain $env(ETOOLS_HOME)/ip_lib/*] { - if {[file isdirectory $lib]} { - foreach macro [glob -nocomplain $lib/*] { - #add macro design files - if {[file exists $macro/src/rtl/verilog]} { - eval project hdloptions -verilog -y $macro/src/rtl/verilog +libext+.v+ - } - if {[file exists $macro/src/rtl/vhdl]} { - #VHDL not supported yet, so this really is a placeholder -# HMS - removed since it caused errors - # eval project hdloptions -vhdl -y $macro/src/rtl/vhdl - } - } ;#next macro - } - } ;#next lib -} - -# Include files -if [info exists defineList] { - foreach def $defineList { eval project hdloptions -verilog +define+${def}+ } -} -if [info exists includeList] { - foreach inc $includeList { eval project hdloptions -verilog +incdir+${inc}+ } -} - -if {$top_hdl == "vhdl"} { - # attempt to sort VHDL files in the right order - # caution: this is not guaranteed to always work - project hdloptions -$top_hdl -sort -} - -puts "############### Starting prepare syn ###############" -project nomdata flat -prepare syn -disable_memory_detect -top $design -puts "############### Finished prepare syn ###############\n" - -puts "############### Starting export ewizard ###############" -set top [lindex [nomdata proplist FLAT_TOPNAME] 0] -set filename ../../out/${design}.dd -set fileId [open $filename "w"] -generateInterFile $top $fileId -#close $fileId -puts "############### Finished export ewizard ###############\n" - -puts "############### Starting report netlist ###############" -report netlist -file ../rpt/ex_premap_netlist.rpt -puts "############### Finished report netlist ###############\n" - -puts "############### Starting export verilog ###############" -export verilog ../../out/ex_${design}.v -puts "############### Finished export verilog ###############\n" - -puts "############### Starting report clock ###############" -report clock --format=xml --file=../rpt/ex_clock.xml -puts "############### Finished report clock ###############\n" - -puts "############### Starting report memory ###############" -#report memory --format=xml -file ../rpt/ex_memory.xml -#report memory -file ../rpt/ex_memory.rpt -puts "############### Finished report memory ###############\n" - -puts "############### Starting report netlist ###############" -report netlist -file ../rpt/ex_netlist.rpt -puts "############### Finished report netlist ###############\n" - -puts "############### Starting checks ###############" -logging attach file --format=xml ../rpt/ex_log.xml -check -logging detach file ../rpt/ex_log.xml -puts "############### Finished checks ###############\n" - -#puts "############### Starting eSyn ###############" -#esyn map -#report netlist -file ../rpt/ex_map_netlist.rpt -#puts "############### Finished eSyn ###############\n" - -puts " -=========================== - eX finished -=========================== -" - -exit diff --git a/grlib-original/bin/gpl.sed b/grlib-original/bin/gpl.sed deleted file mode 100644 index 020b7ccd2..000000000 --- a/grlib-original/bin/gpl.sed +++ /dev/null @@ -1,19 +0,0 @@ -s/--GAISLER_LICENSE/------------------------------------------------------------------------------\ --- This file is a part of the GRLIB VHDL IP LIBRARY\ --- Copyright (C) 2003 - 2008, Gaisler Research\ --- Copyright (C) 2008 - 2014, Aeroflex Gaisler\ --- Copyright (C) 2015 - 2020, Cobham Gaisler\ ---\ --- This program is free software\; you can redistribute it and\/or modify\ --- it under the terms of the GNU General Public License as published by\ --- the Free Software Foundation;\ either version 2 of the License, or\ --- (at your option) any later version.\ ---\ --- This program is distributed in the hope that it will be useful,\ --- but WITHOUT ANY WARRANTY;\ without even the implied warranty of\ --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\ --- GNU General Public License for more details.\ ---\ --- You should have received a copy of the GNU General Public License\ --- along with this program;\ if not, write to the Free Software\ --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\ / diff --git a/grlib-original/bin/gr.sed b/grlib-original/bin/gr.sed deleted file mode 100644 index 5151c4793..000000000 --- a/grlib-original/bin/gr.sed +++ /dev/null @@ -1,8 +0,0 @@ -s/--GAISLER_LICENSE/------------------------------------------------------------------------------\ --- This file is a part of the GRLIB VHDL IP LIBRARY\ --- Copyright (C) 2020, Cobham Gaisler AB - all rights reserved.\ ---\ --- ANY USE OR REDISTRIBUTION IN PART OR IN WHOLE MUST BE HANDLED IN \ --- ACCORDANCE WITH THE GAISLER LICENSE AGREEMENT AND MUST BE APPROVED \ --- IN ADVANCE IN WRITING.\ / - diff --git a/grlib-original/bin/head.xise b/grlib-original/bin/head.xise deleted file mode 100644 index 2e7c11f8e..000000000 --- a/grlib-original/bin/head.xise +++ /dev/null @@ -1,15 +0,0 @@ - - - -
- - - - - - - -
- - - diff --git a/grlib-original/bin/libs.txt b/grlib-original/bin/libs.txt deleted file mode 100644 index e69de29bb..000000000 diff --git a/grlib-original/bin/modelsim.ini b/grlib-original/bin/modelsim.ini deleted file mode 100644 index be962b06a..000000000 --- a/grlib-original/bin/modelsim.ini +++ /dev/null @@ -1,358 +0,0 @@ -std = $MODEL_TECH/../std -ieee = $MODEL_TECH/../ieee -vital2000 = $MODEL_TECH/../vital2000 -verilog = $MODEL_TECH/../verilog -arithmetic = $MODEL_TECH/../arithmetic -mgc_portable = $MODEL_TECH/../mgc_portable -std_developerskit = $MODEL_TECH/../std_developerskit -synopsys = $MODEL_TECH/../synopsys - -[vcom] -; VHDL93 variable selects language version as the default. -; Default is VHDL-2002. -; Value of 0 or 1987 for VHDL-1987. -; Value of 1 or 1993 for VHDL-1993. -; Default or value of 2 or 2002 for VHDL-2002. -; Value of 3 or 2008 for VHDL-2008 -; Value of 4 or ams99 for VHDL-AMS-1999 -; Value of 5 or ams07 for VHDL-AMS-2007 -; Normally set to 93 for GRLIB -VHDL93 = 93 - -; Ignore VHDL-2008 declaration of REAL_VECTOR in package STANDARD. Default is off. -; ignoreStandardRealVector = 1 - -; Show source line containing error. Default is off. -Show_source = 1 - -; Turn off unbound-component warnings. Default is on. -Show_Warning1 = 0 - -; Turn off process-without-a-wait-statement warnings. Default is on. -; Show_Warning2 = 0 - -; Turn off null-range warnings. Default is on. -; Show_Warning3 = 0 - -; Turn off no-space-in-time-literal warnings. Default is on. -; Show_Warning4 = 0 - -; Turn off multiple-drivers-on-unresolved-signal warnings. Default is on. -Show_Warning5 = 0 - -; Turn off optimization for IEEE std_logic_1164 package. Default is on. -; Optimize_1164 = 0 - -; Enable compiler statistics. Specify one or more arguments: -; [all,none,time,cmd,msg,perf,verbose,list] -; Add '-' to disable specific statistics. Default is [time,cmd,msg]. -; Stats = time,cmd,msg - -; Turn on resolving of ambiguous function overloading in favor of the -; "explicit" function declaration (not the one automatically created by -; the compiler for each type declaration). Default is off. -; The .ini file has Explicit enabled so that std_logic_signed/unsigned -; will match the behavior of synthesis tools. -Explicit = 1 - -; Turn off acceleration of the VITAL packages. Default is to accelerate. -; NoVital = 1 - -; Turn off VITAL compliance checking. Default is checking on. -; NoVitalCheck = 1 - -; Ignore VITAL compliance checking errors. Default is to not ignore. -; IgnoreVitalErrors = 1 - -; Turn off VITAL compliance checking warnings. Default is to show warnings. -; Show_VitalChecksWarnings = 0 - -; Turn off PSL assertion warning messages. Default is to show warnings. -; Show_PslChecksWarnings = 0 - -; Enable parsing of embedded PSL assertions. Default is enabled. -; EmbeddedPsl = 0 - -; Keep silent about case statement static warnings. -; Default is to give a warning. -; NoCaseStaticError = 1 - -; Keep silent about warnings caused by aggregates that are not locally static. -; Default is to give a warning. -; NoOthersStaticError = 1 - -; Treat as errors: -; case statement static warnings -; warnings caused by aggregates that are not locally static -; Overrides NoCaseStaticError, NoOthersStaticError settings. -; PedanticErrors = 1 - -; Turn off inclusion of debugging info within design units. -; Default is to include debugging info. -; NoDebug = 1 - -; Turn off "Loading..." messages. Default is messages on. -Quiet = 1 - -; Turn on some limited synthesis rule compliance checking. Checks only: -; -- signals used (read) by a process must be in the sensitivity list -; CheckSynthesis = 1 - -[vlog] -; Turn off inclusion of debugging info within design units. -; Default is to include debugging info. -; NoDebug = 1 - -; Turn on `protect compiler directive processing. -; Default is to ignore `protect directives. -; Protect = 1 - -; Turn off "Loading..." messages. Default is messages on. -Quiet = 1 - -; Turn on Verilog hazard checking (order-dependent accessing of global vars). -; Default is off. -; Hazard = 1 - -; Turn on converting regular Verilog identifiers to uppercase. Allows case -; insensitivity for module names. Default is no conversion. -; UpCase = 1 - -[vopt] -; Turn on code coverage in vopt. Default is off. -; Coverage = sbceft - -; Control compiler optimizations that are allowed when -; code coverage is on. Refer to the comment for this in the [vlog] area. -; CoverOpt = 3 - -; Controls set of CoverConstructs that are being considered for Coverage -; Collection. -; Some of Valid options are: default,set1,set2 -; Covermode = default - -; Controls set of HDL cover constructs that would be considered(or not considered) -; for Coverage Collection. (Default corresponds to covermode default). -; Some of Valid options are: "ca", "citf", "cifl", "tcint", "fsmqs". -; Coverconstruct = noca,nocitf,nofsmtf,nofsmds,noctes,nocicl,nocprc,nocfl,nofsmup,nocifl,nocpm,notcint,nocpkg,nocsva - -; Increase or decrease the maximum number of rows allowed in a UDP table -; implementing a VHDL condition coverage or expression coverage expression. -; More rows leads to a longer compile time, but more expressions covered. -; CoverMaxUDPRows = 192 - -; Increase or decrease the maximum number of input patterns that are present -; in FEC table. This leads to a longer compile time with more expressions -; covered with FEC metric. -; CoverMaxFECRows = 192 - -; Increase or decrease the limit on the size of expressions and conditions -; considered for expression and condition coverages. Higher FecUdpEffort leads -; to higher compile, optimize and simulation time, but more expressions and -; conditions are considered for coverage in the design. FecUdpEffort can -; be set to a number ranging from 1 (low) to 3 (high), defined as: -; 1 - (low) Only small expressions and conditions considered for coverage. -; 2 - (medium) Bigger expressions and conditions considered for coverage. -; 3 - (high) Very large expressions and conditions considered for coverage. -; The default setting is 1 (low). -; FecUdpEffort = 1 - -; Enable code coverage reporting of code that has been optimized away. -; The default is not to report. -; CoverReportCancelled = 1 - -; Enable deglitching of code coverage in combinatorial, non-clocked, processes. -; Default is no deglitching. -; CoverDeglitchOn = 1 - -; Enable compiler statistics. Specify one or more arguments: -; [all,none,time,cmd,msg,perf,verbose,list,kb] -; Add '-' to disable specific statistics. Default is [time,cmd,msg]. -; Stats = time,cmd,msg - -; Control the code coverage deglitching period. A period of 0, eliminates delta -; cycle glitches. The value of CoverDeglitchPeriod needs to be either be 0 or a -; time string that includes time units. Examples: 0 or 10.0ps or "10.0 ps". -; CoverDeglitchPeriod = 0 - -; Do not show immediate assertions with constant expressions in -; GUI/reports/UCDB etc. By default immediate assertions with constant -; expressions are shown in GUI/reports/UCDB etc. This does not affect -; evaluation of immediate assertions. -; ShowConstantImmediateAsserts = 0 - -; Set the maximum number of iterations permitted for a generate loop. -; Restricting this permits the implementation to recognize infinite -; generate loops. -; GenerateLoopIterationMax = 100000 - -; Set the maximum depth permitted for a recursive generate instantiation. -; Restricting this permits the implementation to recognize infinite -; recursions. -; GenerateRecursionDepthMax = 200 - -; Set the number of processes created during the code generation phase. -; By default a heuristic is used to set this value. This may be set to 0 -; to disable this feature completely. -; ParallelJobs = 0 - -; Controls SystemVerilog Language Extensions. These options enable -; some non-LRM compliant behavior. -; SvExtensions = [+|-][,[+|-]*] - -; Load the specified shared objects with the RTLD_GLOBAL flag. -; This gives global visibility to all symbols in the shared objects, -; meaning that subsequently loaded shared objects can bind to symbols -; in the global shared objects. The list of shared objects should -; be whitespace delimited. This option is not supported on the -; Windows or AIX platforms. -; GlobalSharedObjectList = example1.so example2.so example3.so - -; Disable SystemVerilog elaboration system task messages -; IgnoreSVAInfo = 1 -; IgnoreSVAWarning = 1 -; IgnoreSVAError = 1 -; IgnoreSVAFatal = 1 - -; Enable or disable automatic creation of missing libraries. -; Default is 1 (enabled) -; CreateLib = 1 - - -[vsim] -; vopt flow -; Set to turn on automatic optimization of a design. -; Default is on -VoptFlow = 1 - -; Simulator resolution -; Set to fs, ps, ns, us, ms, or sec with optional prefix of 1, 10, or 100. -Resolution = 1ps - -; User time unit for run commands -; Set to default, fs, ps, ns, us, ms, or sec. The default is to use the -; unit specified for Resolution. For example, if Resolution is 100ps, -; then UserTimeUnit defaults to ps. -UserTimeUnit = ns - -; Default run length -RunLength = 100 - -; Maximum iterations that can be run without advancing simulation time -IterationLimit = 5000 - -; Directive to license manager: -; vhdl Immediately reserve a VHDL license -; vlog Immediately reserve a Verilog license -; plus Immediately reserve a VHDL and Verilog license -; nomgc Do not look for Mentor Graphics Licenses -; nomti Do not look for Model Technology Licenses -; noqueue Do not wait in the license queue when a license isn't available -; License = plus - -; Stop the simulator after an assertion message -; 0 = Note 1 = Warning 2 = Error 3 = Failure 4 = Fatal -BreakOnAssertion = 3 - -; Assertion Message Format -; %S - Severity Level -; %R - Report Message -; %T - Time of assertion -; %D - Delta -; %I - Instance or Region pathname (if available) -; %% - print '%' character -; AssertionFormat = "** %S: %R\n Time: %T Iteration: %D%I\n" - -; Default radix for all windows and commands... -; Set to symbolic, ascii, binary, octal, decimal, hex, unsigned -DefaultRadix = symbolic - -; VSIM Startup command -; Startup = do startup.do - -; File for saving command transcript -TranscriptFile = transcript - -; Specify whether paths in simulator commands should be described -; in VHDL or Verilog format. For VHDL, PathSeparator = / -; for Verilog, PathSeparator = . -PathSeparator = / - -; Disable assertion messages -; IgnoreNote = 1 -; IgnoreWarning = 1 -; IgnoreError = 1 -; IgnoreFailure = 1 - -; Default force kind. May be freeze, drive, or deposit -; or in other terms, fixed, wired or charged. -; DefaultForceKind = freeze - -; If zero, open files when elaborated -; else open files on first read or write -; DelayFileOpen = 0 - -; Control VHDL files opened for write -; 0 = Buffered, 1 = Unbuffered -UnbufferedOutput = 0 - -; Specify whether WLF file logging can use threads on multi-processor machines -; if 0, no threads will be used, if 1, threads will be used if the system has -; more than one processor -WLFUseThreads = 1 - -; This controls the number of characters of a signal name -; shown in the waveform window and the postscript plot. -; The default value or a value of zero tells VSIM to display -; the full name. -; WaveSignalNameWidth = 10 - -; Turn off warnings from the std_logic_arith, std_logic_unsigned -; and std_logic_signed packages. -StdArithNoWarnings = 1 - -; Turn off warnings from the IEEE numeric_std and numeric_bit -; packages. -NumericStdNoWarnings = 1 - -; Control the format of a generate statement label. Don't quote it. -; GenerateFormat = %s__%d - -; Specify whether checkpoint files should be compressed. -; The default is to be compressed. -; CheckpointCompressMode = 0 - -; List of dynamically loaded objects for Verilog PLI applications -; Veriuser = veriuser.sl - -[lmc] -; ModelSim's interface to Logic Modeling's SmartModel SWIFT software -libsm = $MODEL_TECH/libsm.sl -; ModelSim's interface to Logic Modeling's SmartModel SWIFT software (Windows NT) -; libsm = $MODEL_TECH/libsm.dll -; Logic Modeling's SmartModel SWIFT software (HP 9000 Series 700) -; libswift = $LMC_HOME/lib/hp700.lib/libswift.sl -; Logic Modeling's SmartModel SWIFT software (IBM RISC System/6000) -; libswift = $LMC_HOME/lib/ibmrs.lib/swift.o -; Logic Modeling's SmartModel SWIFT software (Sun4 Solaris) -; libswift = $LMC_HOME/lib/sun4Solaris.lib/libswift.so -; Logic Modeling's SmartModel SWIFT software (Sun4 SunOS) -; do setenv LD_LIBRARY_PATH $LMC_HOME/lib/sun4SunOS.lib -; and run "vsim.swift". -; Logic Modeling's SmartModel SWIFT software (Windows NT) -; libswift = $LMC_HOME/lib/pcnt.lib/libswift.dll - -; ModelSim's interface to Logic Modeling's hardware modeler SFI software -libhm = $MODEL_TECH/libhm.sl -; ModelSim's interface to Logic Modeling's hardware modeler SFI software (Windows NT) -; libhm = $MODEL_TECH/libhm.dll -; Logic Modeling's hardware modeler SFI software (HP 9000 Series 700) -; libsfi = /lib/hp700/libsfi.sl -; Logic Modeling's hardware modeler SFI software (IBM RISC System/6000) -; libsfi = /lib/rs6000/libsfi.a -; Logic Modeling's hardware modeler SFI software (Sun4 Solaris) -; libsfi = /lib/sun4.solaris/libsfi.so -; Logic Modeling's hardware modeler SFI software (Sun4 SunOS) -; libsfi = /lib/sun4.sunos/libsfi.so -; Logic Modeling's hardware modeler SFI software (Window NT) -; libsfi = /lib/pcnt/lm_sfi.dll diff --git a/grlib-original/bin/mt1.mpf b/grlib-original/bin/mt1.mpf deleted file mode 100644 index b1a97499c..000000000 --- a/grlib-original/bin/mt1.mpf +++ /dev/null @@ -1,14 +0,0 @@ -Project_Folder_Count = 0 -Echo_Compile_Output = 0 -Save_Compile_Report = 1 -VHDL_DoubleClick = Edit -VERILOG_DoubleClick = Edit -SYSTEMC_DoubleClick = Edit -TCL_DoubleClick = Edit -TEXT_DoubleClick = Edit -VHDL_CustomDoubleClick = -VERILOG_CustomDoubleClick = -SYSTEMC_CustomDoubleClick = -TCL_CustomDoubleClick = -TEXT_CustomDoubleClick = -ForceSoftPaths = 0 diff --git a/grlib-original/bin/padsrec.tcl b/grlib-original/bin/padsrec.tcl deleted file mode 100755 index e541e755e..000000000 --- a/grlib-original/bin/padsrec.tcl +++ /dev/null @@ -1,81 +0,0 @@ -#! /usr/bin/tclsh -# -# Utility to pad SREC to multiple of 16 bytes -# Copyright 2010, Aeroflex Gaisler AB. -# -# Usage: tclsh padsrec.tcl out.srec -# -# Limitations: -# - Records other than S1-3 are passed on unchanged -# - SREC checksums are not correct -# -# Revision history: -# 2011-08-12, MH, First version (based on ftddrcb.tcl) -# 2020-12-01, MH, Rewrite to support realigning data -# - - - -# ------------------------------------------------------------- -# SREC processing - -proc hex2int { h } { - return [expr {"0x$h"}] -} - -set outrecs [list] ; # output records without check byte -set prerecs [list] -set postrecs [list] - -set startaddr 0 -set recbytes 16 - -set lineno 0 -while { ! [eof stdin] } { - set l [gets stdin] - incr lineno - set llen [string length $l] - if { $llen == 0 } then continue - set rt [string index $l 1 ] - if { $rt > 0 && $rt < 4 } then { - # Byte count and data position - set bc [expr { [hex2int [string range $l 2 3]] - 2 - $rt } ] - set dp [expr {6 + $rt*2}] - # Address - set haddr [string range $l 4 $dp-1] - set addr 0x${haddr} - if { [llength $outrecs] == 0 } { - set startaddr [expr { $addr - ($addr & (1-$recbytes)) }] - } - while { $bc > 0 } { - set recno [expr { ($addr-$startaddr) / $recbytes }] - while { $recno >= [llength $outrecs] } { - set newrec [format "S3%02X%08X%0*X" [expr {$recbytes + 5}] [expr {$startaddr + [llength $outrecs]*$recbytes}] [expr {2*$recbytes}] 0] - lappend outrecs $newrec - } - set recoffs [expr {$addr - $recno*$recbytes - $startaddr}] - set cbc [expr { min($bc, $recbytes-$recoffs) }] - set rec [lindex $outrecs $recno] - set nrec [string replace $rec [expr { 12+2*$recoffs}] [expr { 11+2*($recoffs+$cbc) }] [string range $l $dp [expr {$dp+2*$cbc-1}]] ] - lset outrecs $recno $nrec - set dp [expr { $dp + 2*$cbc }] - set bc [expr { $bc - $cbc }] - incr addr $cbc - } - } elseif { [llength $outrecs] == 0 } { - lappend prerecs $l - } else { - lappend postrecs $l - } -} - -foreach l $prerecs { puts $l } -foreach l $outrecs { - set c 0 - for { set b 1 } { $b < (1+4+16+1) } { incr b } { - incr c [hex2int [string range $l [expr {2*$b}] [expr {2*$b+1}]]] - } - set c [expr { (~$c) & 255 }] - puts [format %s%02X $l $c] -} -foreach l $postrecs { puts $l } diff --git a/grlib-original/bin/pre-sim-run.tcl b/grlib-original/bin/pre-sim-run.tcl deleted file mode 100644 index 4fcb198d9..000000000 --- a/grlib-original/bin/pre-sim-run.tcl +++ /dev/null @@ -1,128 +0,0 @@ -##################################################################################### -# Procedure to list all un-driven inout ports -##################################################################################### -proc showPortX {{top d3}} { - set p_in [find signals /testbench/$top/* -in] - set p_inout [find signals /testbench/$top/* -inout] - - echo "\nList un-driven IN/INOUT ports:" - set count 0 - foreach x [concat $p_in $p_inout] { - #echo $x - set xx [examine $x] - if {$xx == "X" || $xx == "StX" || $xx == "U"} { - echo $x $xx - incr count - } - } - echo "Count: $count" - if {$count != 0} { - echo "***************************************************" - echo "*** You should add drivers to un-driven ports! ***" - echo "***************************************************" - } -} - -##################################################################################### -# Procedure to list all register with output driving X -# and force the output to 0 -##################################################################################### -proc showRegX {{remove ""} {top d3} {ports {Q QN}} {depth 10}} { - echo "\nList all registers with value X:" - set regs [list] - foreach port $ports { - set path "" - for {set i 0} {$i < $depth} {incr i} { - #echo "/testbench/$top/${path}$port" - set regs [concat $regs [find nets /testbench/$top/${path}$port]] - append path "*/" - } - } - - set count 0 - foreach x $regs { - set xx [examine $x] - if {$xx == "X" || $xx == "StX"} { - echo $x $xx - incr count - if {$remove == "remove"} { - force -deposit $x 1 0 - } - } - } - echo "Count: $count" - - if {$remove == "remove"} { - echo "***************************************************" - echo "*** All registers with value X are forced to 0! ***" - echo "***************************************************" - } -} - -# Determine environment 0: batch or 1: inside Libero (default) ###################### - -if {[info exists run_mode] == 0} { - set run_mode 2 -} - -# batch mode -if { $run_mode == 1 } { - - # Add waveforms - if { [file exists wave.do] == 1 } { - do wave.do - } - - # Setup simulation state (RTL or post-synth/layout) - set post 1 - - # Setup top-level instans name - if {[info exists top] == 0} { - set top d3 - } - -# Run for Libero -} elseif { $run_mode == 2 } { - - # Add waveforms - if { [file exists ../../wave.do] == 1 } { - do ../../wave.do - } - - # Copy PROM image - if { [file exists ../../ENVM_init.mem] == 1 && [file exists ENVM_init.mem] == 0 } { - echo "Copy /ENVM_init.mem to simulation directory." - file copy ../../ENVM_init.mem . - } - - # Setup simulation state (RTL or post-synth/layout) - if {[info exists post] == 0} { - set post [string match *post* $argv] - } - - # Setup top-level instans name - if {[info exists top] == 0} { - set top d3 - } - -} else { - set post 0 -} - -# Run if post-synth/layout simulation ############################################### -if {$post == 1} { - echo "POST: $post" - echo "TOP: $top" - echo "Post-synth/layout simulation: remove X from design" - run 1 ns - showRegX remove $top - showPortX $top - - if { $run_mode == 1 } { - run -a - quit - } -} -# ################################################################################### - - diff --git a/grlib-original/bin/quartus.qpf b/grlib-original/bin/quartus.qpf deleted file mode 100755 index 35c5146da..000000000 --- a/grlib-original/bin/quartus.qpf +++ /dev/null @@ -1,7 +0,0 @@ -#QUARTUS_VERSION = "4.1" -#DATE = "17:39:37 December 03, 2004" - - -# Revisions - - diff --git a/grlib-original/bin/quartus.qsf_head b/grlib-original/bin/quartus.qsf_head deleted file mode 100755 index f63f018eb..000000000 --- a/grlib-original/bin/quartus.qsf_head +++ /dev/null @@ -1,9 +0,0 @@ -# Project-Wide Assignments -# ======================== -#set_global_assignment -name ORIGINAL_QUARTUS_VERSION "4.1 SP2" -#set_global_assignment -name PROJECT_CREATION_TIME_DATE "16:13:08 DECEMBER 01, 2004" - -# Explicitly disable TimeQuest since the GRLIB flow invokes the classical -# timing analyzer and USE_TIMEQUEST_TIMING_ANALYZER defaults to "ON" -# set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER "OFF" - diff --git a/grlib-original/bin/route b/grlib-original/bin/route deleted file mode 100755 index 3c0e7e5a2..000000000 --- a/grlib-original/bin/route +++ /dev/null @@ -1,15 +0,0 @@ -#!/bin/sh -# route entity ucf-file device effort bitgen-file path map-options -rm $1.ngd $1.ncd -echo edif2ngd $6/$1.edf -edif2ngd $6/$1.edf -echo ngdbuild $1.ngo -aul -uc $2 -p $3 -sd $7 -ngdbuild $1.ngo -aul -uc $2 -p $3 -sd $7 -echo map -pr b -ol $4 -p $3 $1 $8 -map -pr b -ol $4 -p $3 $1 $8 -echo par -ol $4 -w $1 $1.ncd -par -ol $4 -w $1 $1.ncd -echo trce -v 25 $1.ncd $1.pcf -trce -v 25 $1.ncd $1.pcf -echo bitgen $1 -d -m -w -f $5 -bitgen $1 -d -m -w -f $5 diff --git a/grlib-original/bin/route_lattice b/grlib-original/bin/route_lattice deleted file mode 100755 index 2d685e9f5..000000000 --- a/grlib-original/bin/route_lattice +++ /dev/null @@ -1,19 +0,0 @@ -#!/bin/sh -# route entity ucf-file device path isplib package -echo edif2ngd -l $5 -d $3 $4/$1.edf -edif2ngd -l $5 -d $3 $4/$1.edf -echo ngdbuild -a $5 -d $3 $1.ngo $1.ngd -ngdbuild -a $5 -d $3 $1.ngo $1.ngd -echo map -a $5 -p $3 -t $6 -s 5 $1.ngd -o $1.ncd -map -a $5 -p $3 -t $6 -s 5 $1.ngd -o $1.ncd -#par -cs 1 -w $1 $1.ncd $2 -#par -e 1 -i 10 -w $1 $1.ncd $2 -echo par -cs 1 -e 1 -i 10 -w $1 $1.ncd -par -cs 1 -e 1 -i 10 -w $1 $1.ncd -#trce -v 1 $1.ncd $2 -echo trce -v 1 $1.ncd -trce -v 1 $1.ncd -#bitgen -f $7 -w $1.ncd $2 -echo bitgen -f $7 -w $1.ncd -bitgen -f $7 -w $1.ncd -#synsvf -exe $ISPVM_DIR/ispufw -prj $1 -op p -if $1.bit -oft -int -of $1.mcs diff --git a/grlib-original/bin/route_ngc b/grlib-original/bin/route_ngc deleted file mode 100755 index d6b05262d..000000000 --- a/grlib-original/bin/route_ngc +++ /dev/null @@ -1,15 +0,0 @@ -#!/bin/sh -# route entity ucf-file device effort bitgen path map-options -#ngdbuild $1.ngc -aul -uc $2 -p $3 -sd $6 -rm $1.ngd -echo ngdbuild $1.ngc -aul -uc $2 -p $3 -sd $6 -ngdbuild $1.ngc -aul -uc $2 -p $3 -sd $6 -#ngdbuild $1.ngc -aul -uc $2 -p $3 -echo map -w -pr b -ol $4 -p $3 $1 $7 -map -w -pr b -ol $4 -p $3 $1 $7 -echo par -ol $4 -w $1 $1.ncd -par -ol $4 -w $1 $1.ncd -echo trce -v 25 $1.ncd $1.pcf -trce -v 25 $1.ncd $1.pcf -echo bitgen $1 -l -m -w -d -f $5 -bitgen $1 -l -m -w -d -f $5 diff --git a/grlib-original/bin/runvsim.do b/grlib-original/bin/runvsim.do deleted file mode 100644 index 8e44cc6a2..000000000 --- a/grlib-original/bin/runvsim.do +++ /dev/null @@ -1,3 +0,0 @@ -run -all -quit - diff --git a/grlib-original/bin/scriptgen/README.txt b/grlib-original/bin/scriptgen/README.txt deleted file mode 100644 index 461782e9f..000000000 --- a/grlib-original/bin/scriptgen/README.txt +++ /dev/null @@ -1,140 +0,0 @@ -Manual for scriptgen - -scriptgenwork -If this directory is not present in the directory calling 'make scripts', it -will be copied to that directory (this happens in dependencies.tcl). The directory -will be coped from scriptgencfg if that directory exists in the template -design or otherwise from bin/scriptgen/scripgencfg/. A local copy in the -template design can be made to contain files that can be altered by the user. -Note that "make distclean" will remove scriptgen/work. - -scriptgenwork/tools.tcl -Specifies which tools are going to be used for generating a project. This file -is sourced to main.tcl, dependencies.tcl and targets.tcl in order to only -generate files specific to the needed tools. The main part of the tcl program is -located in $GRLIB/bin/scriptgen. - -scriptgenwork/extrafiles.tcl -If files are to be included that are not found through scanning in -generatefilelists in database.tcl they may be specified here. - -Guide to adding extra files in scriptgenwork/extrafiles.tcl: -Each file and lib added must be added to both the extrafiletree and -extrafileinfo dicts. extrafiletree must follow the same structure as filetree -does in generatefilelists. - -The structure of filetree is: - Filetree is a dict. - An entry in the dict has a lib(key) and a dict(value). - An entry in the nested dict has a dir(key) and a list(value). - The list consists of files which are present within that dir. - -Each lib and file added to the filetree also has to be added to the -extrafileinfo dict. - -The structure of fileinfo is: - Fileinfo is a dict. - An entry in the dict has a lib/file(key) and a dict(value). - The nested dict has different entries depending on if it's a lib or a file. - - Entries in the nested dict for a lib are: - key : value - ------------------------------------- - bn : lib's basename - k_real : real path for that lib - - Entries in the nested dict for a file are: - key : value - ------------------------------------- - bn : lib's basename - l : parent directory dir - i : the type of the file - q : the filename - fattr : attributes on the file - -See scripgencfg-examples/extrafiles for an example of added files. - -scriptgenwork/filebuild -If an extra tool has been added, database.tcl will try to source $tool.tcl from -this folder in order to create configuration files specific to that tool. -A skeleton of a $tool.tcl file called newtool.tcl can be found in -$GRLIB/bin/scriptgen/scriptgencfg-examples. - - - - -Documentation of main program always located in $GRLIB/bin/scriptgen: - - -dependencies.tcl -If scriptgencfg is not present in the directory calling 'make scripts' -it will be copied from $GRLIB/bin/scriptgen/scriptgencfg to the calling -directory. depencencies.tcl then generates a string of files depending on which -tools are used to create the correct dependencies in the script: section in -$GRLIB/bin/Makefile. - -targets.tcl -Generates a string of files depending on which tools are used to create the -correct targets in the script: section in $GRLIB/bin/Makefile. - -main.tcl -The program which starts the filegeneration. main.tcl sources the user specific -files scriptgenwork/extrafiles.tcl and scriptgenwork/tools.tcl and then -starts database.tcl. - -database.tcl -The procs lsearchmatch, listtrim, listinfile and rmvlinebreak are help methods -for commonly used functions. - -parseenv is a proc for parsing the information contained in an environmental -variable. When environmental variables are exported from the Makefile to tcl, -white space and "|" are changed to “:” in order to export them. parseenv splits -the information when “:” is encountered and puts the information back together -and returns it. - -librarieslist and generatefilelists are procs used for scanning the filesystem -for available libs, dirs and files. librarieslist just creates the upper-most -layer of the filesystem. generatefilelists generates through scanning, a dict -for the filetree (libs, dirs and files) called filetree, a dict for information -regarding each lib/file called fileinfo. Files optionally added in -$VHDLSYNFILES $VHDLOPTSYNFILES $VHDLSIMFILES $VERILOGOPTSYNFILES -$VERILOGSYNFILES $VERILOGSIMFILES (in the specific designs Makefile) are then -added to the filetree/fileinfo dicts. generatefilelists also echoes settings -and each lib/dir scanned. - -mergefiletrees and mergefileinfos are procs used for merging the filetree and -fileinfo dicts generated in genereatefilelists with the user specified -extrafiletree and extrafileinfo in scriptgenwork/extrafiles. - -The main portion of database.tcl sets the environmentals variables needed in -the beginning, parses them and sets them as variables. These variables are used -in several proc’s in conjunction with the global command in order to fetch the -value. - -The program then calls generatefilelists mergefiletrees and mergefileinfos to -set the filetree and fileinfo dicts. - -In the last part of the program each tools creation file is sourced, that tcl -file is located in $GRLIB/bin/scriptgen/filebuild/$tool.tcl, if a user -specified tool is present it will be sourced from scriptgenwork/filebuild. - -filebuild/$tool.tcl -The $tool.tcl file has the same basic structure. This works in such a way that -a string in a specific buildfile (e.g. ghdl_make.tcl) is available (name is the -outputfilename e.g. make_ghdl_contents) and appended by each method called -(create, append or eof). - -Basic structure: -Sources each of the tools buildfiles -Calls the buildfiles create method -Scans libs, dirs and files. In libs it calls append_lib proc for some -buildfiles, and in files it calls the append_file proc for some buildfiles -After the scanning it calls eof proc of most buildfiles. - -Makefile -The make scripts section in the Makefile calls dependencies.tcl and targets.tcl -in order to correctly set dependencies and targets depending on tools specified -in tools.tcl. The makefile then exports parsed environmental variables -(whitespace and "|" is changed to ":") and starts main.tcl. The reason -environmental variables are exported instead of used as arguments is to easily -access them in tcl. diff --git a/grlib-original/bin/scriptgen/database.tcl b/grlib-original/bin/scriptgen/database.tcl deleted file mode 100644 index 94309b7d8..000000000 --- a/grlib-original/bin/scriptgen/database.tcl +++ /dev/null @@ -1,405 +0,0 @@ -if { [catch {source scriptgen_variable_values.tcl}] } { - puts stderr "File scriptgen_variable_values.tcl hasn't been generated" - puts stderr "\n" -} - -#Enables wildcards in lsearch -proc lsearchmatch {list pattern} { - set i 0 - foreach a $list { - if {[string match $a $pattern]} { - return $i - } - incr i - } - return -1 -} - -# Return the value of an attribute in an attribute list. If the attribute isn't found -# defvalue is returned. -proc getattribute {attribute attributelist defvalue} { - set a [regexp -inline $attribute=\\S+ $attributelist] - if {[string equal $a ""]} { - set a $defvalue - } else { - set a [string range $a [expr {[string length $attribute]+1}] end] - } - return $a -} - -#Trims entries in a list -proc listtrim {inputlist} { - set newlist [list] - foreach listentry $inputlist { - set newentry [string trim $listentry] - if {[expr ![expr [string equal $newentry ""] || [string equal [string index $newentry 0] "#" ] ] ] } { - lappend newlist $newentry - } - } - return $newlist -} - -#Extracts a list from a file for genereatefilelists -proc listinfile {filename} { - set infofile [open $filename r] - set info [split [read $infofile] "\n" ] - set newinfo {} - foreach i $info { - if { [string first " " $i] > -1 } { - set newinfo [concat $newinfo [split $i " "] ] - } else { - lappend newinfo $i - } - } - set info $newinfo - set info [listtrim $info] - close $infofile - return $info -} - -# Convert a string into a list of name/attribute tuples -proc converttuples {information attributes} { - set ret {} - foreach i [regexp -all -inline {\S+} $information] { - lappend ret [list $i $attributes] - } - return $ret -} - -# Extracts file names and attributes from a file list -# Removes white spaces and comments -# A comment is marked with # and continues to the end of each line -# Each file with the corresponding attributes need to be on a single line -# File name and each attribute must be separated with space (or tab) -# Future expansions: -# - Allow global attributes for each file list -# - Allow white spaces in attributes by using escape -# Not tested with attributes containing characters used in tcl -proc readfilelist {filename attributes} { - set infofile [open $filename r] - set ret {} - # Read the file line-by-line - while {[gets $infofile line] >= 0} { - # Remove everything after # on each line - set line [regsub {[ \t]*#.*} $line ""] - # Only add the line if it is non-empty - if {[regexp {\S+} $line] > 0} { - # Split each element into a list of two elements, one being the - # file name and the other the attributes - set linelist [regexp -all -inline {\S+} $line] - set linelist [concat $linelist $attributes] - lappend ret [list [lindex $linelist 0] [lreplace $linelist 0 0]] - } - } - close $infofile - return $ret -} - -proc rmvlinebreak {information} { - if {[string length $information] > 0} { - set information [string range $information 0 end-1] - } - return $information -} - -#Generates the top level of the filesystem in which generetefilelists scans -proc librarieslist {} { - global XTECHLIBS GRLIB LIBADD EXTRALIBS LIBADD - set liblist {{grlib {}}} - set liblist [concat $liblist [converttuples $XTECHLIBS {vhdlstd=93}]] - set liblist [concat $liblist [readfilelist "$GRLIB/lib/libs.txt" {}]] - foreach lib [glob -nocomplain -type f $GRLIB/lib/*/libs.txt] { - set liblist [concat $liblist [readfilelist $lib {}]] - } - set extralib [expr {[string equal [glob -nocomplain "$EXTRALIBS/libs.txt"]\ - "$EXTRALIBS/libs.txt" ] ? "$EXTRALIBS/libs.txt" : "$GRLIB/bin/libs.txt" }] - set liblist [concat $liblist [readfilelist $extralib {}]] - set liblist [concat $liblist [converttuples $LIBADD {}]] - lappend liblist {work {}} - return $liblist -} - -#Scans filesystem for available libs dirs and files, then creates a dict for -#the filetree and fileinfo, a dict that stores information about each library/file. -#Files optionally added by the user, e.g. "VHDLOPTSYNFILES" are added in the -#back of the filetree/fileinfo dicts -#Also echoes to the user the settings and each library/directory scanned. -proc generatefilelists {filetree fileinfo} { - global GRLIB EXTRALIBS DIRADD TECHLIBS XLIBSKIP GRLIB_LEON3_VERSION XDIRSKIP \ - FILEADD XFILESKIP GRLIB_CONFIG VHDLSYNFILES VHDLIPFILES VHDLOPTSYNFILES VHDLSIMFILES \ - VERILOGSYNFILES VERILOGOPTSYNFILES VERILOGSIMFILES GRLIB_SIMULATOR TOP SIMTOP - upvar $filetree ft - upvar $fileinfo fi - - puts "GRLIB settings:" - puts {\n} - puts " GRLIB = $GRLIB" - puts {\n} - if {[string equal $GRLIB_CONFIG "dummy"]} { - puts " GRLIB_CONFIG is library default" - } else { - puts " GRLIB_CONFIG = $GRLIB_CONFIG" - } - puts {\n} - puts " GRLIB_SIMULATOR = $GRLIB_SIMULATOR" - puts {\n} - puts " TECHLIBS setting = $TECHLIBS" - puts {\n} - puts " Top-level design = $TOP" - puts {\n} - puts " Simulation top-level = $SIMTOP" - puts {\n} - puts "Scanning libraries:" - - set GRLIB_real [file normalize $GRLIB] - set GRLIB_CONFIG_real [file normalize $GRLIB_CONFIG] - - foreach j [librarieslist] { - set lname [lindex $j 0] - set lattr [lindex $j 1] - set bn [exec basename $lname] - set k "$GRLIB/lib/$lname" - set k_real "$GRLIB_real/lib/$lname" - set k [expr {[string equal [glob -nocomplain $k] $k] ? $k : "$EXTRALIBS/$lname"}] - set tdirs [expr {[string equal $bn "techmap"] ? "$TECHLIBS maps" : $DIRADD}] - if {[lsearch $XLIBSKIP $bn] < 0 && [file exists "$k/dirs.txt"]} { - puts {\n} - puts " $bn:" - set libtree [dict create] - foreach d [concat [readfilelist $k/dirs.txt $lattr] [converttuples $tdirs $lattr]] { - set dname [lindex $d 0] - set dattr [lindex $d 1] - set realdir [expr {[expr [string equal $dname "leon3" ] && [expr \ - ![string equal $GRLIB_LEON3_VERSION "3"]]] ? "leon3pkgv1v2" : $dname}] - if {[lsearch $XDIRSKIP $dname] < 0 } { - set flist {} - foreach i {vlogsyn vhdlsyn svlogsyn vhdlmtie vhdlsynpe vhdldce\ - vhdlcdse vhdlxile vhdlprec vhdlprec vhdlfpro\ - vhdlp1735 vlogsim vhdlsim svlogsim } { - set m $k/$realdir/$i - if {[file exists $m.txt]} { - foreach q [concat [readfilelist $m.txt $dattr] [converttuples $FILEADD $dattr]] { - set fname [lindex $q 0] - set fattr [lindex $q 1] - set f $k/$realdir/$fname - set fx $realdir/$fname - set f_real $k_real/$realdir/$fname - if {[string equal $bn "grlib"] && \ - [string equal $realdir "stdlib"] && \ - [string equal $fname "config.vhd"] && \ - ![string equal $GRLIB_CONFIG "dummy"]} { - set f $GRLIB_CONFIG - set f_real $GRLIB_CONFIG_real - set grcfg $f - } - if {[lsearch $XFILESKIP $fname] < 0 && [file exists $f]} { - set conffiledict [dict create bn $bn f_real $f_real q $fname l $realdir i $i k $k fattr [join $fattr]] - lappend flist $f - dict set fi $f $conffiledict - } - } - } - } - if {[string equal [glob -nocomplain "$k/$dname" ] "$k/$dname" ] } { - puts "$dname" - dict set libtree $dname $flist - } - } - } - set libdict [dict create k_real $k_real bn $bn] - dict set ft $k $libtree - dict set fi $k $libdict - } - } - - puts {\n} - - set flist {} - foreach f [concat $VHDLOPTSYNFILES $VHDLSYNFILES] { - set info [regsub {[ \t]*#.*} $f ""] - set infolist [regexp -all -inline {\S+} $info] - set fname [lindex $infolist 0] - set fattr [lreplace $infolist 0 0] - if {[file exists $fname]} { - lappend flist $fname - set conffiledict [dict create bn "work" l "local" i "vhdlsyn" q $fname fattr $fattr] - dict set fi $fname $conffiledict - } - } - - foreach f $VHDLSIMFILES { - set info [regsub {[ \t]*#.*} $f ""] - set infolist [regexp -all -inline {\S+} $info] - set fname [lindex $infolist 0] - set fattr [lreplace $infolist 0 0] - if {[file exists $fname] } { - lappend flist $fname - set conffiledict [dict create bn "work" l "local" i "vhdlsim" q $fname fattr $fattr] - dict set fi $fname $conffiledict - } - } - - foreach f $VHDLIPFILES { - set info [regsub {[ \t]*#.*} $f ""] - set infolist [regexp -all -inline {\S+} $info] - set fname [lindex $infolist 0] - set fattr [lreplace $infolist 0 0] - if {[file exists $fname] } { - lappend flist $fname - set conffiledict [dict create bn "work" l "local" i "vhdlip" q $fname fattr $fattr] - dict set fi $fname $conffiledict - } - } - - foreach f [concat $VERILOGOPTSYNFILES $VERILOGSYNFILES] { - set info [regsub {[ \t]*#.*} $f ""] - set infolist [regexp -all -inline {\S+} $info] - set fname [lindex $infolist 0] - set fattr [lreplace $infolist 0 0] - if {[file exists $fname] } { - lappend flist $fname - set conffiledict [dict create bn "work" l "local" i "vlogsyn" q $fname fattr $fattr] - dict set fi $fname $conffiledict - } - } - - foreach f $VERILOGSIMFILES { - set info [regsub {[ \t]*#.*} $f ""] - set infolist [regexp -all -inline {\S+} $info] - set fname [lindex $infolist 0] - set fattr [lreplace $infolist 0 0] - if {[file exists $fname] } { - lappend flist $fname - set conffiledict [dict create bn "work" l "local" i "vlogsim" q $fname fattr $fattr] - dict set fi $fname $conffiledict - } - } - - if {[dict exists $ft "$GRLIB/lib/work" ] } { - set worklibdict [dict get $ft "$GRLIB/lib/work"] - } else { - set worklibdict [dict create] - set libdict [dict create k_real "$GRLIB_real/lib/work" bn "work"] - dict set fi "$GRLIB/lib/work" $libdict - } - - dict set worklibdict "local" $flist - set ft [dict remove $ft "work"] - dict set ft "$GRLIB/lib/work" $worklibdict - -} - -proc mergefiletrees {filetree extrafiletree} { - foreach extralib [dict keys $extrafiletree] { - set foundlib 0 - foreach lib [dict keys $filetree] { - if {[string equal $lib $extralib]} { - set foundlib 1 - foreach extradir [dict keys [dict get $extrafiletree $lib] ] { - set founddir 0 - foreach dir [dict keys [dict get $filetree $lib] ] { - if {[string equal $dir $extradir] } { - set founddir 1 - foreach extrafile [dict get [dict get $extrafiletree $extralib] $extradir] { - set foundfile 0 - foreach regularfile [dict get [dict get $filetree $lib] $dir] { - if {[string equal $regularfile $extrafile] } { - set foundfile 1 - break - } - } - if {!$foundfile} { - set libdict [dict get $filetree $lib] - set dirlist [dict get $libdict $dir] - lappend dirlist $extrafile - set libdict [dict remove $libdict $dir] - dict set libdict $dir $dirlist - set filetree [dict remove $filetree $lib] - dict set filetree $lib $libdict - } - } - break - } - } - if {!$founddir} { - set libdict [dict get $filetree $lib] - dict set libdict $extradir [dict get [dict get $extrafiletree $extralib] $extradir] - set filetree [dict remove $filetree $lib] - dict set filetree $lib $libdict - } - } - break - } - } - if {!$foundlib} { - dict set filetree $extralib [dict get $extrafiletree $extralib] - } - } - return $filetree -} - -proc mergefileinfos {fileinfo extrafileinfo} { - foreach extrafile [dict keys $extrafileinfo] { - set found 0 - foreach regularfile [dict keys $fileinfo] { - if {[string equal $regularfile $extrafile] } { - set fileinfo [dict remove $fileinfo $extrafile] - dict set fileinfo $extrafile [dict get $extrafileinfo $extrafile] - set found 1 - } - } - if {!$found} { - dict set fileinfo $extrafile [dict get $extrafileinfo $extrafile] - } - } - return $fileinfo -} - -set varfile [open "$GRLIB/bin/scriptgen/scriptgen_variables.txt" r] -set envvars [split [read $varfile] "\n" ] - -foreach envvar $envvars { - if {$envvar != "" && ![info exists $envvar]} { - puts "No value found for $envvar, setting it to {}" - puts {\n} - set $envvar {} - } -} - -set filetree [dict create] -set fileinfo [dict create] -set GRLIB [file dirname $GRLIB/bin] -generatefilelists filetree fileinfo -set filetree [mergefiletrees $filetree $extrafiletree] -set fileinfo [mergefileinfos $fileinfo $extrafileinfo] - - - -set basenames {} -foreach f [dict keys $filetree] { - lappend basenames [dict get [dict get $fileinfo $f] bn] -} -set libtxtfile [open "libs.txt" w] -puts $libtxtfile "$basenames " -close $libtxtfile - -foreach tool $tools { - switch $tool { - "actel" - "aldec" - "altera" - "cdns" - "ghdl" - - "lattice" - "mentor" - "microsemi" - "snps" - "nanoxplore" - - "xlnx" { - if { [ file exists "$GRLIB/bin/scriptgen/filebuild/$tool.tcl" ] } { - source "$GRLIB/bin/scriptgen/filebuild/$tool.tcl" - } - continue - } - default { - if { [catch {source "scriptgenwork/filebuild/$tool.tcl"} fid] } { - puts stderr "Error with added tool: \"$tool\"!" - puts stderr "$fid\n" - puts stderr "Continuing:\n" - } - continue - } - } -} diff --git a/grlib-original/bin/scriptgen/dependencies.tcl b/grlib-original/bin/scriptgen/dependencies.tcl deleted file mode 100644 index 3e6e6aaab..000000000 --- a/grlib-original/bin/scriptgen/dependencies.tcl +++ /dev/null @@ -1,83 +0,0 @@ - -set toolsstring "" - -if {[info exists ::env(TOP)]} { - set TOP $::env(TOP) -} -if {[info exists ::env(GRLIB)]} { - set GRLIB $::env(GRLIB) -} - -if {[expr ![string equal [glob -nocomplain -type d scriptgenwork] scriptgenwork ] ] } { - if {[expr ![string equal [glob -nocomplain -type d scriptgencfg] scriptgencfg ] ] } { - file copy $GRLIB/bin/scriptgen/scriptgencfg scriptgenwork - } else { - file copy scriptgencfg scriptgenwork - } -} - -source "scriptgenwork/tools.tcl" -foreach tool $tools { - switch $tool { - "aldec" { - append toolsstring "compile.asim " - append toolsstring "make.riviera " - append toolsstring "riviera_ws_create.do " - continue - } - "altera" { - append toolsstring "$TOP\_quartus.qsf " - continue - } - "cdns" { - append toolsstring "compile.ncsim " - append toolsstring "compile.rc " - append toolsstring "$TOP\.rc " - continue - } - "ghdl" { - append toolsstring "make.ghdl " - continue - } - "lattice" { - append toolsstring "$TOP\.ldf " - continue - } - "mentor" { - append toolsstring "compile.vsim " - append toolsstring "modelsim.ini " - append toolsstring "$TOP\_rtl_fpro.fl " - continue - } - "microsemi" { - append toolsstring "$TOP\_designer.tcl " - append toolsstring "$TOP\_libero.prj " - continue - } - "snps" { - append toolsstring "compile.simv " - append toolsstring "synopsys_sim.setup " - append toolsstring "compile.dc " - append toolsstring "compile.synp " - append toolsstring "$TOP\_synplify.prj " - append toolsstring "$TOP\_dc.tcl " - append toolsstring "make.simv " - continue - } - "xlnx" { - append toolsstring "vivado/$TOP\_vivado.tcl " - append toolsstring "planahead/$TOP\_planAhead.tcl " - append toolsstring "compile.xst " - append toolsstring "$TOP.xst " - append toolsstring "$TOP.npl " - append toolsstring "$TOP\_ise.tcl " - continue - } - "nanoxplore" { - append toolsstring "$TOP\_nanoxmap.py " - continue - } - } -} - -puts $toolsstring diff --git a/grlib-original/bin/scriptgen/filebuild/actel.tcl b/grlib-original/bin/scriptgen/filebuild/actel.tcl deleted file mode 100644 index e29c82784..000000000 --- a/grlib-original/bin/scriptgen/filebuild/actel.tcl +++ /dev/null @@ -1,83 +0,0 @@ -proc actel_create_tool { } { - global DESIGNER_LAYOUT_OPT DESIGNER_PACKAGE DESIGNER_PART DESIGNER_PINS DESIGNER_RADEXP DESIGNER_TECHNOLOGY DESIGNER_TEMPR DESIGNER_VOLTAGE DESIGNER_VOLTRANGE GRLIB PDC PDC_EXTRA SDC SDC_EXTRA SPEED TECHNOLOGY TOP - - set configinfo "new_design -name \"$TOP\" -family \"$DESIGNER_TECHNOLOGY\"\n" - if {[string equal $DESIGNER_RADEXP "" ] } { - append configinfo "set_device -die \"$DESIGNER_PART\" -package \"$DESIGNER_PINS $DESIGNER_PACKAGE\" -speed \"$SPEED\" -voltage \"$DESIGNER_VOLTAGE\" -iostd \"LVTTL\" -jtag \"yes\" -probe \"yes\" -trst \"yes\" -temprange \"$DESIGNER_TEMPR\" -voltrange \"$DESIGNER_VOLTRANGE\"\n" - } else { - append configinfo "set_device -die \"$DESIGNER_PART\" -package \"$DESIGNER_PINS $DESIGNER_PACKAGE\" -speed \"$SPEED\" -voltage \"$DESIGNER_VOLTAGE\" -iostd \"LVTTL\" -jtag \"yes\" -probe \"yes\" -trst \"yes\" -temprange \"$DESIGNER_TEMPR\" -voltrange \"$DESIGNER_VOLTRANGE\" -radexp \"$DESIGNER_RADEXP\"\n" - } - append configinfo "if {\[file exist $TOP.pdc\]} {\n" - append configinfo "import_source -format \"edif\" -edif_flavor \"GENERIC\" -merge_physical \"no\" -merge_timing \"no\" {synplify/$TOP.edf} -format \"pdc\" -abort_on_error \"no\" {$TOP.pdc}\n" - append configinfo "} else {\n" - append configinfo "import_source -format \"edif\" -edif_flavor \"GENERIC\" -merge_physical \"no\" -merge_timing \"no\" {synplify/$TOP.edf}\n" - append configinfo "}\n" - set designer_act_file [open "$TOP\_designer_act.tcl" w] - - puts $designer_act_file $configinfo - puts $designer_act_file "save_design {$TOP.adb}\n" - close $designer_act_file - - append configinfo "compile -combine_register 1\n" - if {![string equal $PDC ""] } { - append configinfo "if {\[file exists $PDC\]} {\n" - append configinfo " import_aux -format \"pdc\" -abort_on_error \"no\" {$PDC}\n" - append configinfo " pin_commit\n" - append configinfo "} else {\n" - append configinfo " puts \"WARNING: No PDC file imported.\"\n" - append configinfo "}\n" - } else { - append configinfo "puts \"WARNING: No PDC file imported.\"\n" - } - if {![string equal $PDC_EXTRA ""] } { - append configinfo "if {\[file exists $PDC_EXTRA\]} {\n" - append configinfo " import_aux -format \"pdc\" -abort_on_error \"no\" {$PDC_EXTRA}\n" - append configinfo " pin_commit\n" - append configinfo "} else {\n" - append configinfo " puts \"WARNING: No PDC_EXTRA file imported.\"\n" - append configinfo "}\n" - } - if {![string equal $SDC ""] } { - append configinfo "if {\[file exists $SDC\]} {\n" - append configinfo " import_aux -format \"sdc\" -merge_timing \"no\" {$SDC}\n" - append configinfo "} else {\n" - append configinfo " puts \"WARNING: No SDC file imported.\"\n" - append configinfo "}\n" - } else { - append configinfo "puts \"WARNING: No SDC file imported.\"\n" - } - if {![string equal $SDC_EXTRA ""] } { - append configinfo "if {\[file exists $SDC_EXTRA\]} {\n" - append configinfo " import_aux -format \"sdc\" -merge_timing \"yes\" {$SDC_EXTRA}\n" - append configinfo "} else {\n" - append configinfo " puts \"WARNING: No SDC_EXTRA file imported.\"\n" - append configinfo "}\n" - } - append configinfo "save_design {$TOP.adb}\n" - append configinfo "report -type status {./actel/report_status_pre.log}\n" - append configinfo "layout $DESIGNER_LAYOUT_OPT\n" - append configinfo "save_design {$TOP.adb}\n" - append configinfo "backannotate -dir {./actel} -name \"$TOP\" -format \"SDF\" -language \"VHDL93\" -netlist\n" - append configinfo "report -type \"timer\" -analysis \"max\" -print_summary \"yes\" -use_slack_threshold \"no\" -print_paths \"yes\" -max_paths 100 -max_expanded_paths 5 -include_user_sets \"yes\" -include_pin_to_pin \"yes\" -select_clock_domains \"no\" {./actel/report_timer_max.txt}\n" - append configinfo "report -type \"timer\" -analysis \"min\" -print_summary \"yes\" -use_slack_threshold \"no\" -print_paths \"yes\" -max_paths 100 -max_expanded_paths 5 -include_user_sets \"yes\" -include_pin_to_pin \"yes\" -select_clock_domains \"no\" {./actel/report_timer_min.txt}\n" - append configinfo "report -type \"pin\" -listby \"name\" {./actel/report_pin_name.log}\n" - append configinfo "report -type \"pin\" -listby \"number\" {./actel/report_pin_number.log}\n" - append configinfo "report -type \"datasheet\" {./actel/report_datasheet.txt}\n" - if {[string equal $TECHNOLOGY "Axcelerator" ] } { - append configinfo "export -format \"AFM-APS2\" -trstb_pullup \"yes\" -global_set_fuse \"reset\" -axprg_set_algo \"UMA\" {./actel/$TOP.afm}\n" - append configinfo "export -format \"prb\" {./actel/$TOP.prb}\n" - } else { - append configinfo "export -format \"pdb\" -feature \"prog_fpga\" -io_state \"Tri-State\" {./actel/$TOP.pdb}\n" - } - append configinfo "export -format log -diagnostic {./actel/report_log.log}\n" - append configinfo "report -type status {./actel/report_status_post.log}\n" - append configinfo "save_design {$TOP.adb}\n" - - set libfile [open "$TOP\_designer.tcl" w] - puts $libfile $configinfo - close $libfile -} - - -actel_create_tool -return diff --git a/grlib-original/bin/scriptgen/filebuild/aldec.tcl b/grlib-original/bin/scriptgen/filebuild/aldec.tcl deleted file mode 100644 index 5824dcf38..000000000 --- a/grlib-original/bin/scriptgen/filebuild/aldec.tcl +++ /dev/null @@ -1,71 +0,0 @@ -#Note: Special fixes are present to maintain a sequential make.riviera -proc aldec_create_tool {filetree fileinfo} { - global GRLIB - - source "$GRLIB/bin/scriptgen/filebuild/aldec_alibs.tcl" - source "$GRLIB/bin/scriptgen/filebuild/aldec_asim.tcl" - source "$GRLIB/bin/scriptgen/filebuild/aldec_make_riv.tcl" - source "$GRLIB/bin/scriptgen/filebuild/aldec_riv_create.tcl" - - create_aldec_make_riv - create_aldec_riv_create - - set riv_path "" - set riv_bn {} - set riv_fs "" - set previ "" - set prevattr "" - set reachedoptfiles 0 - foreach k [dict keys $filetree] { - set ktree [dict get $filetree $k] - set kinfo [dict get $fileinfo $k] - append_lib_aldec_alibs $k $kinfo - append_lib_aldec_riv_create $k $kinfo riv_bn - foreach l [dict keys $ktree] { - set filelist [dict get $ktree $l] - foreach f $filelist { - set finfo [dict get $fileinfo $f] - set i [dict get $finfo i] - set bn [dict get $finfo bn] - set fattr [dict get $finfo fattr] - if {!$reachedoptfiles && [string equal $bn "work"] && [string equal $l "local"] } { - append_special_aldec_make_riv - set reachedoptfiles 1 - } - if {![string equal $i $previ] && ![string equal "" $previ] } { - if {[string length $riv_fs] > 0 } { - append_type_aldec_make_riv $k $kinfo $previ $prevattr $riv_fs - } - set riv_fs "" - } - if {![string equal [getattribute vhdlstd $fattr 93] [getattribute vhdlstd $prevattr 93]] && - ![string equal "" $prevattr]} { - # If a file is tagged with a vhdlstd attribute, add the - # previous files to the make file and start a new row - if {[string length $riv_fs] > 0 } { - append_type_aldec_make_riv $k $kinfo $previ $prevattr $riv_fs - } - set riv_fs "" - } - append_file_aldec_riv_create $f $finfo riv_fs $riv_path - append_file_aldec_asim $f $finfo - append_file_aldec_make_riv $f $finfo - set previ $i - set prevattr $fattr - } - if {[string length $riv_fs] > 0 } { - append_type_aldec_make_riv $k $kinfo $previ $prevattr $riv_fs - } - set riv_fs "" - set previ "" - set prevattr "" - } - } - eof_aldec_alibs - eof_aldec_asim - eof_aldec_make_riv - eof_aldec_riv_create -} - -aldec_create_tool $filetree $fileinfo -return diff --git a/grlib-original/bin/scriptgen/filebuild/aldec_alibs.tcl b/grlib-original/bin/scriptgen/filebuild/aldec_alibs.tcl deleted file mode 100644 index 5c006aa63..000000000 --- a/grlib-original/bin/scriptgen/filebuild/aldec_alibs.tcl +++ /dev/null @@ -1,16 +0,0 @@ -set alibs_do_contents "" -proc append_lib_aldec_alibs {k kinfo } { - upvar alibs_do_contents adc - set bn [dict get $kinfo bn] - append adc "\nalib $bn $bn.lib " - return -} - -proc eof_aldec_alibs {} { - upvar alibs_do_contents adc - set alibfile [open "alibs.do" w] - puts $alibfile $adc - puts $alibfile "\ncd ../../" - close $alibfile - return -} diff --git a/grlib-original/bin/scriptgen/filebuild/aldec_asim.tcl b/grlib-original/bin/scriptgen/filebuild/aldec_asim.tcl deleted file mode 100644 index d49fad4d9..000000000 --- a/grlib-original/bin/scriptgen/filebuild/aldec_asim.tcl +++ /dev/null @@ -1,127 +0,0 @@ -set make_asim_addfile_contents "" -set make_asim_contents "" -set compile_asim_contents "" -proc append_file_aldec_asim {f finfo} { - set i [dict get $finfo i] - set bn [dict get $finfo bn] - set fattr [dict get $finfo fattr] - set vhdlstd [getattribute vhdlstd $fattr 93] - switch $i { - "vhdlp1735" { - global ACOM VHDLOPT - upvar compile_asim_contents cac - append cac "\t$ACOM $VHDLOPT -$vhdlstd -work $bn $f\n" - return - } - "vhdlmtie" { - return - } - "vhdlsynpe" { - return - } - "vhdldce" { - return - } - "vhdlcdse" { - return - } - "vhdlxile" { - return - } - "vhdlfpro" { - return - } - "vhdlprec" { - return - } - "vhdlsyn" { - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - upvar make_asim_contents mac - global ACOM VHDLOPT - append mac "\n\t$ACOM $VHDLOPT -$vhdlstd -work $bn $f" - upvar make_asim_addfile_contents maac - append maac "\naddfile -vhdl $f" - } else { - global ACOM VHDLOPT - upvar compile_asim_contents cac - append cac "\t$ACOM $VHDLOPT -$vhdlstd -work $bn $f\n" - } - return - } - "vlogsyn" { - global ALOG - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - upvar make_asim_contents mac - append mac "\n\t$ALOG -work $bn $f" - } else { - upvar compile_asim_contents cac - append cac "\t$ALOG -work $bn $f\n" - } - return - } - "svlogsyn" { - global ALOG - upvar compile_asim_contents cac - append cac "\t$ALOG -work $bn $f\n" - return - } - "vhdlsim" { - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - global ACOM VHDLOPT - upvar make_asim_contents mac - append mac "\n\t$ACOM $VHDLOPT -$vhdlstd -work $bn $f" - upvar make_asim_addfile_contents maac - append maac "\naddfile -vhdl $f" - } else { - upvar compile_asim_contents cac - global ACOM VHDLOPT - append cac "\t$ACOM $VHDLOPT -$vhdlstd -work $bn $f\n" - } - return - } - "vlogsim" { - global ALOG - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - upvar make_asim_contents mac - append mac "\n\t$ALOG -work $bn $f" - } else { - upvar compile_asim_contents cac - append cac "\t$ALOG -work $bn $f\n" - } - return - } - "svlogsim" { - global ALOG - upvar compile_asim_contents cac - append cac "\t$ALOG -work $bn $f\n" - return - } - } - return -} - -proc eof_aldec_asim {} { - upvar make_asim_contents mac - upvar compile_asim_contents cac - upvar make_asim_addfile_contents maac - set compfile [open "compile.asim" w] - if {[string length $cac] > 0 } { - set cac [string range $cac 0 end-1] - } - puts $compfile $cac - close $compfile - set temp $cac - append temp $mac - set mac $temp - set makefile [open "make.asim" w] - puts $makefile $temp - close $makefile - set addfile [open "make.asim-addfile" w] - puts $addfile $maac - close $addfile - return -} diff --git a/grlib-original/bin/scriptgen/filebuild/aldec_make_riv.tcl b/grlib-original/bin/scriptgen/filebuild/aldec_make_riv.tcl deleted file mode 100644 index 21abdce09..000000000 --- a/grlib-original/bin/scriptgen/filebuild/aldec_make_riv.tcl +++ /dev/null @@ -1,120 +0,0 @@ -set make_riviera_contents "" -proc create_aldec_make_riv {} { - upvar make_riviera_contents mrc - append mrc "all: \n" - return -} - -proc append_file_aldec_make_riv {f finfo} { - set i [dict get $finfo i] - set bn [dict get $finfo bn] - set fattr [dict get $finfo fattr] - set vhdlstd [getattribute vhdlstd $fattr 93] - switch $i { - "vhdlp1735" { - return - } - "vhdlmtie" { - return - } - "vhdlsynpe" { - return - } - "vhdldce" { - return - } - "vhdlcdse" { - return - } - "vhdlxile" { - return - } - "vhdlfpro" { - return - } - "vhdlprec" { - return - } - "vhdlsyn" { - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - global TOP VCOM VHDLOPT - upvar make_riviera_contents mrc - append mrc "\n\t$VCOM $VHDLOPT -$vhdlstd -work $bn $f" - } - return - } - "vlogsyn" { - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - global TOP VLOG - upvar make_riviera_contents mrc - append mrc "\n\t$VLOG -work $bn $f" - } - return - } - "svlogsyn" { - return - } - "vhdlsim" { - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - global TOP VCOM VHDLOPT - upvar make_riviera_contents mrc - append mrc "\n\t$VCOM $VHDLOPT -$vhdlstd -work $bn $f" - } - return - } - "vlogsim" { - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - global TOP VLOG - upvar make_riviera_contents mrc - append mrc "\n\t$VLOG -work $bn $f" - } - return - } - "svlogsim" { - return - } - } - return -} - -proc append_special_aldec_make_riv {} { - global GRLIB - upvar make_riviera_contents mrc - append mrc "\t@if test -r $GRLIB/lib/tech/secureip/ise/mcb_001.vp && test\ - -r modelsim/secureip; then vlog -quiet " - append mrc "-work secureip\ - $GRLIB/lib/tech/secureip/ise/mcb_*.vp; fi" -} - -proc append_type_aldec_make_riv {k kinfo i attr riv_fs} { - if {[string equal $i "vhdlsim"] || [string equal $i "vhdlsyn"] || [string equal $i "vhdlmtie"] || [string equal $i "vhdlp1735"] } { - global VCOM - upvar make_riviera_contents mrc - set bn [dict get $kinfo bn] - set vhdlstd [getattribute vhdlstd $attr 93] - append mrc "\t$VCOM -$vhdlstd -work $bn $riv_fs\n" - } elseif {[string equal $i "vlogsim"] || [string equal $i "vlogsyn"] } { - global VLOG - upvar make_riviera_contents mrc - set bn [dict get $kinfo bn] - append mrc "\t$VLOG -work $bn $riv_fs\n" - } elseif {[string equal $i "svlogsim"] || [string equal $i "svlogsyn"] } { - global SVLOG - upvar make_riviera_contents mrc - set bn [dict get $kinfo bn] - append mrc "\t$SVLOG -work $bn $riv_fs\n" - } - return -} - -proc eof_aldec_make_riv {} { - upvar make_riviera_contents mrc - global GRLIB - set makefile [open "make.riviera" w] - puts $makefile $mrc - close $makefile -} diff --git a/grlib-original/bin/scriptgen/filebuild/aldec_riv_create.tcl b/grlib-original/bin/scriptgen/filebuild/aldec_riv_create.tcl deleted file mode 100644 index 19dd18bb1..000000000 --- a/grlib-original/bin/scriptgen/filebuild/aldec_riv_create.tcl +++ /dev/null @@ -1,156 +0,0 @@ -set riviera_ws_create_do_contents "" -proc create_aldec_riv_create {} { - upvar riviera_ws_create_do_contents rwcdc - append rwcdc "workspace.create riviera_ws ." - return -} - -proc append_lib_aldec_riv_create {k kdict riv_bn} { - upvar $riv_bn rivbn - upvar riviera_ws_create_do_contents rwcdc - set bn [dict get $kdict bn] - append rwcdc "\nworkspace.design.create $bn . " - append rwcdc "\nworkspace.design.setactive $bn " - foreach riv_bn_map $rivbn { - append rwcdc "\nworkspace.dependencies.add $bn $riv_bn_map " - } - lappend rivbn $bn - foreach riv_bn_map $rivbn { - append rwcdc "\namap $riv_bn_map $riv_bn_map/$riv_bn_map/$riv_bn_map.lib " - } - return -} - -proc append_file_aldec_riv_create {f finfo riv_fs riv_path} { - set i [dict get $finfo i] - set bn [dict get $finfo bn] - switch $i { - "vhdlp1735" { - upvar $riv_fs rivfs - upvar riviera_ws_create_do_contents rwcdc - set rivfs "$rivfs $f" - set f_real [dict get $finfo f_real] - append rwcdc "\ndesign.file.add $riv_path$f_real" - return - } - "vhdlmtie" { - upvar $riv_fs rivfs - upvar riviera_ws_create_do_contents rwcdc - set rivfs "$rivfs $f" - set f_real [dict get $finfo f_real] - append rwcdc "\ndesign.file.add $riv_path$f_real" - return - } - "vhdlsynpe" { - return - } - "vhdldce" { - return - } - "vhdlcdse" { - return - } - "vhdlxile" { - return - } - "vhdlfpro" { - return - } - "vhdlprec" { - return - } - "vhdlsyn" { - upvar riviera_ws_create_do_contents rwcdc - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - if {[string equal [glob -nocomplain "/$f"] "/$f" ] } { - append rwcdc "\ndesign.file.add $f" - } else { - append rwcdc "\ndesign.file.add ../$f" - } - } else { - upvar $riv_fs rivfs - set rivfs "$rivfs $f" - set f_real [dict get $finfo f_real] - append rwcdc "\ndesign.file.add $riv_path$f_real" - } - return - } - "vlogsyn" { - upvar riviera_ws_create_do_contents rwcdc - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - if {[string equal [glob -nocomplain "/$f"] "/$f" ] } { - append rwcdc "\ndesign.file.add $f" - } else { - append rwcdc "\ndesign.file.add ../$f" - } - } else { - upvar $riv_fs rivfs - set rivfs "$rivfs $f" - set f_real [dict get $finfo f_real] - append rwcdc "\ndesign.file.add $riv_path$f_real" - } - return - } - "svlogsyn" { - upvar riviera_ws_create_do_contents rwcdc - upvar $riv_fs rivfs - set rivfs "$rivfs $f" - set f_real [dict get $finfo f_real] - append rwcdc "\ndesign.file.add $riv_path$f_real" - return - } - "vhdlsim" { - upvar riviera_ws_create_do_contents rwcdc - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - if {[string equal [glob -nocomplain "/$f"] "/$f" ] } { - append rwcdc "\ndesign.file.add $f" - } else { - append rwcdc "\ndesign.file.add ../$f" - } - } else { - upvar $riv_fs rivfs - set rivfs "$rivfs $f" - set f_real [dict get $finfo f_real] - append rwcdc "\ndesign.file.add $riv_path$f_real" - } - return - } - "vlogsim" { - upvar riviera_ws_create_do_contents rwcdc - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - if {[string equal [glob -nocomplain "/$f"] "/$f" ] } { - append rwcdc "\ndesign.file.add $f" - } else { - append rwcdc "\ndesign.file.add ../$f" - } - } else { - upvar $riv_fs rivfs - set rivfs "$rivfs $f" - set f_real [dict get $finfo f_real] - append rwcdc "\ndesign.file.add $riv_path$f_real" - } - return - } - "svlogsim" { - upvar riviera_ws_create_do_contents rwcdc - upvar $riv_fs rivfs - set rivfs "$rivfs $f" - set f_real [dict get $finfo f_real] - append rwcdc "\ndesign.file.add $riv_path$f_real" - return - } - } - return -} - -proc eof_aldec_riv_create {} { - upvar riviera_ws_create_do_contents rwcdc - set rivierafile [open "riviera_ws_create.do" w] - puts $rivierafile $rwcdc - close $rivierafile - return -} diff --git a/grlib-original/bin/scriptgen/filebuild/altera.tcl b/grlib-original/bin/scriptgen/filebuild/altera.tcl deleted file mode 100644 index 7b2ae912c..000000000 --- a/grlib-original/bin/scriptgen/filebuild/altera.tcl +++ /dev/null @@ -1,26 +0,0 @@ -proc altera_create_tool {filetree fileinfo} { - global GRLIB - source "$GRLIB/bin/scriptgen/filebuild/altera_quartus.tcl" - source "$GRLIB/bin/scriptgen/filebuild/altera_synplify.tcl" - - create_altera_quartus - create_altera_synplify - - foreach k [dict keys $filetree] { - set ktree [dict get $filetree $k] - set kinfo [dict get $fileinfo $k] - foreach l [dict keys $ktree] { - set filelist [dict get $ktree $l] - foreach f $filelist { - set finfo [dict get $fileinfo $f] - append_file_altera_quartus $f $finfo - - } - } - } - eof_altera_quartus - eof_altera_synplify -} - -altera_create_tool $filetree $fileinfo -return diff --git a/grlib-original/bin/scriptgen/filebuild/altera_quartus.tcl b/grlib-original/bin/scriptgen/filebuild/altera_quartus.tcl deleted file mode 100644 index 0fac6417d..000000000 --- a/grlib-original/bin/scriptgen/filebuild/altera_quartus.tcl +++ /dev/null @@ -1,117 +0,0 @@ -set TOP_quartus_qsf_contents "" -set TOP_quartus_qpf_contents "" - -proc create_altera_quartus {} { - global GRLIB TOP - upvar TOP_quartus_qsf_contents tqsc - upvar TOP_quartus_qpf_contents tqpc - set readfile [open "$GRLIB/bin/quartus.qsf_head" r] - append tqsc [read $readfile] - close $readfile - set readfile [open "$GRLIB/bin/quartus.qpf" r] - append tqpc [read $readfile] - close $readfile - append tqpc "PROJECT_REVISION = $TOP" - return -} - -proc append_file_altera_quartus {f finfo } { - set i [dict get $finfo i] - set bn [dict get $finfo bn] - switch $i { - "vhdlp1735" { - return - } - "vhdlmtie" { - return - } - "vhdlsynpe" { - return - } - "vhdldce" { - return - } - "vhdlcdse" { - return - } - "vhdlxile" { - return - } - "vhdlfpro" { - return - } - "vhdlprec" { - return - } - "vhdlsyn" { - global TOP - upvar TOP_quartus_qsf_contents tqsc - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - append tqsc "set_global_assignment -name VHDL_FILE $f\n" - } else { - global QUARTUSLIBSKIP QDIRSKIP QUARTUSSKIP - set q [dict get $finfo q] - if {[lsearchmatch $QUARTUSLIBSKIP $bn] < 0 && [lsearchmatch $QDIRSKIP $l] < 0 && [lsearchmatch $QUARTUSSKIP $q] < 0 } { - append tqsc "set_global_assignment -name VHDL_FILE $f -library $bn\n" - } - } - return - } - "vlogsyn" { - global TOP - upvar TOP_quartus_qsf_contents tqsc - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - append tqsc "set_global_assignment -name VERILOG_FILE $f\n" - } else { - global QUARTUSLIBSKIP QDIRSKIP QUARTUSSKIP - set q [dict get $finfo q] - if {[lsearchmatch $QUARTUSLIBSKIP $bn] < 0 && [lsearchmatch $QDIRSKIP $l] < 0 && [lsearchmatch $QUARTUSSKIP $q] < 0 } { - append tqsc "set_global_assignment -name VERILOG_FILE $f -library $bn\n" - } - } - return - } - "svlogsyn" { - global TOP - upvar TOP_quartus_qsf_contents tqsc - append tqsc "set_global_assignment -name VERILOG_FILE $f -library $bn\n" - return - } - "vhdlsim" { - return - } - "vlogsim" { - return - } - "svlogsim" { - return - } - } - return -} - -proc eof_altera_quartus {} { - global TOP QSF QSF_APPEND - upvar TOP_quartus_qsf_contents tqsc - upvar TOP_quartus_qpf_contents tqpc - append tqsc "\nset_global_assignment -name TOP_LEVEL_ENTITY \"$TOP\"" - if {[string equal [glob -nocomplain "$QSF"] $QSF ] } { - set readfile [open "$QSF" r] - append tqsc "\n[read $readfile]" - close $readfile - } - if {[string equal [glob -nocomplain "$QSF_APPEND"] $QSF_APPEND ] } { - set readfile [open "$QSF_APPEND" r] - append tqsc "\n[read $readfile]" - close $readfile - } - set qsffile [open "$TOP\_quartus.qsf" w] - puts $qsffile $tqsc - close $qsffile - set qpffile [open "$TOP\_quartus.qpf" w] - puts $qpffile $tqpc - close $qpffile - return -} diff --git a/grlib-original/bin/scriptgen/filebuild/altera_synplify.tcl b/grlib-original/bin/scriptgen/filebuild/altera_synplify.tcl deleted file mode 100644 index 85f37baae..000000000 --- a/grlib-original/bin/scriptgen/filebuild/altera_synplify.tcl +++ /dev/null @@ -1,37 +0,0 @@ -set TOP_synplify_qsf_contents "" -set TOP_synplify_qpf_contents "" - -proc create_altera_synplify {} { - global GRLIB TOP QSF - upvar TOP_synplify_qsf_contents tssc - upvar TOP_synplify_qpf_contents tspc - set readfile [open "$GRLIB/bin/quartus.qsf_head" r] - append tssc [read $readfile] - close $readfile - append tssc "set_global_assignment -name VQM_FILE synplify/$TOP.edf" - if {[file exists $QSF] } { - append tssc "\n" - set readfile [open "$QSF" r] - append tssc [read $readfile] - close $readfile - } - set readfile [open "$GRLIB/bin/quartus.qpf" r] - append tspc [read $readfile] - close $readfile - append tspc "PROJECT_REVISION = $TOP\_synplify" - return -} - -proc eof_altera_synplify {} { - global TOP - upvar TOP_synplify_qsf_contents tssc - upvar TOP_synplify_qpf_contents tspc - set qsffile [open "$TOP\_synplify.qsf" w] - append tssc "\n\nset_global_assignment -name TOP_LEVEL_ENTITY \"$TOP\"" - puts $qsffile $tssc - close $qsffile - set qpffile [open "$TOP\_synplify.qpf" w] - puts $qpffile $tspc - close $qpffile - return -} diff --git a/grlib-original/bin/scriptgen/filebuild/cdns.tcl b/grlib-original/bin/scriptgen/filebuild/cdns.tcl deleted file mode 100644 index 9a02e25d5..000000000 --- a/grlib-original/bin/scriptgen/filebuild/cdns.tcl +++ /dev/null @@ -1,33 +0,0 @@ -proc cdns_create_tool {filetree fileinfo} { - global GRLIB - source "$GRLIB/bin/scriptgen/filebuild/cdns_cds.tcl" - source "$GRLIB/bin/scriptgen/filebuild/cdns_hdl.tcl" - source "$GRLIB/bin/scriptgen/filebuild/cdns_ncsim.tcl" - source "$GRLIB/bin/scriptgen/filebuild/cdns_rc.tcl" - - create_cdns_cds - create_cdns_hdl - create_cdns_ncsim - create_cdns_rc - - foreach k [dict keys $filetree] { - set ktree [dict get $filetree $k] - set kinfo [dict get $fileinfo $k] - append_lib_cdns_cds $k $kinfo - append_lib_cdns_ncsim $k $kinfo - foreach l [dict keys $ktree] { - set filelist [dict get $ktree $l] - foreach f $filelist { - set finfo [dict get $fileinfo $f] - append_file_cdns_ncsim $f $finfo - append_file_cdns_rc $f $finfo - } - } - } - eof_cdns_cds - eof_cdns_ncsim - eof_cdns_rc -} - -cdns_create_tool $filetree $fileinfo -return diff --git a/grlib-original/bin/scriptgen/filebuild/cdns_cds.tcl b/grlib-original/bin/scriptgen/filebuild/cdns_cds.tcl deleted file mode 100644 index 7bc537e54..000000000 --- a/grlib-original/bin/scriptgen/filebuild/cdns_cds.tcl +++ /dev/null @@ -1,28 +0,0 @@ -set cds_lib_contents "" -proc create_cdns_cds {} { - upvar cds_lib_contents clc - global GRLIB - set readfile [open "$GRLIB/bin/cds.lib" r] - append clc [read $readfile] - close $readfile - return -} - -proc append_lib_cdns_cds {k kinfo} { - upvar cds_lib_contents clc - set bn [dict get $kinfo bn] - append clc "DEFINE $bn xncsim/$bn \n" - return -} - -proc eof_cdns_cds {} { - upvar cds_lib_contents clc - if {[string length $clc] > 0 } { - set clc [string range $clc 0 end-1] - } - set cdfile [open "cds.lib" a] - puts $cdfile $clc - close $cdfile - return -} - diff --git a/grlib-original/bin/scriptgen/filebuild/cdns_hdl.tcl b/grlib-original/bin/scriptgen/filebuild/cdns_hdl.tcl deleted file mode 100644 index 0390432ee..000000000 --- a/grlib-original/bin/scriptgen/filebuild/cdns_hdl.tcl +++ /dev/null @@ -1,5 +0,0 @@ -proc create_cdns_hdl {} { - set hdlfile [open "hdl.var" w] - close $hdlfile - return -} diff --git a/grlib-original/bin/scriptgen/filebuild/cdns_ncsim.tcl b/grlib-original/bin/scriptgen/filebuild/cdns_ncsim.tcl deleted file mode 100644 index a3e116bee..000000000 --- a/grlib-original/bin/scriptgen/filebuild/cdns_ncsim.tcl +++ /dev/null @@ -1,145 +0,0 @@ -set compile_ncsim_contents "" -set make_ncsim_contents "" - -proc create_cdns_ncsim {} { - upvar compile_ncsim_contents cnc - append cnc "\tmkdir xncsim" - return -} - -proc append_lib_cdns_ncsim {k kinfo} { - upvar compile_ncsim_contents cnc - set bn [dict get $kinfo bn] - append cnc "\n\tmkdir xncsim/$bn" - return -} - -proc append_file_cdns_ncsim {f finfo} { - global VHDLOPT NCVHDL NCVLOG - set i [dict get $finfo i] - set bn [dict get $finfo bn] - switch $i { - "vhdlp1735" { - return - } - "vhdlmtie" { - return - } - "vhdlsynpe" { - return - } - "vhdldce" { - return - } - "vhdlcdse" { - upvar compile_ncsim_contents cnc - append cnc "\n\t$NCVHDL $VHDLOPT $bn $f" - return - } - "vhdlxile" { - return - } - "vhdlfpro" { - return - } - "vhdlprec" { - return - } - "vhdlsyn" { - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - global NCVHDL VHDLOPT - upvar make_ncsim_contents mnc - append mnc "\n\t$NCVHDL $VHDLOPT $bn $f" - } else { - upvar compile_ncsim_contents cnc - append cnc "\n\t$NCVHDL $VHDLOPT $bn $f" - } - return - } - "vlogsyn" { - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - global NCVLOG - upvar make_ncsim_contents mnc - append mnc "\n\t$NCVLOG $bn $f" - } else { - upvar compile_ncsim_contents cnc - set k [dict get $finfo k] - append cnc "\n\t$NCVLOG $bn -INCDIR $k/$l $f" - } - return - } - "svlogsyn" { - global NCVLOG - upvar compile_ncsim_contents cnc - set l [dict get $finfo l] - set k [dict get $finfo k] - append cnc "\n\t$NCVLOG $bn -INCDIR $k/$l $f" - return - } - "vhdlsim" { - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - global NCVHDL VHDLOPT - upvar make_ncsim_contents mnc - append mnc "\n\t$NCVHDL $VHDLOPT $bn $f" - } else { - upvar compile_ncsim_contents cnc - append cnc "\n\t$NCVHDL $VHDLOPT $bn $f" - } - return - } - "vlogsim" { - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - global NCVLOG - upvar make_ncsim_contents mnc - append mnc "\n\t$NCVLOG $bn $f" - } else { - upvar compile_ncsim_contents cnc - append cnc "\n\t$NCVLOG $bn $f" - } - return - } - "svlogsim" { - global NCVLOG - upvar compile_ncsim_contents cnc - append cnc "\n\t$NCVLOG $bn $f" - return - } - } - return -} - -proc eof_cdns_ncsim {} { - upvar compile_ncsim_contents cnc - upvar make_ncsim_contents mnc - global SIMTOP errorInfo - set temp "ncsim:\n" - append temp $cnc - append temp $mnc - set mnc $temp - if {[string equal [glob -nocomplain "$SIMTOP.vhd"] "$SIMTOP.vhd" ] } { - set goterr [catch { - set arch [lindex [split [exec grep -i architecture $SIMTOP.vhd | grep -i $SIMTOP] ] 1] - }] - if { $goterr } { - set arch "sim" - puts stderr "cdns_ncsim: Failed to get test bench architecture, defaulting to $arch" - puts stderr "cdns_ncsim: error_info: $errorInfo" - } - append mnc "\n\tncelab -timescale 10ps/10ps $SIMTOP:$arch" - } else { - if {[string equal [glob -nocomplain "$SIMTOP.v"] "$SIMTOP.v" ] } { - append mnc "\n\tncelab -timescale 10ps/10ps $SIMTOP" - } - } - set makefile [open "make.ncsim" w] - puts $makefile $mnc - close $makefile - set compfile [open "compile.ncsim" w] - puts $compfile $cnc - close $compfile - return -} diff --git a/grlib-original/bin/scriptgen/filebuild/cdns_rc.tcl b/grlib-original/bin/scriptgen/filebuild/cdns_rc.tcl deleted file mode 100644 index 04a46d89d..000000000 --- a/grlib-original/bin/scriptgen/filebuild/cdns_rc.tcl +++ /dev/null @@ -1,87 +0,0 @@ -set compile_rc_contents "" -proc create_cdns_rc {} { - upvar compile_rc_contents crc - append crc "set_attribute input_pragma_keyword \"cadence synopsys get2chip g2c fast ambit pragma\"" - return -} - -proc append_file_cdns_rc {f finfo} { - set i [dict get $finfo i] - set bn [dict get $finfo bn] - switch $i { - "vhdlp1735" { - return - } - "vhdlmtie" { - return - } - "vhdlsynpe" { - return - } - "vhdldce" { - return - } - "vhdlcdse" { - global RTLCVHDL VHDLOPT - upvar compile_rc_contents crc - append crc "\n$RTLCVHDL $VHDLOPT$bn $f" - return - } - "vhdlxile" { - return - } - "vhdlfpro" { - return - } - "vhdlprec" { - return - } - "vhdlsyn" { - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - } else { - global RTLCVHDL VHDLOPT XDCLIBSKIP XDCDIRSKIP DCSKIP - upvar compile_rc_contents crc - set l [dict get $finfo l] - set q [dict get $finfo q] - if {[lsearchmatch $XDCLIBSKIP $bn] < 0 && [lsearchmatch $XDCDIRSKIP $l] < 0 && [lsearchmatch $DCSKIP $q] < 0 } { - append crc "\n$RTLCVHDL $VHDLOPT$bn $f" - } - } - return - } - "vlogsyn" { - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - } else { - global RTLCVLOG - upvar compile_rc_contents crc - append crc "\n$RTLCVLOG $f" - } - return - } - "svlogsyn" { - global RTLCVLOG - upvar compile_rc_contents crc - append crc "\n$RTLCVLOG $f" - return - } - "vhdlsim" { - return - } - "vlogsim" { - return - } - "svlogsim" { - return - } - } - return -} - -proc eof_cdns_rc {} { - upvar compile_rc_contents crc - set rcfile [open "compile.rc" w] - puts $rcfile $crc - close $rcfile -} diff --git a/grlib-original/bin/scriptgen/filebuild/ghdl.tcl b/grlib-original/bin/scriptgen/filebuild/ghdl.tcl deleted file mode 100644 index 9ab94f8b2..000000000 --- a/grlib-original/bin/scriptgen/filebuild/ghdl.tcl +++ /dev/null @@ -1,24 +0,0 @@ -proc ghdl_create_tool {filetree fileinfo} { - global GRLIB - source "$GRLIB/bin/scriptgen/filebuild/ghdl_make.tcl" - create_ghdl_make - set qpath "-Pgnu" - foreach k [dict keys $filetree] { - set ktree [dict get $filetree $k] - set kinfo [dict get $fileinfo $k] - set bn [dict get $kinfo bn] - set qpath "$qpath -Pgnu/$bn" - append_lib_ghdl_make $k $kinfo - foreach l [dict keys $ktree] { - set filelist [dict get $ktree $l] - foreach f $filelist { - set finfo [dict get $fileinfo $f] - append_file_ghdl_make $f $finfo $qpath - } - } - } - eof_ghdl_make $qpath -} - -ghdl_create_tool $filetree $fileinfo -return diff --git a/grlib-original/bin/scriptgen/filebuild/ghdl_make.tcl b/grlib-original/bin/scriptgen/filebuild/ghdl_make.tcl deleted file mode 100644 index 856eefca3..000000000 --- a/grlib-original/bin/scriptgen/filebuild/ghdl_make.tcl +++ /dev/null @@ -1,83 +0,0 @@ -set make_ghdl_contents "" -proc create_ghdl_make {} { - upvar make_ghdl_contents mgc - append mgc "# Import files in libraries\n" - append mgc ".PHONY: ghdl-import\n" - append mgc "ghdl-import:\n" - append mgc "\tmkdir -p gnu" - return -} - -proc append_lib_ghdl_make {k kinfo} { - upvar make_ghdl_contents mgc - set bn [dict get $kinfo bn] - append mgc "\n\tmkdir -p gnu/$bn" - return -} - -proc append_file_ghdl_make {f finfo qpath} { - set i [dict get $finfo i] - set bn [dict get $finfo bn] - switch $i { - "vhdlp1735" { - return - } - "vhdlmtie" { - return - } - "vhdlsynpe" { - return - } - "vhdldce" { - return - } - "vhdlcdse" { - return - } - "vhdlxile" { - return - } - "vhdlfpro" { - return - } - "vhdlprec" { - return - } - "vhdlsyn" { - global GHDLI GHDLIOPT - upvar make_ghdl_contents mgc - append mgc "\n\t$GHDLI $GHDLIOPT --workdir=gnu/$bn --work=$bn $qpath $f" - return - } - "vlogsyn" { - return - } - "svlogsyn" { - return - } - "vhdlsim" { - global GHDLI GHDLIOPT - upvar make_ghdl_contents mgc - append mgc "\n\t$GHDLI $GHDLIOPT --workdir=gnu/$bn --work=$bn $qpath $f" - return - } - "vlogsim" { - return - } - "svlogsim" { - return - } - } - return -} - -proc eof_ghdl_make {qpath} { - upvar make_ghdl_contents mgc - set pathfile [open "ghdl.path" w] - puts $pathfile $qpath - close $pathfile - set ghdlfile [open "make.ghdl" w] - puts $ghdlfile $mgc - close $ghdlfile - return -} diff --git a/grlib-original/bin/scriptgen/filebuild/lattice.tcl b/grlib-original/bin/scriptgen/filebuild/lattice.tcl deleted file mode 100644 index c0ae219b4..000000000 --- a/grlib-original/bin/scriptgen/filebuild/lattice.tcl +++ /dev/null @@ -1,29 +0,0 @@ -proc lattice_create_tool {filetree fileinfo} { - global GRLIB - source "$GRLIB/bin/scriptgen/filebuild/lattice_top_lct.tcl" - source "$GRLIB/bin/scriptgen/filebuild/lattice_top_ldf.tcl" - source "$GRLIB/bin/scriptgen/filebuild/lattice_top_syn.tcl" - - if {[expr ![string equal [glob -nocomplain -type d lattice] lattice ] ] } { - file mkdir lattice - } - - create_lattice_top_ldf - create_lattice_top_lct - create_lattice_top_syn - foreach k [dict keys $filetree] { - set ktree [dict get $filetree $k] - set kinfo [dict get $fileinfo $k] - foreach l [dict keys $ktree] { - set filelist [dict get $ktree $l] - foreach f $filelist { - set finfo [dict get $fileinfo $f] - append_file_lattice_top_ldf $f $finfo - } - } - } - eof_lattice_top_ldf -} - -lattice_create_tool $filetree $fileinfo -return diff --git a/grlib-original/bin/scriptgen/filebuild/lattice_top_lct.tcl b/grlib-original/bin/scriptgen/filebuild/lattice_top_lct.tcl deleted file mode 100644 index a325ff398..000000000 --- a/grlib-original/bin/scriptgen/filebuild/lattice_top_lct.tcl +++ /dev/null @@ -1,17 +0,0 @@ -proc create_lattice_top_lct {} { - global ISPLIB PART SPEED PACKAGE ISPPACKAGE TOP - set tlc "" - append tlc "\[Device\]\n" - append tlc "Family = $ISPLIB;\n" - append tlc "PartNumber = $PART$SPEED$PACKAGE;\n" - append tlc "Package = $ISPPACKAGE;\n" - append tlc "PartType = $PART;\n" - append tlc "Speed = $SPEED;\n" - append tlc "Operating_condition = COM;\n" - append tlc "Status = Production;" - set lctfile [open "$TOP.lct" w] - puts $lctfile $tlc - close $lctfile - return -} - diff --git a/grlib-original/bin/scriptgen/filebuild/lattice_top_ldf.tcl b/grlib-original/bin/scriptgen/filebuild/lattice_top_ldf.tcl deleted file mode 100644 index 69cd06bcc..000000000 --- a/grlib-original/bin/scriptgen/filebuild/lattice_top_ldf.tcl +++ /dev/null @@ -1,99 +0,0 @@ -set TOP_ldf_contents "" -proc create_lattice_top_ldf {} { - global TOP PART SPEED PACKAGE - upvar TOP_ldf_contents tlc - append tlc "\n" - append tlc "\n" - append tlc " \n" - append tlc " \n" - append tlc " \n" - return -} - -proc append_file_lattice_top_ldf {f finfo} { - set i [dict get $finfo i] - set bn [dict get $finfo bn] - switch $i { - "vhdlp1735" { - return - } - "vhdlmtie" { - return - } - "vhdlsynpe" { - return - } - "vhdldce" { - return - } - "vhdlcdse" { - return - } - "vhdlxile" { - return - } - "vhdlfpro" { - return - } - "vhdlprec" { - return - } - "vhdlsyn" { - set q [dict get $finfo q] - set l [dict get $finfo l] - global XSYNPLIBSKIP XSYNPDIRSKIP SYNPSKIP TOP - if {[lsearchmatch $XSYNPLIBSKIP $bn] < 0 && [lsearchmatch $XSYNPDIRSKIP $l] < 0 && [lsearchmatch $SYNPSKIP $q] < 0 } { - upvar TOP_ldf_contents tlc - append tlc " \n" - if {[string equal $bn "work"] && [string equal $l "local" ] } { - append tlc " \n" - } else { - append tlc " \n" - } - append tlc " \n" - } - return - } - "vlogsyn" { - return - } - "svlogsyn" { - return - } - "vhdlsim" { - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - } else { - global TOP - upvar TOP_ldf_contents tlc - append tlc " \n" - append tlc " \n" - append tlc " \n" - } - return - } - "vlogsim" { - return - } - "svlogsim" { - return - } - } - return -} - -proc eof_lattice_top_ldf {} { - global UCF SDCFILE TOP - upvar TOP_ldf_contents tlc - append tlc " \n" - append tlc " \n" - append tlc " \n" - append tlc " \n" - append tlc " \n" - append tlc " \n" - append tlc " \n" - append tlc "" - set ldffile [open "$TOP.ldf" a] - puts $ldffile $tlc - close $ldffile -} diff --git a/grlib-original/bin/scriptgen/filebuild/lattice_top_syn.tcl b/grlib-original/bin/scriptgen/filebuild/lattice_top_syn.tcl deleted file mode 100644 index b9f1e4b1f..000000000 --- a/grlib-original/bin/scriptgen/filebuild/lattice_top_syn.tcl +++ /dev/null @@ -1,16 +0,0 @@ -proc create_lattice_top_syn {} { - global PART SPEED PACKAGE TOP - set tsc "" - append tsc "JDF B\n" - append tsc "PROJECT $TOP\n" - append tsc "DESIGN $TOP Normal\n" - append tsc "DEVKIT $PART$SPEED$PACKAGE\n" - append tsc "ENTRY EDIF\n" - append tsc "MODULE ./synplify/$TOP.edf\n" - append tsc "MODSTYLE $TOP Normal" - set lctfile [open "$TOP.syn" w] - puts $lctfile $tsc - close $lctfile - return -} - diff --git a/grlib-original/bin/scriptgen/filebuild/mentor.tcl b/grlib-original/bin/scriptgen/filebuild/mentor.tcl deleted file mode 100644 index a3bfd076b..000000000 --- a/grlib-original/bin/scriptgen/filebuild/mentor.tcl +++ /dev/null @@ -1,53 +0,0 @@ -proc mentor_create_tool {filetree fileinfo} { - global GRLIB - source "$GRLIB/bin/scriptgen/filebuild/mentor_modelsim.tcl" - source "$GRLIB/bin/scriptgen/filebuild/mentor_precision.tcl" - source "$GRLIB/bin/scriptgen/filebuild/mentor_top_fpro.tcl" - source "$GRLIB/bin/scriptgen/filebuild/mentor_vsim.tcl" - source "$GRLIB/bin/scriptgen/filebuild/mentor_simtop_mpf.tcl" - - create_mentor_modelsim - create_mentor_precision - create_mentor_top_fpro - - set nfiles 0 - set fpro_fs "" - set previ "" - - foreach k [dict keys $filetree] { - set ktree [dict get $filetree $k] - set kinfo [dict get $fileinfo $k] - append_lib_mentor_modelsim $k $kinfo - foreach l [dict keys $ktree] { - set filelist [dict get $ktree $l] - foreach f $filelist { - set finfo [dict get $fileinfo $f] - set i [dict get $finfo i] - if {![string equal $i $previ] && ![string equal "" $previ]} { - if {[string length $fpro_fs] > 0 } { - append_type_mentor_top_fpro $k $kinfo $previ $fpro_fs - } - set fpro_fs "" - } - append_file_mentor_vsim $f $finfo - append_file_mentor_simtop_mpf $f $finfo nfiles - append_file_mentor_precision $f $finfo - append_file_mentor_top_fpro $f $finfo fpro_fs - set previ $i - } - if {[string length $fpro_fs] > 0 } { - append_type_mentor_top_fpro $k $kinfo $previ $fpro_fs - } - set fpro_fs "" - set previ "" - } - } - eof_mentor_modelsim - eof_mentor_simtop_mpf $nfiles - eof_mentor_precision - eof_mentor_top_fpro - eof_mentor_vsim -} - -mentor_create_tool $filetree $fileinfo -return diff --git a/grlib-original/bin/scriptgen/filebuild/mentor_modelsim.tcl b/grlib-original/bin/scriptgen/filebuild/mentor_modelsim.tcl deleted file mode 100644 index 996e32290..000000000 --- a/grlib-original/bin/scriptgen/filebuild/mentor_modelsim.tcl +++ /dev/null @@ -1,35 +0,0 @@ -set libs_do_contents "" -set modelsim_ini_contents "" -proc create_mentor_modelsim {} { - upvar libs_do_contents ldc - upvar modelsim_ini_contents mic - append ldc "vlib modelsim" - append mic {[Library]} - return -} - -proc append_lib_mentor_modelsim {k kinfo} { - upvar libs_do_contents ldc - upvar modelsim_ini_contents mic - set bn [dict get $kinfo bn] - append ldc "\nvlib modelsim/$bn " - append mic "\n$bn = modelsim/$bn" - return -} - -proc eof_mentor_modelsim {} { - upvar libs_do_contents ldc - upvar modelsim_ini_contents mic - global GRLIB - set libsfile [open "libs.do" w] - puts $libsfile $ldc - close $libsfile - set readfile [open "$GRLIB/bin/modelsim.ini" r] - set simfile [open "modelsim.ini" w] - append mic "\n[read $readfile]" - set mic [rmvlinebreak $mic] - puts $simfile $mic - close $readfile - close $simfile - return -} diff --git a/grlib-original/bin/scriptgen/filebuild/mentor_precision.tcl b/grlib-original/bin/scriptgen/filebuild/mentor_precision.tcl deleted file mode 100644 index aa95f4d85..000000000 --- a/grlib-original/bin/scriptgen/filebuild/mentor_precision.tcl +++ /dev/null @@ -1,104 +0,0 @@ -set TOP_precision_tcl_contents "" -proc create_mentor_precision {} { - global TOP PART MANUFACTURER MGCTECHNOLOGY MGCPART MGCPACKAGE SPEED - upvar TOP_precision_tcl_contents tptc - set configinfo "open_project ./$TOP.psp\n" - append configinfo "compile\n" - append configinfo "synthesize\n" - append configinfo "save_impl" - set precrunfile [open "$TOP\_precrun.tcl" w] - puts $precrunfile $configinfo - close $precrunfile - append tptc "new_project -name $TOP -folder . -createimpl_name precision\n" - append tptc "setup_design -manufacturer $MANUFACTURER -family\ - $MGCTECHNOLOGY -part $MGCPART -package $MGCPACKAGE -speed $SPEED\n" - append tptc "set_input_dir .\n" - return -} - -proc append_file_mentor_precision {f finfo} { - set i [dict get $finfo i] - set bn [dict get $finfo bn] - switch $i { - "vhdlp1735" { - return - } - "vhdlmtie" { - return - } - "vhdlsynpe" { - return - } - "vhdldce" { - return - } - "vhdlcdse" { - return - } - "vhdlxile" { - return - } - "vhdlfpro" { - return - } - "vhdlprec" { - upvar TOP_precision_tcl_contents tptc - global TOP - append tptc "add_input_file -format VHDL -work $bn -enc $f\n" - return - } - "vhdlsyn" { - global PRECLIBSKIP PRECDIRSKIP PRECSKIP TOP - set l [dict get $finfo l] - set q [dict get $finfo q] - if {[lsearchmatch $PRECLIBSKIP $bn] < 0 && [lsearchmatch $PRECDIRSKIP $l] < 0 && [lsearchmatch $PRECSKIP $q] < 0 } { - upvar TOP_precision_tcl_contents tptc - append tptc "add_input_file -format VHDL -work $bn $f\n" - } - return - } - "vlogsyn" { - global PRECLIBSKIP PRECDIRSKIP PRECSKIP TOP - set l [dict get $finfo l] - set q [dict get $finfo q] - if {[lsearchmatch $PRECLIBSKIP $bn] < 0 && [lsearchmatch $PRECDIRSKIP $l] < 0 && [lsearchmatch $PRECSKIP $q] < 0 } { - global TOP - upvar TOP_precision_tcl_contents tptc - append tptc "add_input_file -format VERILOG -work $bn $f\n" - } - return - } - "svlogsyn" { - global TOP - upvar TOP_precision_tcl_contents tptc - append tptc "add_input_file -format VERILOG -work $bn $f\n" - return - } - "vhdlsim" { - return - } - "vlogsim" { - return - } - "svlogsim" { - return - } - } - return -} - -proc eof_mentor_precision {} { - global TOP SYNFREQ PRECOPT - upvar TOP_precision_tcl_contents tptc - append tptc "setup_design -design $TOP\n" - append tptc "setup_design -retiming\n" - append tptc "setup_design -vhdl\n" - append tptc "setup_design -transformations=false\n" - append tptc "setup_design -frequency=\"$SYNFREQ\"\n" - append tptc "$PRECOPT\n" - append tptc "save_impl" - set precifile [open "$TOP\_precision.tcl" w] - puts $precifile $tptc - close $precifile - return -} diff --git a/grlib-original/bin/scriptgen/filebuild/mentor_simtop_mpf.tcl b/grlib-original/bin/scriptgen/filebuild/mentor_simtop_mpf.tcl deleted file mode 100644 index 81e288321..000000000 --- a/grlib-original/bin/scriptgen/filebuild/mentor_simtop_mpf.tcl +++ /dev/null @@ -1,174 +0,0 @@ -set SIMTOP_mpf_contents "" - -proc append_file_mentor_simtop_mpf {f finfo nfiles} { - set i [dict get $finfo i] - set bn [dict get $finfo bn] - switch $i { - "vhdlp1735" { - global SIMTOP - upvar SIMTOP_mpf_contents smc - upvar $nfiles nf - append smc "Project_File_$nf = $f\n" - append smc "Project_File_P_$nf = vhdl_novitalcheck 0\ - file_type VHDL group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0\ - vhdl_synth 0 folder {Top Level} last_compile 0 vhdl_disableopt 0 vhdl_vital 0\ - vhdl_warn1 0 vhdl_warn2 1 vhdl_explicit 0 vhdl_showsource 1 vhdl_warn3 1\ - vhdl_options {} vhdl_warn4 1 ood 0 vhdl_warn5 0 compile_to $bn compile_order\ - $nf dont_compile 0 cover_stmt 1 vhdl_use93 93\n" - incr nf - return - } - "vhdlmtie" { - global SIMTOP - upvar SIMTOP_mpf_contents smc - upvar $nfiles nf - append smc "Project_File_$nf = $f\n" - append smc "Project_File_P_$nf = vhdl_novitalcheck 0\ - file_type VHDL group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0\ - vhdl_synth 0 folder {Top Level} last_compile 0 vhdl_disableopt 0 vhdl_vital 0\ - vhdl_warn1 0 vhdl_warn2 1 vhdl_explicit 0 vhdl_showsource 1 vhdl_warn3 1\ - vhdl_options {} vhdl_warn4 1 ood 0 vhdl_warn5 0 compile_to $bn compile_order\ - $nf dont_compile 0 cover_stmt 1 vhdl_use93 93\n" - incr nf - return - } - "vhdlsynpe" { - return - } - "vhdldce" { - return - } - "vhdlcdse" { - return - } - "vhdlxile" { - return - } - "vhdlfpro" { - return - } - "vhdlprec" { - return - } - "vhdlsyn" { - global SIMTOP - upvar SIMTOP_mpf_contents smc - upvar $nfiles nf - append smc "Project_File_$nf = $f\n" - append smc "Project_File_P_$nf = vhdl_novitalcheck 0\ - file_type VHDL group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0\ - vhdl_synth 0 folder {Top Level} last_compile 0 vhdl_disableopt 0 vhdl_vital 0\ - vhdl_warn1 0 vhdl_warn2 1 vhdl_explicit 0 vhdl_showsource 1 vhdl_warn3 1\ - vhdl_options {} vhdl_warn4 1 ood 0 vhdl_warn5 0 compile_to $bn compile_order\ - $nf dont_compile 0 cover_stmt 1 vhdl_use93 93\n" - incr nf - return - } - "vlogsyn" { - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - } else { - global SIMTOP - upvar SIMTOP_mpf_contents smc - upvar $nfiles nf - append smc "Project_File_$nf = $f\n" - append smc "Project_File_P_$nf = vlog_protect 0 file_type Verilog\ - group_id 0 vlog_1995compat 0 vlog_nodebug 0 folder {Top Level} vlog_noload 0\ - last_compile 0 vlog_disableopt 0 vlog_hazard 0 vlog_showsource 0 ood 1\ - compile_to $bn vlog_upper 0 vlog_options {} compile_order $nf dont_compile 0\n" - incr nf - } - return - } - "svlogsyn" { - global SIMTOP - upvar SIMTOP_mpf_contents smc - upvar $nfiles nf - append smc "Project_File_$nf = $f\n" - append smc "Project_File_P_$nf = vlog_protect 0 file_type Verilog\ - group_id 0 vlog_1995compat 0 vlog_nodebug 0 folder {Top Level} vlog_noload 0\ - last_compile 0 vlog_disableopt 0 vlog_hazard 0 vlog_showsource 0 ood 1\ - compile_to $bn vlog_upper 0 vlog_options {} compile_order $nf dont_compile 0\n" - incr nf - return - } - "vhdlsim" { - global SIMTOP - upvar SIMTOP_mpf_contents smc - upvar $nfiles nf - append smc "Project_File_$nf = $f\n" - append smc "Project_File_P_$nf = vhdl_novitalcheck 0 file_type VHDL\ - group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 folder {Top Level}\ - last_compile 0 vhdl_disableopt 0 vhdl_vital 0 vhdl_warn1 0 vhdl_warn2 1 vhdl_explicit 0\ - vhdl_showsource 1 vhdl_warn3 1 vhdl_options {} vhdl_warn4 1 ood 0 vhdl_warn5 0\ - compile_to $bn compile_order $nf dont_compile 0 cover_stmt 1 vhdl_use93 93\n" - incr nf - return - } - "vlogsim" { - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - } else { - global SIMTOP - upvar SIMTOP_mpf_contents smc - upvar $nfiles nf - append smc "Project_File_$nf = $f\n" - append smc "Project_File_P_$nf = vlog_protect 0 file_type Verilog\ - group_id 0 vlog_1995compat 0 vlog_nodebug 0 folder {Top Level} vlog_noload 0\ - last_compile 0 vlog_disableopt 0 vlog_hazard 0 vlog_showsource 0 ood 1\ - compile_to $bn vlog_upper 0 vlog_options {} compile_order $nf dont_compile 0\n" - incr nf - } - return - } - "svlogsim" { - global SIMTOP - upvar SIMTOP_mpf_contents smc - upvar $nfiles nf - append smc "Project_File_$nf = $f\n" - append smc "Project_File_P_$nf = vlog_protect 0 file_type Verilog\ - group_id 0 vlog_1995compat 0 vlog_nodebug 0 folder {Top Level} vlog_noload 0\ - last_compile 0 vlog_disableopt 0 vlog_hazard 0 vlog_showsource 0 ood 1\ - compile_to $bn vlog_upper 0 vlog_options {} compile_order $nf dont_compile 0\n" - incr nf - return - } - } - return -} - -proc eof_mentor_simtop_mpf {nfiles} { - global SIMTOP GRLIB - upvar SIMTOP_mpf_contents smc - - set readfile [open "modelsim.ini" r] - set temp [read $readfile] - close $readfile - - append temp "\[Project\]\n" - append temp "Project_Version = 5\n" - append temp "Project_DefaultLib = work\n" - append temp "Project_SortMethod = unused\n" - append temp "Project_Files_Count = $nfiles\n\n" - - append temp $smc - set smc $temp - - append smc "Project_Sim_Count = 1\n" - append smc "Project_Sim_0 = Simulation 1\n" - append smc "Project_Sim_P_0 = Generics \{\} timing default -std_output \{\} +notimingchecks 0 -L \{\} selected_du \{\} -hazards 0 -sdf \{\} +acc \{\} ok 1 folder \{Top Level\} -absentisempty 0 +pulse_r \{\} OtherArgs \{\} -multisource_delay \{\} +pulse_e \{\} -coverage 0 -sdfnoerror 0 +plusarg \{\} -vital2.2b 0 -t ps additional_dus work.$SIMTOP -nofileshare 0 -noglitch 0 -wlf \{\} +no_pulse_msg 0 -assertfile \{\} -sdfnowarn 0 -Lf \{\} -std_input \{\}\n" - - set readfile [open $GRLIB/bin/mt1.mpf r] - append smc [read $readfile] - close $readfile - - if {[string length $smc] > 0 } { - set smc [string range $smc 0 end-1] - } - - set mpffile [open "$SIMTOP.mpf" w] - puts $mpffile $smc - close $mpffile - - return -} diff --git a/grlib-original/bin/scriptgen/filebuild/mentor_top_fpro.tcl b/grlib-original/bin/scriptgen/filebuild/mentor_top_fpro.tcl deleted file mode 100644 index 884548e17..000000000 --- a/grlib-original/bin/scriptgen/filebuild/mentor_top_fpro.tcl +++ /dev/null @@ -1,97 +0,0 @@ -set TOP_rtl_fpro_fl_contents "" -proc create_mentor_top_fpro {} { - global TOP - upvar TOP_rtl_fpro_fl_contents trffc - append trffc "# FormalPro file list for $TOP design" - return -} - -proc append_file_mentor_top_fpro {f finfo fpro_fs} { - set i [dict get $finfo i] - switch $i { - "vhdlp1735" { - return - } - "vhdlmtie" { - return - } - "vhdlsynpe" { - return - } - "vhdldce" { - return - } - "vhdlcdse" { - return - } - "vhdlxile" { - return - } - "vhdlfpro" { - upvar $fpro_fs fprofs - set fprofs "$fprofs $f" - return - } - "vhdlprec" { - return - } - "vhdlsyn" { - set bn [dict get $finfo bn] - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - global TOP - upvar TOP_rtl_fpro_fl_contents trffc - append trffc "\n\t-work $bn $f" - } else { - upvar $fpro_fs fprofs - set fprofs "$fprofs $f" - } - return - } - "vlogsyn" { - set bn [dict get $finfo bn] - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - global TOP - upvar TOP_rtl_fpro_fl_contents trffc - append trffc "\n\t-work $bn $f" - append trffc "\n\t-work $bn $f" - } else { - upvar $fpro_fs fprofs - set fprofs "$fprofs $f" - } - return - } - "svlogsyn" { - upvar $fpro_fs fprofs - set fprofs "$fprofs $f" - return - } - "vhdlsim" { - return - } - "vlogsim" { - return - } - "svlogsim" { - return - } - } - return -} - -proc append_type_mentor_top_fpro {k kinfo i fpro_fs} { - global TOP - upvar TOP_rtl_fpro_fl_contents trffc - set bn [dict get $kinfo bn] - append trffc "\n\t-work $bn $fpro_fs" -} - -proc eof_mentor_top_fpro {} { - global TOP - upvar TOP_rtl_fpro_fl_contents trffc - set fprofile [open "$TOP\_rtl_fpro.fl" a] - puts $fprofile $trffc - close $fprofile -} - diff --git a/grlib-original/bin/scriptgen/filebuild/mentor_vsim.tcl b/grlib-original/bin/scriptgen/filebuild/mentor_vsim.tcl deleted file mode 100644 index 6a7cd7674..000000000 --- a/grlib-original/bin/scriptgen/filebuild/mentor_vsim.tcl +++ /dev/null @@ -1,129 +0,0 @@ -set compile_vsim_contents "" -set make_vsim_contents "" -proc append_file_mentor_vsim {f finfo} { - set i [dict get $finfo i] - set bn [dict get $finfo bn] - set fattr [dict get $finfo fattr] - set vhdlstd [getattribute vhdlstd $fattr 93] - switch $i { - "vhdlp1735" { - global VCOM VHDLOPT - upvar compile_vsim_contents cvc - append cvc "\t$VCOM $VHDLOPT -$vhdlstd -work $bn $f\n" - return - } - "vhdlmtie" { - global VCOM VHDLOPT - upvar compile_vsim_contents cvc - append cvc "\t$VCOM $VHDLOPT -$vhdlstd -work $bn $f\n" - return - } - "vhdlsynpe" { - return - } - "vhdldce" { - return - } - "vhdlcdse" { - return - } - "vhdlxile" { - return - } - "vhdlfpro" { - return - } - "vhdlprec" { - return - } - "vhdlsyn" { - global VCOM VHDLOPT - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - upvar make_vsim_contents mvc - append mvc "\t$VCOM $VHDLOPT -$vhdlstd -work $bn $f\n" - } else { - upvar compile_vsim_contents cvc - append cvc "\t$VCOM $VHDLOPT -$vhdlstd -work $bn $f\n" - } - return - } - "vlogsyn" { - global VLOG - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - upvar make_vsim_contents mvc - append mvc "\t$VLOG -work $bn $f\n" - } else { - upvar compile_vsim_contents cvc - set k [dict get $finfo k] - set l [dict get $finfo l] - append cvc "\t$VLOG -work $bn +incdir+$k/$l $f\n" - } - return - } - "svlogsyn" { - global SVLOG - upvar compile_vsim_contents cvc - set k [dict get $finfo k] - set l [dict get $finfo l] - append cvc "\t$SVLOG -sv -work $bn +incdir+$k/$l $f\n" - return - } - "vhdlsim" { - global VCOM VHDLOPT - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - upvar make_vsim_contents mvc - append mvc "\t$VCOM $VHDLOPT -$vhdlstd -work $bn $f\n" - } else { - upvar compile_vsim_contents cvc - append cvc "\t$VCOM $VHDLOPT -$vhdlstd -work $bn $f\n" - } - return - } - "vlogsim" { - global VLOG - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - upvar make_vsim_contents mvc - append mvc "\t$VLOG -work $bn $f\n" - } else { - upvar compile_vsim_contents cvc - append cvc "\t$VLOG -work $bn $f\n" - } - return - } - "svlogsim" { - global VLOG - upvar compile_vsim_contents cvc - append cvc "\t$VLOG -sv -work $bn $f\n" - return - } - } - return -} - -proc eof_mentor_vsim {} { - global GRLIB - upvar compile_vsim_contents cvc - upvar make_vsim_contents mvc - - set cvc [rmvlinebreak $cvc] - set compfile [open "compile.vsim" w] - puts $compfile $cvc - close $compfile - - set temp "vsim:\n" - append temp $cvc - append temp "\n# Work-around for stupid secureip bug ...\n" - append temp "\t@if test -r $GRLIB/lib/tech/secureip/ise/mcb_001.vp && test -r modelsim/secureip; then vlog -quiet " - append temp "-work secureip $GRLIB/lib/tech/secureip/ise/mcb_*.vp; fi\n" - append temp $mvc - set mvc $temp - set mvc [rmvlinebreak $mvc] - set makefile [open "make.vsim" w] - puts $makefile $mvc - close $makefile - return -} diff --git a/grlib-original/bin/scriptgen/filebuild/nanoxplore.tcl b/grlib-original/bin/scriptgen/filebuild/nanoxplore.tcl deleted file mode 100644 index afab3a575..000000000 --- a/grlib-original/bin/scriptgen/filebuild/nanoxplore.tcl +++ /dev/null @@ -1,25 +0,0 @@ -proc nanoxplore_create_tool {filetree fileinfo} { - global GRLIB - source "$GRLIB/bin/scriptgen/filebuild/nanoxplore_nanoxmap.tcl" - source "$GRLIB/bin/scriptgen/filebuild/nanoxplore_nanoxpython.tcl" - create_nanoxplore_nanoxmap - create_nanoxplore_nanoxpython - foreach k [dict keys $filetree] { - set ktree [dict get $filetree $k] - set kinfo [dict get $fileinfo $k] - foreach l [dict keys $ktree] { - set filelist [dict get $ktree $l] - foreach f $filelist { - set finfo [dict get $fileinfo $f] - append_file_nanoxplore_nanoxmap $f $finfo - #No need of this procedure for nanoxpython file generation. - #append_file_nanoxplore_nanoxpython $f $finfo - } - } - } - eof_nanoxplore_nanoxmap - eof_nanoxplore_nanoxpython -} - -nanoxplore_create_tool $filetree $fileinfo -return diff --git a/grlib-original/bin/scriptgen/filebuild/nanoxplore_nanoxmap.tcl b/grlib-original/bin/scriptgen/filebuild/nanoxplore_nanoxmap.tcl deleted file mode 100644 index 261747d84..000000000 --- a/grlib-original/bin/scriptgen/filebuild/nanoxplore_nanoxmap.tcl +++ /dev/null @@ -1,124 +0,0 @@ -set nanoxmap_contents "" -proc create_nanoxplore_nanoxmap {} { - global TOP DEVICE - upvar nanoxmap_contents vc - - append vc "#Project File for Nanoxmap/Nanoxpython" - append vc "\nimport os" - append vc "\nimport sys" - append vc "\nfrom os import path" - append vc "\nfrom nxmap import *" - append vc "\ndir = os.path.dirname(os.path.realpath(__file__))" - append vc "\nsys.path.append(dir)" - append vc "\nproject = createProject(dir)" - if {$DEVICE == ""} { - append vc "\nproject.setVariantName('NG-MEDIUM')" - } else { - append vc "\nproject.setVariantName('$DEVICE\')" - } - append vc "\nproject.setTopCellName('work', '$TOP')" - append vc "\n" - append vc "\n" - append vc "\n# Add files for synthesis" - - return -} -proc append_file_nanoxplore_nanoxmap {f finfo} { - set i [dict get $finfo i] - set bn [dict get $finfo bn] - switch $i { - "vhdlp1735" { - return - } - "vhdlmtie" { - return - } - "vhdlsynpe" { - return - } - "vhdldce" { - return - } - "vhdlcdse" { - return - } - "vhdlxile" { - return - } - "vhdlfpro" { - return - } - "vhdlprec" { - return - } - "vhdlsyn" { - upvar nanoxmap_contents vc - append vc "\nproject.addFile('$bn','$f')" - return - } - "vlogsyn" { - upvar nanoxmap_contents vc - append vc "\nproject.addFile('$bn','$f')" - return - } - "svlogsyn" { - upvar nanoxmap_contents vc - append vc "\nproject.addFile('$bn','$f')" - return - } - "vhdlsim" { - - } - "vlogsim" { - return - } - "svlogsim" { - return - } - } - return -} - -proc eof_nanoxplore_nanoxmap {} { - global TOP TIMING_DRIVEN MAPPING_EFFORT NXCONSTRAINTS - upvar nanoxmap_contents vc - append vc "\n" - append vc "\n#Set project options" - append vc "\nproject.setOption('ManageUnconnectedOutputs', 'Ground')" - append vc "\nproject.setOption('ManageUnconnectedSignals', 'Ground')" - append vc "\nproject.setOption('DefaultRAMMapping', 'RAM')" - append vc "\nproject.setOption('DefaultROMMapping', 'LUT')" - append vc "\nproject.setOption('DisableROMFullLutRecognition', 'Yes')" - append vc "\nproject.setOption('MappingEffort', '$MAPPING_EFFORT\') " - append vc "\nproject.setOption('ManageAsynchronousReadPort', 'Yes')" - - - - append vc "\n\n" - set fexist [file exist $NXCONSTRAINTS] - if {$fexist == 0} { - append vc "\n# No user defined constraint file in variable NXCONSTRAINTS" - append vc "\n\n" - } else { - append vc "\n#Copying from user defined constraints file" - append vc "\n\n" - set fp [open "$NXCONSTRAINTS" r] - set file_data [read $fp] - close $fp - append vc $file_data - append vc "\n\n" - } - - append vc "\n# Read pin map" - append vc "\nif path.exists(dir + '/$TOP\_pads.py'):" - append vc "\n from $TOP\_pads import pads" - append vc "\n project.addPads(pads)" - - append vc "\n#Generate Project file" - append vc "\nproject.save('$TOP\_native.nym')" - - set nanoxfile [open "$TOP\_nanoxmap.py" w] - puts $nanoxfile $vc - close $nanoxfile - return -} diff --git a/grlib-original/bin/scriptgen/filebuild/nanoxplore_nanoxpython.tcl b/grlib-original/bin/scriptgen/filebuild/nanoxplore_nanoxpython.tcl deleted file mode 100644 index f5c8713c8..000000000 --- a/grlib-original/bin/scriptgen/filebuild/nanoxplore_nanoxpython.tcl +++ /dev/null @@ -1,64 +0,0 @@ -set nanoxpython_contents "" -proc create_nanoxplore_nanoxpython {} { - global TOP - upvar nanoxpython_contents vp - - append vp "# NanoXPython script for synthesis,place,route and generation of bitstream" - append vp "\nimport os" - append vp "\nimport sys" - append vp "\nfrom os import path" - append vp "\nfrom nxmap import *" - append vp "\ndir = os.path.dirname(os.path.realpath(__file__))" - append vp "\nsys.path.append(dir)" - - append vp "\nproject=createProject(dir)" - append vp "\nproject.load('$TOP\_native.nym')" - - append vp "\nif not project.synthesize():" - append vp "\n sys.exit(1)" - append vp "\nproject.save('$TOP\_synthesized.nym')" - append vp "\n" - append vp "\nif not project.place():" - append vp "\n sys.exit(1)" - append vp "\nproject.save('$TOP\_placed.nym')" - append vp "\n" - append vp "\nif not path.exists(dir + '/$TOP\_pads.py'):" - append vp "\n project.savePorts('$TOP\_generated_pads.py')" - append vp "\n" - append vp "\nif not project.route():" - append vp "\n sys.exit(1)" - append vp "\nproject.save('$TOP\_routed.nym')" - append vp "\n" - - append vp "\n#Reports" - append vp "\nproject.reportInstances()" - append vp "\n" - append vp "\n#Analyzer" - append vp "\nanalyzer = project.createAnalyzer()" - append vp "\nanalyzer.launch()" - append vp "\n" - - append vp "\n#Generate Bitstream" - append vp "\nproject.generateBitstream('$TOP\_bitfile.nxb')" - append vp "\n" - append vp "\nproject.destroy()" - #append vp "\nprint 'Errors: ', getErrorCount()" - #append vp "\nprint 'Warnings: ' getWarningCount()" - - - return -} -proc append_file_nanoxplore_nanoxpython{f finfo} { - #Empty procedure. Maybe it will needed for future versions of the tool. - return -} - -proc eof_nanoxplore_nanoxpython {} { - global TOP - upvar nanoxpython_contents vp - - set nanoxpythonfile [open "$TOP\_nanoxpython.py" w] - puts $nanoxpythonfile $vp - close $nanoxpythonfile - return -} diff --git a/grlib-original/bin/scriptgen/filebuild/snps.tcl b/grlib-original/bin/scriptgen/filebuild/snps.tcl deleted file mode 100644 index 595d7b602..000000000 --- a/grlib-original/bin/scriptgen/filebuild/snps.tcl +++ /dev/null @@ -1,37 +0,0 @@ -proc snps_create_tool {filetree fileinfo} { - global GRLIB - source "$GRLIB/bin/scriptgen/filebuild/snps_vcs.tcl" - source "$GRLIB/bin/scriptgen/filebuild/snps_dc.tcl" - source "$GRLIB/bin/scriptgen/filebuild/snps_fmref.tcl" - source "$GRLIB/bin/scriptgen/filebuild/snps_synp.tcl" - source "$GRLIB/bin/scriptgen/filebuild/snps_simv.tcl" - - create_snps_vcs - create_snps_dc - create_snps_fmref - - foreach k [dict keys $filetree] { - set ktree [dict get $filetree $k] - set kinfo [dict get $fileinfo $k] - append_lib_snps_dc $k $kinfo - append_lib_snps_vcs $k $kinfo - foreach l [dict keys $ktree] { - set filelist [dict get $ktree $l] - foreach f $filelist { - set finfo [dict get $fileinfo $f] - append_file_snps_simv $f $finfo - append_file_snps_dc $f $finfo - append_file_snps_synp $f $finfo - append_file_snps_fmref $f $finfo - } - } - } - eof_snps_dc - eof_snps_fmref - eof_snps_synp - eof_snps_vcs - eof_snps_simv -} - -snps_create_tool $filetree $fileinfo -return diff --git a/grlib-original/bin/scriptgen/filebuild/snps_dc.tcl b/grlib-original/bin/scriptgen/filebuild/snps_dc.tcl deleted file mode 100644 index 94e0c1135..000000000 --- a/grlib-original/bin/scriptgen/filebuild/snps_dc.tcl +++ /dev/null @@ -1,102 +0,0 @@ -set compile_dc_contents "" -proc create_snps_dc {} { - upvar compile_dc_contents cdc - append cdc "catch {sh mkdir synopsys}" - return -} - -proc append_lib_snps_dc {k kinfo} { - global SNPS_HOME - upvar compile_dc_contents cdc - set bn [dict get $kinfo bn] - if {[string equal $bn "dware"] } { - append cdc "\n#define_design_lib $bn -path $SNPS_HOME/packages/dware/lib/DWARE " - } else { - append cdc "\ncatch \{sh mkdir synopsys/$bn\} " - append cdc "\ndefine_design_lib $bn -path synopsys/$bn " - } - return -} - -proc append_file_snps_dc {f finfo} { - set i [dict get $finfo i] - set bn [dict get $finfo bn] - switch $i { - "vhdlp1735" { - return - } - "vhdlmtie" { - return - } - "vhdlsynpe" { - return - } - "vhdldce" { - global DCVHDL VHDLOPT - upvar compile_dc_contents cdc - append cdc "\n$DCVHDL $bn $VHDLOPT$f" - return - } - "vhdlcdse" { - return - } - "vhdlxile" { - return - } - "vhdlfpro" { - return - } - "vhdlprec" { - return - } - "vhdlsyn" { - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - } else { - global XDCLIBSKIP XDCDIRSKIP DCSKIP - set l [dict get $finfo l] - set q [dict get $finfo q] - if {[lsearchmatch $XDCLIBSKIP $bn] < 0 && [lsearchmatch $XDCDIRSKIP $l] < 0 && [lsearchmatch $DCSKIP $q] < 0 } { - global DCVHDL VHDLOPT - upvar compile_dc_contents cdc - append cdc "\n$DCVHDL $bn $VHDLOPT$f" - } - } - return - } - "vlogsyn" { - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - } else { - global DCVLOG - upvar compile_dc_contents cdc - append cdc "\n$DCVLOG $bn $f" - } - return - } - "svlogsyn" { - global DCVLOG - upvar compile_dc_contents cdc - append cdc "\n$DCVLOG $bn $f" - return - } - "vhdlsim" { - return - } - "vlogsim" { - return - } - "svlogsim" { - return - } - } - return -} - -proc eof_snps_dc {} { - upvar compile_dc_contents cdc - set dcfile [open "compile.dc" w] - puts $dcfile $cdc - close $dcfile -} - diff --git a/grlib-original/bin/scriptgen/filebuild/snps_fmref.tcl b/grlib-original/bin/scriptgen/filebuild/snps_fmref.tcl deleted file mode 100644 index 4c2cca026..000000000 --- a/grlib-original/bin/scriptgen/filebuild/snps_fmref.tcl +++ /dev/null @@ -1,86 +0,0 @@ -set fmref_tcl_contents "" -proc create_snps_fmref {} { - upvar fmref_tcl_contents ftc - append ftc "# Formality script to read reference design" - return -} - -proc append_file_snps_fmref {f finfo} { - set i [dict get $finfo i] - set bn [dict get $finfo bn] - switch $i { - "vhdlp1735" { - return - } - "vhdlmtie" { - return - } - "vhdlsynpe" { - return - } - "vhdldce" { - global FMVHDL FMVHDLOPT - upvar fmref_tcl_contents ftc - append ftc "\n$FMVHDL $bn $FMVHDLOPT$f" - return - } - "vhdlcdse" { - return - } - "vhdlxile" { - return - } - "vhdlfpro" { - return - } - "vhdlprec" { - return - } - "vhdlsyn" { - global XDCLIBSKIP XDCDIRSKIP DCSKIP - upvar fmref_tcl_contents ftc - set l [dict get $finfo l] - set q [dict get $finfo q] - if {[lsearchmatch $XDCLIBSKIP $bn] < 0 && [lsearchmatch $XDCDIRSKIP $l] < 0 && [lsearchmatch $DCSKIP $q] < 0 } { - global FMVHDL FMVHDLOPT - append ftc "\n$FMVHDL $bn $FMVHDLOPT$f" - } - return - } - "vlogsyn" { - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - } else { - global FMVLOG - upvar fmref_tcl_contents ftc - append ftc "\n$FMVLOG $bn $f" - } - return - } - "svlogsyn" { - global FMVLOG - upvar fmref_tcl_contents ftc - append ftc "\n$FMVLOG $bn $f" - return - } - "vhdlsim" { - return - } - "vlogsim" { - return - } - "svlogsim" { - return - } - } - return -} - -proc eof_snps_fmref {} { - upvar fmref_tcl_contents ftc - set fmfile [open "fmref.tcl" w] - puts $fmfile $ftc - close $fmfile - return -} - diff --git a/grlib-original/bin/scriptgen/filebuild/snps_simv.tcl b/grlib-original/bin/scriptgen/filebuild/snps_simv.tcl deleted file mode 100644 index d3ff1bb56..000000000 --- a/grlib-original/bin/scriptgen/filebuild/snps_simv.tcl +++ /dev/null @@ -1,122 +0,0 @@ -set compile_simv_contents "" -set make_simv_contents "" -proc append_file_snps_simv {f finfo} { - set i [dict get $finfo i] - set bn [dict get $finfo bn] - switch $i { - "vhdlp1735" { - return - } - "vhdlmtie" { - return - } - "vhdlsynpe" { - return - } - "vhdldce" { - global VHDLAN VHDLANOPT - upvar compile_simv_contents cvc - append cvc "\tvhdlan -nc $VHDLANOPT -work $bn $f\n" - return - } - "vhdlcdse" { - return - } - "vhdlxile" { - return - } - "vhdlfpro" { - return - } - "vhdlprec" { - return - } - "vhdlsyn" { - global VHDLAN VHDLANOPT - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - upvar make_simv_contents mvc - append mvc "\tvhdlan -nc $VHDLANOPT -work $bn $f\n" - } else { - upvar compile_simv_contents cvc - append cvc "\tvhdlan -nc $VHDLANOPT -work $bn $f\n" - } - return - } - "vlogsyn" { - global VLOGAN VLOGANOPT - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - upvar make_simv_contents mvc - append mvc "\tvlogan -nc $VLOGANOPT -work $bn $f\n" - } else { - upvar compile_simv_contents cvc - set k [dict get $finfo k] - set l [dict get $finfo l] - append cvc "\tvlogan -nc $VLOGANOPT -work $bn +incdir+$k/$l $f\n" - } - return - } - "svlogsyn" { - global VLOGAN VLOGANOPT - upvar compile_simv_contents cvc - set k [dict get $finfo k] - set l [dict get $finfo l] - append cvc "\tvlogan -nc $VLOGANOPT -sverilog -work $bn +incdir+$k/$l $f\n" - return - } - "vhdlsim" { - global VHDLAN VHDLANOPT - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - upvar make_simv_contents mvc - append mvc "\tvhdlan -nc $VHDLANOPT -work $bn $f\n" - } else { - upvar compile_simv_contents cvc - append cvc "\tvhdlan -nc $VHDLANOPT -work $bn $f\n" - } - return - } - "vlogsim" { - global VLOGAN VLOGANOPT - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - upvar make_simv_contents mvc - append mvc "\tvlogan $VLOGANOPT -nc -work $bn $f\n" - } else { - upvar compile_simv_contents cvc - append cvc "\tvlogan $VLOGANOPT -nc -work $bn $f\n" - } - return - } - "svlogsim" { - global VLOGAN - upvar compile_simv_contents cvc - append cvc "\tvlogan -nc -sverilog -work $bn $f\n" - return - } - } - return -} - -proc eof_snps_simv {} { - global GRLIB - upvar compile_simv_contents cvc - upvar make_simv_contents mvc - - set cvc [rmvlinebreak $cvc] - set compfile [open "compile.simv" w] - puts $compfile $cvc - close $compfile - - set temp "simv:\n" - append temp $cvc - append temp "\n" - append temp $mvc - set mvc $temp - set mvc [rmvlinebreak $mvc] - set makefile [open "make.simv" w] - puts $makefile $mvc - close $makefile - return -} diff --git a/grlib-original/bin/scriptgen/filebuild/snps_synp.tcl b/grlib-original/bin/scriptgen/filebuild/snps_synp.tcl deleted file mode 100644 index 47cc93215..000000000 --- a/grlib-original/bin/scriptgen/filebuild/snps_synp.tcl +++ /dev/null @@ -1,67 +0,0 @@ -set compile_synp_contents "" -proc append_file_snps_synp {f finfo} { - set i [dict get $finfo i] - set bn [dict get $finfo bn] - switch $i { - "vhdlp1735" { - global SYNPVHDL VHDLOPT - upvar compile_synp_contents csc - append csc "$SYNPVHDL $VHDLOPT$bn $f\n" - } - "vhdlmtie" { - } - "vhdlsynpe" { - global SYNPVHDL VHDLOPT - upvar compile_synp_contents csc - append csc "$SYNPVHDL $VHDLOPT$bn $f\n" - } - "vhdldce" { - } - "vhdlcdse" { - } - "vhdlxile" { - } - "vhdlfpro" { - } - "vhdlprec" { - } - "vhdlsyn" { - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - } else { - global SYNPVHDL VHDLOPT - upvar compile_synp_contents csc - append csc "$SYNPVHDL $VHDLOPT$bn $f\n" - } - } - "vlogsyn" { - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - } else { - global SYNPVLOG - upvar compile_synp_contents csc - append csc "$SYNPVLOG $f\n" - } - } - "svlogsyn" { - global SYNPVLOG - upvar compile_synp_contents csc - append csc "$SYNPVLOG -vlog_std sysv $f\n" - } - "vhdlsim" { - } - "vlogsim" { - } - "svlogsim" { - } - } - return -} - -proc eof_snps_synp {} { - upvar compile_synp_contents csc - set csc [rmvlinebreak $csc] - set compfile [open "compile.synp" w] - puts $compfile $csc - close $compfile -} diff --git a/grlib-original/bin/scriptgen/filebuild/snps_vcs.tcl b/grlib-original/bin/scriptgen/filebuild/snps_vcs.tcl deleted file mode 100644 index e609d892c..000000000 --- a/grlib-original/bin/scriptgen/filebuild/snps_vcs.tcl +++ /dev/null @@ -1,34 +0,0 @@ -set libs_do_contents "" -set vcs_ini_contents "" -proc create_snps_vcs {} { - upvar libs_do_contents ldc - upvar vcs_ini_contents mic - append ldc "mkdir -p vcs" - return -} - -proc append_lib_snps_vcs {k kinfo} { - upvar libs_do_contents ldc - upvar vcs_ini_contents mic - set bn [dict get $kinfo bn] - append ldc "\nmkdir -p vcs/$bn " - append mic "\n$bn : vcs/$bn" - return -} - -proc eof_snps_vcs {} { - upvar libs_do_contents ldc - upvar vcs_ini_contents mic - global GRLIB - set libsfile [open "vcs_libs" w] - puts $libsfile $ldc - close $libsfile - set readfile [open "$GRLIB/bin/synopsys_sim.setup" r] - set simfile [open "synopsys_sim.setup" w] - append mic "\n[read $readfile]" - set mic [rmvlinebreak $mic] - puts $simfile $mic - close $readfile - close $simfile - return -} diff --git a/grlib-original/bin/scriptgen/filebuild/xlnx.tcl b/grlib-original/bin/scriptgen/filebuild/xlnx.tcl deleted file mode 100644 index 1ca0b0d32..000000000 --- a/grlib-original/bin/scriptgen/filebuild/xlnx.tcl +++ /dev/null @@ -1,57 +0,0 @@ -proc xlnx_create_tool {filetree fileinfo} { - global GRLIB - source "$GRLIB/bin/scriptgen/filebuild/xlnx_ise.tcl" - source "$GRLIB/bin/scriptgen/filebuild/xlnx_planAhead.tcl" - source "$GRLIB/bin/scriptgen/filebuild/xlnx_top.tcl" - source "$GRLIB/bin/scriptgen/filebuild/xlnx_top_files.tcl" - source "$GRLIB/bin/scriptgen/filebuild/xlnx_top_xise.tcl" - source "$GRLIB/bin/scriptgen/filebuild/xlnx_vivado.tcl" - global VHDLSYNFILES VHDLOPTSYNFILES - set tmpnplinfo "" - foreach synfile [concat $VHDLOPTSYNFILES $VHDLSYNFILES] { - if {[string equal [glob -nocomplain $synfile] $synfile ] } { - append tmpnplinfo "SOURCE $synfile\n" - } - } - - create_xlnx_vivado - create_xlnx_planAhead - create_xlnx_top - create_xlnx_ise - create_xlnx_top_xise - - set fend 0 - - foreach k [dict keys $filetree] { - set ktree [dict get $filetree $k] - set kinfo [dict get $fileinfo $k] - append_lib_xlnx_top $k $kinfo - append_lib_xlnx_ise $k $kinfo - foreach l [dict keys $ktree] { - set filelist [dict get $ktree $l] - foreach f $filelist { - set finfo [dict get $fileinfo $f] - set bn [dict get $finfo bn] - if {[string equal $l "local"] && [string equal $bn "work"] && !$fend } { - append_ucf_xlnx_ise - set fend 1 - } - append_file_xlnx_ise $f $finfo - append_file_xlnx_top $f $finfo - append_file_top_xise $f $finfo - append_file_top_files $f $finfo - append_file_xlnx_vivado $f $finfo - append_file_xlnx_planAhead $f $finfo - } - } - } - eof_xlnx_ise - eof_xlnx_planAhead - eof_xlnx_xise - eof_xlnx_top - eof_xlnx_top_files - eof_xlnx_vivado -} - -xlnx_create_tool $filetree $fileinfo -return diff --git a/grlib-original/bin/scriptgen/filebuild/xlnx_ise.tcl b/grlib-original/bin/scriptgen/filebuild/xlnx_ise.tcl deleted file mode 100644 index e2888996e..000000000 --- a/grlib-original/bin/scriptgen/filebuild/xlnx_ise.tcl +++ /dev/null @@ -1,157 +0,0 @@ -set TOP_ise_tcl_contents "" -set compile_xst_contents "" -proc create_xlnx_ise {} { - global TOP PART SPEED PACKAGE ISETECH - upvar TOP_ise_tcl_contents titc - append titc "project new $TOP.ise\n" - append titc "project set family \"$ISETECH\"\n" - append titc "project set device $PART\n" - append titc "project set speed $SPEED\n" - append titc "project set package $PACKAGE\n" - append titc "puts \"Adding files to project\"\n" - return -} - -proc append_lib_xlnx_ise {k kinfo} { - global TOP XSTLIBSKIP - upvar TOP_ise_tcl_contents titc - set bn [dict get $kinfo bn] - if {[lsearch $XSTLIBSKIP $bn] < 0 } { - append titc "lib_vhdl new $bn\n" - } - return -} - -proc append_file_xlnx_ise {f finfo} { - set i [dict get $finfo i] - set bn [dict get $finfo bn] - switch $i { - "vhdlp1735" { - return - } - "vhdlmtie" { - return - } - "vhdlsynpe" { - return - } - "vhdldce" { - return - } - "vhdlcdse" { - return - } - "vhdlxile" { - upvar TOP_ise_tcl_contents titc - upvar compile_xst_contents cxc - global XSTVHDL VHDLOPT TOP - append titc "xfile add \"$f\" -lib_vhdl $bn\n" - append titc "puts \"$f\"\n" - append cxc "$XSTVHDL $VHDLOPT$bn -ifn $f\n" - return - } - "vhdlfpro" { - return - } - "vhdlprec" { - return - } - "vhdlsyn" { - set l [dict get $finfo l] - global XSTLIBSKIP XSTDIRSKIP XSTSKIP - set l [dict get $finfo l] - set q [dict get $finfo q] - if {[lsearchmatch $XSTLIBSKIP $bn] < 0 && [lsearchmatch $XSTDIRSKIP $l] < 0 && [lsearchmatch $XSTSKIP $q] < 0 } { - global XSTVHDL VHDLOPT TOP - upvar TOP_ise_tcl_contents titc - upvar compile_xst_contents cxc - append titc "xfile add \"$f\" -lib_vhdl $bn\n" - append titc "puts \"$f\"\n" - if {![string equal $l "local"] || ![string equal $bn "work"] } { - append cxc "$XSTVHDL $VHDLOPT$bn -ifn $f\n" - } - } - return - } - "vlogsyn" { - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - } else { - global XSTLIBSKIP XSTDIRSKIP XSTSKIP - set l [dict get $finfo l] - set q [dict get $finfo q] - if {[lsearchmatch $XSTLIBSKIP $bn] < 0 && [lsearchmatch $XSTDIRSKIP $l] < 0 && [lsearchmatch $XSTSKIP $q] < 0 } { - global XSTVLOG TOP - upvar TOP_ise_tcl_contents titc - upvar compile_xst_contents cxc - append titc "xfile add \"$f\" $bn\n" - append titc "puts \"$f\"\n" - append cxc "$XSTVLOG $bn -ifn $f\n" - } - } - return - } - "svlogsyn" { - global XSTLIBSKIP XSTDIRSKIP XSTSKIP - set l [dict get $finfo l] - set q [dict get $finfo q] - if {[lsearchmatch $XSTLIBSKIP $bn] < 0 && [lsearchmatch $XSTDIRSKIP $l] < 0 && [lsearchmatch $XSTSKIP $q] < 0 } { - global XSTVHDL VHDLOPT XSTVLOG TOP - upvar TOP_ise_tcl_contents titc - upvar compile_xst_contents cxc - append titc "xfile add \"$f\" $bn\n" - append titc "puts \"$f\"\n" - append cxc "$XSTVLOG $bn -ifn $f\n" - } - return - } - "vhdlsim" { - return - } - "vlogsim" { - return - } - "svlogsim" { - return - } - } - return -} - -proc append_ucf_xlnx_ise {} { - global TOP UCF - upvar TOP_ise_tcl_contents titc - foreach f $UCF { - append titc "xfile add \"$f\"\n" - } -} - -proc eof_xlnx_ise {} { - global TOP SYNPVLOGDEFS XSTOPT NETLISTTECH GRLIB \ - GRLIB_XIL_PN_Pack_Reg_Latches_into_IOBs ISEMAPOPT - upvar TOP_ise_tcl_contents titc - upvar compile_xst_contents cxc - append titc "project set top \"rtl\" \"$TOP\"\n" - append titc "project set \"Bus Delimiter\" ()\n" - append titc "project set \"FSM Encoding Algorithm\" None\n" - append titc "project set \"Pack I/O Registers into IOBs\" yes\n" - append titc "project set \"Verilog Macros\" \"$SYNPVLOGDEFS\"\n" - append titc "project set \"Other XST Command Line Options\" \"$XSTOPT\" -process \"Synthesize - XST\"\n" - append titc "project set \"Allow Unmatched LOC Constraints\" true -process \"Translate\"\n" - append titc "project set \"Macro Search Path\" \"$GRLIB/netlists/xilinx/$NETLISTTECH\" -process \"Translate\"\n" - append titc "project set \"Pack I/O Registers/Latches into IOBs\" \{$GRLIB_XIL_PN_Pack_Reg_Latches_into_IOBs\}\n" - append titc "project set \"Other MAP Command Line Options\" \"$ISEMAPOPT\" -process Map\n" - append titc "project set \"Drive Done Pin High\" true -process \"Generate Programming File\"\n" - append titc "project set \"Create ReadBack Data Files\" true -process \"Generate Programming File\"\n" - append titc "project set \"Create Mask File\" true -process \"Generate Programming File\"\n" - append titc "project set \"Run Design Rules Checker (DRC)\" false -process \"Generate Programming File\"\n" - append titc "project close\n" - append titc "exit" - set isetclfile [open "$TOP\_ise.tcl" w] - puts $isetclfile $titc - close $isetclfile - set cxc [rmvlinebreak $cxc] - set compfile [open "compile.xst" w] - puts $compfile $cxc - close $compfile -} diff --git a/grlib-original/bin/scriptgen/filebuild/xlnx_planAhead.tcl b/grlib-original/bin/scriptgen/filebuild/xlnx_planAhead.tcl deleted file mode 100644 index ab309e091..000000000 --- a/grlib-original/bin/scriptgen/filebuild/xlnx_planAhead.tcl +++ /dev/null @@ -1,211 +0,0 @@ -set planAhead_contents "" -proc create_xlnx_planAhead {} { - global TOP DESIGN DEVICE PLANAHEAD_SIMSET GRLIB_XIL_PlanAhead_Simulator SIMTOP PROTOBOARD GRLIB_XILINX_SOURCE_MGMT_MODE - upvar planAhead_contents pc - - file mkdir "planahead" - - append pc "# Xilinx planAhead script for LEON/GRLIB" - append pc "\n# Create a new project" - append pc "\ncreate_project $DESIGN ./planahead/$DESIGN -part $DEVICE -force" - if {![string equal $PLANAHEAD_SIMSET "sim_1"]} { - append pc "\ncreate_fileset -simset $PLANAHEAD_SIMSET" - } - append pc "\n# Board, part and design properties" - append pc "\nset_property target_simulator $GRLIB_XIL_PlanAhead_Simulator \[current_project\]" - append pc "\nset_property top_lib work \[current_fileset\]" - append pc "\nset_property top_arch rtl \[current_fileset\]" - append pc "\nset_property top $TOP \[current_fileset\]" - append pc "\nset_property target_language VHDL \[current_project\]" - if {![string equal $PROTOBOARD ""]} { - append pc "\nset_property board $PROTOBOARD \[current_project\]" - } - append pc "\n# Use manual compile order" - if {![string equal $GRLIB_XILINX_SOURCE_MGMT_MODE ""]} { - append pc "\nset_property source_mgmt_mode $GRLIB_XILINX_SOURCE_MGMT_MODE \[current_project\]" - } -# append pc "\nset_property source_mgmt_mode DisplayOnly \[current_project\]" - append pc "\n# Disable option: Include all design sources for simulation" - append pc "\n#set_property SOURCE_SET \{\} \[get_filesets $PLANAHEAD_SIMSET\]" - append pc "\n# Add files for simulation and synthesis" - append pc "\nset_property top $SIMTOP \[get_filesets $PLANAHEAD_SIMSET\]" - - return -} - -proc append_file_xlnx_planAhead {f finfo} { - set i [dict get $finfo i] - set bn [dict get $finfo bn] - switch $i { - "vhdlp1735" { - return - } - "vhdlmtie" { - return - } - "vhdlsynpe" { - return - } - "vhdldce" { - return - } - "vhdlcdse" { - return - } - "vhdlxile" { - global VIVADOVHDL - upvar planAhead_contents pc - append pc "\n$VIVADOVHDL $bn $f" - append pc "\nset_property file_type VHDL \[get_files $f\]" - return - } - "vhdlfpro" { - return - } - "vhdlprec" { - return - } - "vhdlsyn" { - set l [dict get $finfo l] - global VIVADOVHDL - upvar planAhead_contents pc - append pc "\n$VIVADOVHDL $bn $f" - - return - } - "vlogsyn" { - set l [dict get $finfo l] - global VIVADOVLOG - upvar planAhead_contents pc - append pc "\n$VIVADOVLOG $bn $f" - append pc "\nset_property file_type Verilog \[get_files $f\]" - return - } - "svlogsyn" { - global VIVADOVLOG - upvar planAhead_contents pc - append pc "\n$VIVADOVLOG $bn -sv $f" - return - } - "vhdlsim" { - set l [dict get $finfo l] - global VIVADOLIBSKIP VIVADODIRSKIP VIVADOSKIP PLANAHEAD_SIMSET - upvar planAhead_contents pc - set l [dict get $finfo l] - set q [dict get $finfo q] - if {[lsearchmatch $VIVADOLIBSKIP $bn] < 0 && [lsearchmatch $VIVADODIRSKIP $l] < 0 && [lsearchmatch $VIVADOSKIP $q] < 0 } { - append pc "\nadd_files -fileset $PLANAHEAD_SIMSET -norecurse $f" - append pc "\nset_property library $bn \[get_files $f\]" - append pc "\nset_property file_type VHDL \[get_files $f\]" - } - return - } - "vlogsim" { - set l [dict get $finfo l] - global PLANAHEAD_SIMSET - upvar planAhead_contents pc - append pc "\nadd_files -fileset $PLANAHEAD_SIMSET -norecurse $f" - append pc "\nset_property library $bn \[get_files $f\]" - append pc "\nset_property file_type Verilog \[get_files $f\]" - return - } - "svlogsim" { - global PLANAHEAD_SIMSET - upvar planAhead_contents pc - append pc "\nadd_files -fileset $PLANAHEAD_SIMSET -norecurse $f" - append pc "\nset_property library $bn \[get_files $f\]" - return - } - } - return -} - -proc eof_xlnx_planAhead {} { - global GRLIB NETLISTTECH PLANAHEAD_SIMSET GRLIB_XIL_PlanAhead_sim_verilog_define \ - UCF_PLANAHEAD PLANAHEAD_SYNTH_STRATEGY PLANAHEAD_IMPL_STRATEGY PLANAHEAD_BITGEN PROTOBOARD \ - CONFIG_MIG_DDR2 TOP TECHNOLOGY AREA_OPT - upvar planAhead_contents pc - -# Workaround for device specific map area optimization options - set LAREA_OPT [string tolower $AREA_OPT] - set tech [string tolower [regsub -all {[^a-zA-Z1-9]} $TECHNOLOGY ""]] - set vir5 [string first "virtex5" $tech] - set spr6 [string first "spartan6" $tech] - set vir4 [string first "virtex4" $tech] - set vir6 [string first "virtex6" $tech] - - append pc "\nadd_files -fileset $PLANAHEAD_SIMSET prom.srec ram.srec" - if {![string equal $GRLIB_XIL_PlanAhead_sim_verilog_define ""]} { - append pc "\nset_property verilog_define \{$GRLIB_XIL_PlanAhead_sim_verilog_define\} \[get_filesets $PLANAHEAD_SIMSET\]" - } - if {[file isdirectory $GRLIB/netlists/xilinx/$NETLISTTECH ]} { - append pc "\nimport_files $GRLIB/netlists/xilinx/$NETLISTTECH" - } - if {[string equal $PROTOBOARD "zedBoard"]} { - file mkdir "planahead/xps_files" - file copy "./edk_files/leon3_zedboard" "planAhead/xps_files/" - append pc "\n# Add Leon3 PS Zedboard Design" - append pc "\nadd_files ./planahead/xps_files/leon3_zedboard/leon3_zedboard.xmp" - append pc "\nmake_wrapper -files \[get_files ./planahead/xps_files/leon3_zedboard/leon3_zedboard.xmp\] -top -fileset \[get_filesets sources_1\] -import" - append pc "\nupdate_compile_order -fileset sources_1" - } - append pc "\n# Read board specific constraints" - foreach i $UCF_PLANAHEAD { - if {[file exists $i]} { - append pc "\nread_ucf $i" - } - } - if {[string equal $CONFIG_MIG_DDR2 "y"]} { - if {[file exists "mig/user_design/par/mig.ucf"]} { - append pc "\nread_ucf mig/user_design/par/mig.ucf" - } - - } -# append pc "create_run synth_$(DESIGN) -flow {$(PLANAHEAD_SYNTH_FLOW)} -strategy {$(PLANAHEAD_SYNTH_STRATEGY)}" - append pc "\nset_property strategy $PLANAHEAD_SYNTH_STRATEGY \[get_runs synth_1\]" - if {[expr {$vir4 > -1}]} { - append pc "\nset_property steps.xst.args.lc off \[get_runs synth_1\]" - } - append pc "\nset_property steps.xst.args.netlist_hierarchy as_optimized \[get_runs synth_1\]" - set phfile [open "planahead/$TOP\_planAhead.tcl" w] - puts $phfile $pc - close $phfile - - set pc "# Elaborate design to be able to apply SDC to top level" - append pc "\nlaunch_runs -jobs 1 synth_1" - append pc "\nwait_on_run -timeout 120 synth_1" - append pc "\n# Launch place and route" - append pc "\nset_property strategy $PLANAHEAD_IMPL_STRATEGY \[get_runs impl_1\]" - - if {[string equal $LAREA_OPT "yes"]} { - append pc "\nset_property steps.map.args.logic_opt on \[get_runs impl_1\]" - append pc "\nset_property steps.map.args.ol high \[get_runs impl_1\]" - append pc "\nset_property steps.map.args.xe c \[get_runs impl_1\]" - if {[expr {$vir5 > -1}] || [expr {$spr6 > -1}] || [expr {$vir6 > -1}]} { - append pc "\nset_property steps.map.args.lc area \[get_runs impl_1\]" - append pc "\nset_property steps.map.args.global_opt area \[get_runs impl_1\]" - } - } else { - append pc "\n#set_property steps.map.args.mt on \[get_runs impl_1\]" - append pc "\n#set_property steps.par.args.mt 4 \[get_runs impl_1\]" - } - append pc "\nset_property steps.bitgen.args.m true \[get_runs impl_1\]" - if {![string equal $PLANAHEAD_BITGEN ""]} { - append pc "\nset_property {steps.bitgen.args.More Options} \{ $PLANAHEAD_BITGEN \} \[get_runs impl_1\]" - } - append pc "\nlaunch_runs -jobs 1 impl_1 -to_step Bitgen" - append pc "\nwait_on_run -timeout 120 impl_1" - if {[string equal $PROTOBOARD "zedBoard"]} { - append pc "\nexport_hardware \[get_files ./planahead/xps_files/leon3_zedboard/leon3_zedboard.xmp\] \[get_runs impl_1\] -bitstream" - } - set phfile [open "planahead/$TOP\_planAhead_run.tcl" w] - puts $phfile $pc - close $phfile - - set phfile [open "planahead/$TOP\_planAhead_end.tcl" w] - puts $phfile "exit\n" - close $phfile - - return -} - diff --git a/grlib-original/bin/scriptgen/filebuild/xlnx_top.tcl b/grlib-original/bin/scriptgen/filebuild/xlnx_top.tcl deleted file mode 100644 index 25643a3eb..000000000 --- a/grlib-original/bin/scriptgen/filebuild/xlnx_top.tcl +++ /dev/null @@ -1,195 +0,0 @@ -set TOP_npl_contents "" -set TOP_synplify_npl_contents "" -set tmp_npl_contents "" -proc create_xlnx_top {} { - global TOP TECHNOLOGY PART SPEED PACKAGE GRLIB - upvar TOP_npl_contents tnc - upvar TOP_synplify_npl_contents tsnc - set temp "JDF G\n" - append temp "PROJECT $TOP\n" - append temp "DESIGN $TOP\n" - append temp "DEVFAM $TECHNOLOGY\n" - append temp "DEVICE $PART\n" - append temp "DEVSPEED $SPEED\n" - append temp "DEVPKG $PACKAGE\n" - append tnc $temp - append tsnc $temp - append tnc "DEVTOPLEVELMODULETYPE HDL\n" - append tsnc "DEVTOPLEVELMODULETYPE EDIF\n" - set readfile [open "$GRLIB/bin/def.npl" r] - set readinfo [read $readfile] - append tsnc $readinfo - set readinfo [rmvlinebreak $readinfo] - append tnc $readinfo - return -} - -proc append_lib_xlnx_top {k kinfo} { - upvar tmp_npl_contents mnc - global XSTLIBSKIP - set bn [dict get $kinfo bn] - if {[lsearch $XSTLIBSKIP $bn] < 0 } { - append mnc "SUBLIB $bn VhdlLibrary vhdl\n" - } - return -} - -proc append_file_xlnx_top {f finfo} { - set i [dict get $finfo i] - set bn [dict get $finfo bn] - switch $i { - "vhdlp1735" { - return - } - "vhdlmtie" { - return - } - "vhdlsynpe" { - return - } - "vhdldce" { - return - } - "vhdlcdse" { - return - } - "vhdlxile" { - upvar tmp_npl_contents mnc - append mnc "LIBFILE $f $bn vhdl\n" - return - } - "vhdlfpro" { - return - } - "vhdlprec" { - return - } - "vhdlsyn" { - upvar tmp_npl_contents mnc - set l [dict get $finfo l] - set q [dict get $finfo q] - if {[string equal $l "local"] && [string equal $bn "work"] } { - global XSTLIBSKIP XSTDIRSKIP XSTSKIP - if {[lsearchmatch $XSTLIBSKIP $bn] < 0 && [lsearchmatch $XSTDIRSKIP $l] < 0 && [lsearchmatch $XSTSKIP $q] < 0 } { - set temp "SOURCE $f\n" - append temp $mnc - set mnc $temp - } - } else { - global XSTLIBSKIP XSTDIRSKIP XSTSKIP - set l [dict get $finfo l] - set q [dict get $finfo q] - if {[lsearchmatch $XSTLIBSKIP $bn] < 0 && [lsearchmatch $XSTDIRSKIP $l] < 0 && [lsearchmatch $XSTSKIP $q] < 0 } { - append mnc "LIBFILE $f $bn vhdl\n" - } - } - return - } - "vlogsyn" { - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - } else { - upvar tmp_npl_contents mnc - global XSTLIBSKIP XSTDIRSKIP XSTSKIP - set l [dict get $finfo l] - set q [dict get $finfo q] - if {[lsearchmatch $XSTLIBSKIP $bn] < 0 && [lsearchmatch $XSTDIRSKIP $l] < 0 && [lsearchmatch $XSTSKIP $q] < 0 } { - append mnc "LIBFILE $f $bn verilog\n" - } - } - return - } - "svlogsyn" { - upvar tmp_npl_contents mnc - global XSTLIBSKIP XSTDIRSKIP XSTSKIP - set l [dict get $finfo l] - set q [dict get $finfo q] - if {[lsearchmatch $XSTLIBSKIP $bn] < 0 && [lsearchmatch $XSTDIRSKIP $l] < 0 && [lsearchmatch $XSTSKIP $q] < 0 } { - append mnc "LIBFILE $f $bn verilog\n" - } - return - } - "vhdlsim" { - return - } - "vlogsim" { - return - } - "svlogsim" { - return - } - } - return -} - -proc eof_xlnx_top {} { - global TOP UCF TECHNOLOGY GRLIB NETLISTTECH OS - upvar TOP_npl_contents tnc - upvar TOP_synplify_npl_contents tsnc - upvar tmp_npl_contents mnc - append tnc "\n" - append tnc $mnc - append tnc "DEPASSOC $TOP $UCF\n" - append tnc "\[Normal\]\n" - append tnc "_SynthFsmEncode=xstvhd, $TECHNOLOGY, VHDL.t_synthesize, 1102507235, None\n" - append tnc "p_xstBusDelimiter=xstvhd, $TECHNOLOGY, VHDL.t_synthesize, 1102507235, ()\n" - append tnc "xilxMapAllowLogicOpt=xstvhd, $TECHNOLOGY, VHDL.t_placeAndRouteDes, 1102861051, True\n" - append tnc "xilxMapCoverMode=xstvhd, $TECHNOLOGY, VHDL.t_placeAndRouteDes, 1102861051, Speed\n" - append tnc "xilxMapTimingDrivenPacking=xstvhd, $TECHNOLOGY, VHDL.t_placeAndRouteDes, 1102861051, True\n" - append tnc "xilxNgdbld_AUL=xstvhd, $TECHNOLOGY, VHDL.t_placeAndRouteDes, 1102861051, True\n" - append tnc "xilxNgdbldMacro=xstvhd, $TECHNOLOGY, VHDL.t_ngdbuild, 1105377047, $GRLIB/netlists/xilinx/$NETLISTTECH\n" - append tnc "xilxPAReffortLevel=xstvhd, $TECHNOLOGY, VHDL.t_placeAndRouteDes, 1102861051, Medium\n" - - set wininfo [rmvlinebreak [string map {/ \\} $tnc] ] - set winfile [open "$TOP\_win32.npl" w] - puts $winfile $wininfo - close $winfile - if {![catch {exec uname} myos]} { - if {![string equal -nocase $myos "Linux"] && \ - ![string equal -nocase $myos "SunOs"]} { - set tnc $wininfo - } - } else { - # If uname doesn't exist, we can be quite certain that we're not on a - # Linux or Unix system, which currently leaves Windows/CygWin - set tnc $wininfo - } - append tnc "\[STRATEGY-LIST\]\n" - append tnc "Normal=True\n" - append tnc "DEVSYNTHESISTOOL XST (VHDL/Verilog)" - set nplfile [open "$TOP.npl" w] - puts $nplfile $tnc - close $nplfile - - append tsnc "SOURCE synplify/$TOP.edf\n" - append tsnc "DEPASSOC $TOP $UCF\n" - append tsnc "\[Normal\]\n" - append tsnc "xilxMapAllowLogicOpt=edif, $TECHNOLOGY, EDIF.t_placeAndRouteDes, 1102861051, True\n" - append tsnc "xilxMapCoverMode=edif, $TECHNOLOGY, EDIF.t_placeAndRouteDes, 1102861051, Speed\n" - append tsnc "xilxNgdbld_AUL=edif, $TECHNOLOGY, EDIF.t_placeAndRouteDes, 1102861051, True\n" - append tsnc "xilxPAReffortLevel=edif, $TECHNOLOGY, EDIF.t_placeAndRouteDes, 1102861051, Medium\n" - append tsnc "xilxNgdbldMacro=edif, $TECHNOLOGY, EDIF.t_placeAndRouteDes, 1105378344, $GRLIB/netlists/xilinx/$NETLISTTECH\n" - - set wininfo [rmvlinebreak [string map {/ \\} $tsnc] ] - set winfile [open "$TOP\_synplify_win32.npl" w] - puts $winfile $wininfo - close $winfile - - if {![catch {exec uname} myos]} { - if {![string equal -nocase $myos "Linux"] && \ - ![string equal -nocase $myos "SunOs"]} { - set tsnc $wininfo - } - } else { - # If uname doesn't exist, we can be quite certain that we're not on a - # Linux or Unix system, which currently leaves Windows/CygWin - set tsnc $wininfo - } - - append tsnc "\[STRATEGY-LIST\]\n" - append tsnc "Normal=True" - set synpfile [open "$TOP\_synplify.npl" w] - puts $synpfile $tsnc - close $synpfile - return -} diff --git a/grlib-original/bin/scriptgen/filebuild/xlnx_top_files.tcl b/grlib-original/bin/scriptgen/filebuild/xlnx_top_files.tcl deleted file mode 100644 index b7fe843ba..000000000 --- a/grlib-original/bin/scriptgen/filebuild/xlnx_top_files.tcl +++ /dev/null @@ -1,83 +0,0 @@ -set TOP_files_prj_contents "" -proc append_file_top_files {f finfo} { - set i [dict get $finfo i] - set bn [dict get $finfo bn] - switch $i { - "vhdlp1735" { - return - } - "vhdlmtie" { - return - } - "vhdlsynpe" { - return - } - "vhdldce" { - return - } - "vhdlcdse" { - return - } - "vhdlxile" { - global TOP - upvar TOP_files_prj_contents tfpc - append tfpc "\nvhdl $bn $f" - return - } - "vhdlfpro" { - return - } - "vhdlprec" { - return - } - "vhdlsyn" { - global XSTLIBSKIP XSTDIRSKIP XSTSKIP TOP - set l [dict get $finfo l] - set q [dict get $finfo q] - if {[lsearchmatch $XSTLIBSKIP $bn] < 0 && [lsearchmatch $XSTDIRSKIP $l] < 0 && [lsearchmatch $XSTSKIP $q] < 0 } { - upvar TOP_files_prj_contents tfpc - append tfpc "\nvhdl $bn $f" - } - return - } - "vlogsyn" { - global XSTLIBSKIP XSTDIRSKIP XSTSKIP TOP - set l [dict get $finfo l] - set q [dict get $finfo q] - if {[lsearchmatch $XSTLIBSKIP $bn] < 0 && [lsearchmatch $XSTDIRSKIP $l] < 0 && [lsearchmatch $XSTSKIP $q] < 0 } { - upvar TOP_files_prj_contents tfpc - append tfpc "\nverilog $bn $f" - } - return - } - "svlogsyn" { - global XSTLIBSKIP XSTDIRSKIP XSTSKIP TOP - set l [dict get $finfo l] - set q [dict get $finfo q] - if {[lsearchmatch $XSTLIBSKIP $bn] < 0 && [lsearchmatch $XSTDIRSKIP $l] < 0 && [lsearchmatch $XSTSKIP $q] < 0 } { - upvar TOP_files_prj_contents tfpc - append tfpc "\nverilog $bn $f" - } - return - } - "vhdlsim" { - return - } - "vlogsim" { - return - } - "svlogsim" { - return - } - } - return -} - -proc eof_xlnx_top_files {} { - global TOP - upvar TOP_files_prj_contents tfpc - set prjfile [open "$TOP\_files.prj" w] - puts $prjfile $tfpc - close $prjfile - return -} diff --git a/grlib-original/bin/scriptgen/filebuild/xlnx_top_xise.tcl b/grlib-original/bin/scriptgen/filebuild/xlnx_top_xise.tcl deleted file mode 100644 index 5c59fabc8..000000000 --- a/grlib-original/bin/scriptgen/filebuild/xlnx_top_xise.tcl +++ /dev/null @@ -1,175 +0,0 @@ -set TOP_xise_contents "" -proc create_xlnx_top_xise {} { - upvar TOP_xise_contents txc - global GRLIB TOP UCF - set readfile [open "$GRLIB/bin/head.xise" r] - append txc [read $readfile] - append txc " \\n" - foreach u $UCF { - append txc " \\n" - append txc " \\n" - append txc " \\n" - } - return -} - -proc append_file_top_xise {f finfo} { - set i [dict get $finfo i] - set bn [dict get $finfo bn] - switch $i { - "vhdlp1735" { - return - } - "vhdlmtie" { - return - } - "vhdlsynpe" { - return - } - "vhdldce" { - return - } - "vhdlcdse" { - return - } - "vhdlxile" { - global TOP - upvar TOP_xise_contents txc - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - return - } - "vhdlfpro" { - return - } - "vhdlprec" { - return - } - "vhdlsyn" { - global TOP XSTLIBSKIP XSTDIRSKIP XSTSKIP - set l [dict get $finfo l] - set q [dict get $finfo q] - if {[lsearchmatch $XSTLIBSKIP $bn] < 0 && [lsearchmatch $XSTDIRSKIP $l] < 0 && [lsearchmatch $XSTSKIP $q] < 0 } { - upvar TOP_xise_contents txc - append txc " \n" - append txc " \n" - append txc " \n" - if {![string equal $l "local"] || ![string equal $bn "work"] } { - append txc " \n" - } - append txc " \n" - } - return - } - "vlogsyn" { - set l [dict get $finfo l] - if {[string equal $l "local"] && [string equal $bn "work"] } { - } else { - global TOP XSTLIBSKIP XSTDIRSKIP XSTSKIP - set l [dict get $finfo l] - set q [dict get $finfo q] - if {[lsearchmatch $XSTLIBSKIP $bn] < 0 && [lsearchmatch $XSTDIRSKIP $l] < 0 && [lsearchmatch $XSTSKIP $q] < 0 } { - upvar TOP_xise_contents txc - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - } - } - return - } - "svlogsyn" { - global TOP XSTLIBSKIP XSTDIRSKIP XSTSKIP - set l [dict get $finfo l] - set q [dict get $finfo q] - if {[lsearchmatch $XSTLIBSKIP $bn] < 0 && [lsearchmatch $XSTDIRSKIP $l] < 0 && [lsearchmatch $XSTSKIP $q] < 0 } { - upvar TOP_xise_contents txc - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - } - return - } - "vhdlsim" { - global TOP - upvar TOP_xise_contents txc - set l [dict get $finfo l] - append txc " \n" - append txc " \n" - if {![string equal $l "local"] || ![string equal $bn "work"] } { - append txc " \n" - } - append txc " \n" - return - - } - "vlogsim" { - return - } - "svlogsim" { - return - } - } - return -} - -proc eof_xlnx_xise {} { - global TOP PART ISE11TECH NETLISTTECH ISEMAPOPT XSTOPT EFFORT \ - GRLIB_XIL_PN_Pack_Reg_Latches_into_IOBs PACKAGE GRLIB_XIL_PN_Simulator \ - SPEED SIMTOP GRLIB basenames - upvar TOP_xise_contents txc - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - foreach bn $basenames { - append txc " \n" - } - append txc " \n" - append txc " \n" - append txc " \n" - append txc " \n" - append txc "" - set xisefile [open "$TOP.xise" w] - puts $xisefile $txc - close $xisefile - return -} diff --git a/grlib-original/bin/scriptgen/filebuild/xlnx_vivado.tcl b/grlib-original/bin/scriptgen/filebuild/xlnx_vivado.tcl deleted file mode 100644 index ed5d9dd37..000000000 --- a/grlib-original/bin/scriptgen/filebuild/xlnx_vivado.tcl +++ /dev/null @@ -1,263 +0,0 @@ -set vivado_contents "" -proc create_xlnx_vivado {} { - global DESIGN DEVICE VIVADO_SIMSET SIMTOP GRLIB_XILINX_SOURCE_MGMT_MODE VIVADO_SYNTH_STRATEGY VIVADO_IMPL_STRATEGY - upvar vivado_contents vc - - file mkdir "vivado" - - append vc "# Xilinx Vivado script for LEON/GRLIB" - append vc "\n# Create a new project" - append vc "\ncreate_project $DESIGN ./vivado/$DESIGN -part $DEVICE -force" - if {![string equal $VIVADO_SIMSET "sim_1"]} { - append vc "\ncreate_fileset -simset $VIVADO_SIMSET" - } - if {![string equal $GRLIB_XILINX_SOURCE_MGMT_MODE ""]} { - append vc "\nset_property source_mgmt_mode $GRLIB_XILINX_SOURCE_MGMT_MODE \[current_project\]" - } - append vc "\nset_property top $SIMTOP \[get_filesets $VIVADO_SIMSET\]" - append vc "\nset_property target_language verilog \[current_project\]" - if {![string equal $VIVADO_SYNTH_STRATEGY ""]} { - append vc "\nset_property strategy {$VIVADO_SYNTH_STRATEGY} \[get_runs synth_1\]" - } - if {![string equal $VIVADO_IMPL_STRATEGY ""]} { - append vc "\nset_property strategy {$VIVADO_IMPL_STRATEGY} \[get_runs impl_1\]" - } - append vc "\n# Add files for simulation and synthesis" - - return -} - -proc append_file_xlnx_vivado {f finfo} { - set i [dict get $finfo i] - set bn [dict get $finfo bn] - switch $i { - "vhdlp1735" { - return - } - "vhdlmtie" { - return - } - "vhdlsynpe" { - return - } - "vhdldce" { - return - } - "vhdlcdse" { - return - } - "vhdlxile" { - global VIVADOVHDL - upvar vivado_contents vc - append vc "\n$VIVADOVHDL $bn $f" - return - } - "vhdlfpro" { - return - } - "vhdlprec" { - return - } - "vhdlsyn" { - set l [dict get $finfo l] - global VIVADOVHDL VIVADOLIBSKIP VIVADODIRSKIP VIVADOSKIP - set l [dict get $finfo l] - set q [dict get $finfo q] - if {[lsearchmatch $VIVADOLIBSKIP $bn] < 0 && [lsearchmatch $VIVADODIRSKIP $l] < 0 && [lsearchmatch $VIVADOSKIP $q] < 0 } { - upvar vivado_contents vc - append vc "\n$VIVADOVHDL $bn $f" - } - return - } - "vlogsyn" { - set l [dict get $finfo l] - global VIVADOVLOG - upvar vivado_contents vc - append vc "\n$VIVADOVLOG $bn $f" - return - } - "svlogsyn" { - global VIVADOVLOG - upvar vivado_contents vc - append vc "\n$VIVADOVLOG $bn -sv $f" - return - } - "vhdlsim" { - set l [dict get $finfo l] - global VIVADOLIBSKIP VIVADODIRSKIP VIVADOSKIP - upvar vivado_contents vc - set l [dict get $finfo l] - set q [dict get $finfo q] - if {[lsearchmatch $VIVADOLIBSKIP $bn] < 0 && [lsearchmatch $VIVADODIRSKIP $l] < 0 && [lsearchmatch $VIVADOSKIP $q] < 0 } { - append vc "\nread_vhdl -library $bn $f" - append vc "\nset_property used_in_synthesis false \[get_files $f\]" - } - return - } - "vlogsim" { - set l [dict get $finfo l] - upvar vivado_contents vc - append vc "\nread_verilog -library $bn $f" - append vc "\nset_property used_in_synthesis false \[get_files $f\]" - return - } - "svlogsim" { - return - } - } - return -} - -proc eof_xlnx_vivado {} { - global VIVADO_SIMSET GRLIB_XIL_Vivado_sim_verilog_define XDC TCL VIVADO_UCF \ - GRLIB_XIL_Vivado_Simulator TOP PROTOBOARD CONFIG_MIG_7SERIES BOARD VIVADO_MIG_AXI \ - AXI_64 AXI_128 DESIGN CONFIG_GRETH_ENABLE NETLISTTECH GRLIB CONFIG_XILINX_SPFI_SERDES\ - VIVADO_SYNTH_FLOW VIVADO_SYNTH_STRATEGY VIVADO_IMPL_STRATEGY VIVADO_INCL_DIRS - upvar vivado_contents vc - - append vc "\nadd_files -fileset $VIVADO_SIMSET prom.srec ram.srec" - if {![string equal $GRLIB_XIL_Vivado_sim_verilog_define ""]} { - append vc "\nset_property verilog_define {$GRLIB_XIL_Vivado_sim_verilog_define} \[get_filesets $VIVADO_SIMSET\]" - } - append vc "\n# Read board specific constraints" - foreach i $XDC { - append vc "\nread_xdc $i" - append vc "\nset_property used_in_synthesis true \[get_files $i\]" - append vc "\nset_property used_in_implementation true \[get_files $i\]" - } - foreach i $TCL { - append vc "\nsource $i" - } - foreach i $VIVADO_UCF { - append vc "\nimport_files $i" - append vc "\nset_property used_in_synthesis true \[get_files $i\]" - append vc "\nset_property used_in_implementation true \[get_files $i\]" - } - append vc "\n# Board, part and design properties" - append vc "\nset_property target_simulator $GRLIB_XIL_Vivado_Simulator \[current_project\]" - append vc "\nset_property top_lib work \[current_fileset\]" - append vc "\nset_property top_arch rtl \[current_fileset\]" - append vc "\nset_property top $TOP \[current_fileset\]" - if {![string equal $PROTOBOARD ""]} { - append vc "\nif {\[regexp -nocase {\.\*board_part\.\*} \[list_property \[current_project\]\]\]} {" - append vc "\n set_property board_part $PROTOBOARD \[current_project\]" - append vc "\n} else {" - append vc "\n set_property board $PROTOBOARD \[current_project\]" - append vc "\n}" - } - if {[string equal $CONFIG_MIG_7SERIES "y"]} { - if {[string equal $BOARD "digilent-nexys4ddr-xc7a100t"]} { - append vc "\nset_property STEPS.WRITE_BITSTREAM.TCL.PRE ../../../../bitstream.tcl \[get_runs impl_1\]" - } - if {[file exists "$GRLIB/boards/$BOARD/mig.xci"]} { - if {![string equal $VIVADO_MIG_AXI ""]} { - if {![string equal $AXI_64 ""]} { - set files [glob -nocomplain -type f "$GRLIB/boards/$BOARD/axi_64/mig*"] - if {[file exists "$GRLIB/boards/$BOARD/axi_64/axi_pipe.xci"]} { - lappend files [glob -nocomplain -type f "$GRLIB/boards/$BOARD/axi_64/axi_pipe*"] - } - } else { - if {![string equal $AXI_128 ""]} { - set files [glob -nocomplain -type f "$GRLIB/boards/$BOARD/axi_128/mig*"] - if {[file exists "$GRLIB/boards/$BOARD/axi_128/axi_pipe.xci"]} { - lappend files [glob -nocomplain -type f "$GRLIB/boards/$BOARD/axi_128/axi_pipe*"] - } - } else { - set files [glob -nocomplain -type f "$GRLIB/boards/$BOARD/axi/mig*"] - if {[file exists "$GRLIB/boards/$BOARD/axi/axi_pipe.xci"]} { - lappend files [glob -nocomplain -type f "$GRLIB/boards/$BOARD/axi/axi_pipe*"] - } - } - } - } else { - set files [glob -nocomplain -type f "$GRLIB/boards/$BOARD/mig.*"] - if {[file exists "$GRLIB/boards/$BOARD/axi_pipe.xci"]} { - lappend files [glob -nocomplain -type f "$GRLIB/boards/$BOARD/axi_pipe*"] - } - } - foreach f $files { - file copy $f "vivado/" - } - append vc "\nset_property target_language verilog \[current_project\]" - append vc "\nimport_ip -files vivado/mig.xci -name mig" - if {[file exists "vivado/mig_cdc.xci"]} { - append vc "\nimport_ip -files vivado/mig_cdc.xci -name mig_cdc" - } - if {[file exists "vivado/axi_pipe.xci"]} { - append vc "\nimport_ip -files vivado/axi_pipe.xci -name axi_pipe" - } - append vc "\n#upgrade_ip \[get_ips mig\]" - append vc "\ngenerate_target all \[get_files ./vivado/$DESIGN/$DESIGN.srcs/sources_1/ip/mig/mig.xci\] -force " - if {[file exists "vivado/mig_cdc.xci"]} { - append vc "\ngenerate_target all \[get_files ./vivado/$DESIGN/$DESIGN.srcs/sources_1/ip/mig_cdc/mig_cdc.xci\] -force " - } - if {[file exists "vivado/axi_pipe.xci"]} { - append vc "\ngenerate_target all \[get_files ./vivado/$DESIGN/$DESIGN.srcs/sources_1/ip/axi_pipe/axi_pipe.xci\] -force " - } - } else { - puts "\n\nWARNING: No MIG 7series IP was found\n\n" - } - } - if {[string equal $CONFIG_GRETH_ENABLE "y"]} { - if {[file exists "$GRLIB/boards/$BOARD/sgmii.xci"]} { - set files [glob -nocomplain -type f "$GRLIB/boards/$BOARD/sgmii.*"] - foreach f $files { - file copy $f "vivado/" - } - append vc "\nset_property target_language verilog \[current_project\]" - append vc "\nimport_ip -files vivado/sgmii.xci -name sgmii" - append vc "\ngenerate_target all \[get_files ./vivado/$DESIGN/$DESIGN.srcs/sources_1/ip/sgmii/sgmii.xci\] -force " - } - } - if {[string equal $CONFIG_XILINX_SPFI_SERDES "y"]} { - if {[file exists "$GRLIB/boards/$BOARD/spfi_serdes.xci"]} { - set files [glob -nocomplain -type f "$GRLIB/boards/$BOARD/spfi_serdes.*"] - foreach f $files { - file copy $f "vivado/" - } - append vc "\nset_property target_language verilog \[current_project\]" - append vc "\nimport_ip -files vivado/spfi_serdes.xci -name spfi_serdes" - append vc "\ngenerate_target all \[get_files ./vivado/$DESIGN/$DESIGN.srcs/sources_1/ip/spfi_serdes/spfi_serdes.xci\] -force " - } - } - if {[string equal $BOARD "xilinx-kcu105-xcku040"]} { - if {[file exists "$GRLIB/boards/$BOARD/sem_ultra_0.xci"]} { - file copy "$GRLIB/boards/$BOARD/sem_ultra_0.xci" "vivado/" - append vc "\nimport_ip -files vivado/sem_ultra_0.xci -name sem_ultra_0" - append vc "\ngenerate_target all \[get_files ./vivado/$DESIGN/$DESIGN.srcs/sources_1/ip/sem_ultra_0/sem_ultra_0.xci\] -force " - } - } - if {[file isdirectory "$GRLIB/netlists/xilinx/$NETLISTTECH" ]} { - append vc "\nimport_files $GRLIB/netlists/xilinx/$NETLISTTECH" - } - set vivfile [open "vivado/$TOP\_vivado.tcl" w] - puts $vivfile $vc - close $vivfile - - if {![string equal $VIVADO_INCL_DIRS ""]} { - set vc "synth_design -include_dirs {$VIVADO_INCL_DIRS} -directive runtimeoptimized -resource_sharing off -keep_equivalent_registers -no_lc -rtl -name rtl_1" - } else { - set vc "synth_design -directive runtimeoptimized -resource_sharing off -keep_equivalent_registers -no_lc -rtl -name rtl_1" - } - - append vc "\nset_property flow {$VIVADO_SYNTH_FLOW} \[get_runs synth_1\]" - append vc "\nset_property strategy {$VIVADO_SYNTH_STRATEGY} \[get_runs synth_1\]" - append vc "\nlaunch_runs synth_1" - append vc "\nwait_on_run -timeout 360 synth_1" - append vc "\nget_ips" - append vc "\n# Launch place and route" - append vc "\nset_property strategy {$VIVADO_IMPL_STRATEGY} \[get_runs impl_1\]" - append vc "\nset_property steps.write_bitstream.args.mask_file true \[get_runs impl_1\]" - append vc "\nset_msg_config -suppress -id {Drc 23-20}" - append vc "\nlaunch_runs impl_1 -to_step write_bitstream" - append vc "\nwait_on_run -timeout 360 impl_1" - append vc "\n#report_timing_summary -delay_type min_max -path_type full_clock_expanded -report_unconstrained -check_timing_verbose -max_paths 10 -nworst 1 -significant_digits 3 -input_pins -name timing_1 -file ./vivado/$TOP\_post_timing.rpt" - append vc "\n#report_drc -file $TOP\_drc_route.rpt" - - set vivfile [open "vivado/$TOP\_vivado_run.tcl" w] - puts $vivfile $vc - close $vivfile - - return -} - diff --git a/grlib-original/bin/scriptgen/main.tcl b/grlib-original/bin/scriptgen/main.tcl deleted file mode 100644 index 375b2c6b5..000000000 --- a/grlib-original/bin/scriptgen/main.tcl +++ /dev/null @@ -1,14 +0,0 @@ -if {[info exists ::env(GRLIB)]} { - set GRLIB $::env(GRLIB) -} - - set script_path [ file dirname [ file normalize [ info script ] ] ] - source "$script_path/tcl_dict.tcl" - - -source "scriptgenwork/tools.tcl" -source "scriptgenwork/extrafiles.tcl" - -source "$GRLIB/bin/scriptgen/database.tcl" - -close [open "scriptgendone" w] diff --git a/grlib-original/bin/scriptgen/scriptgen_variables.txt b/grlib-original/bin/scriptgen/scriptgen_variables.txt deleted file mode 100644 index c173ac463..000000000 --- a/grlib-original/bin/scriptgen/scriptgen_variables.txt +++ /dev/null @@ -1,163 +0,0 @@ -XTECHLIBS -GRLIB -LIBADD -FILEADD -EXTRALIBS -DIRADD -TECHLIBS -XLIBSKIP -GRLIB_LEON3_VERSION -XDIRSKIP -GRLIB_CONFIG -XFILESKIP -VHDLANOPT -VLOGANOPT -SVLOGANOPT -VCOM -VHDLOPT -VLOG -SVLOG -SYNPVHDL -DCVHDL -RTLCVHDL -XSTVHDL -VIVADOVHDL -ACOM -NCVHDL -XDCLIBSKIP -XDCDIRSKIP -DCSKIP -XSYNPLIBSKIP -XSYNPDIRSKIP -SYNPSKIP -XSTLIBSKIP -XSTDIRSKIP -XSTSKIP -VIVADOLIBSKIP -VIVADODIRSKIP -VIVADOSKIP -GHDLI -GHDLIOPT -NCVLOG -SNPS_HOME -TOP -SYNPVLOG -LIBEROLIBSKIP -LIBERODIRSKIP -LIBEROSKIP -FMVHDL -FMVHDLOPT -FMVLOG -RTLCVLOG -XSTVLOG -SF2SIMLIB_RIVIERA -PLANAHEAD_SIMSET -PRECDIRSKIP -PRECLIBSKIP -PRECSKIP -ALOG -QUARTUSLIBSKIP -QDIRSKIP -QUARTUSSKIP -PART -SPEED -PACKAGE -ISPPACKAGE -LIBERO_PACKAGE -DESIGNER_PACKAGE -MGCPACKAGE -ISPLIB -TECHNOLOGY -DESIGNER_TECHNOLOGY -MGCTECHNOLOGY -LIBERO_DIE -DESIGNER_VOLTAGE -DESIGNER_TEMPR -DESIGNER_VOLTRANGE -DESIGNER_PINS -DESIGNER_PARTR -MANUFACTURER -MGCPART -ISETECH -QSF -VHDLOPTSYNFILES -VHDLSYNFILES -VHDLIPFILES -UCF -GRLIB_SIMULATOR -SIMTOP -SIMINST -VHDLSIMFILES -PRECOPT -SYNFREQ -ISE11TECH -NETLISTTECH -XSTOPT -EFFORT -GRLIB_XIL_PN_Pack_Reg_Latches_into_IOBs -QSF_APPEND -GRLIB_XIL_PN_Simulator -ISEMAPOPT -SYNPVLOGDEFS -VERILOGSYNFILES -VERILOGOPTSYNFILES -VERILOGSIMFILES -SDCFILE -FDC -SDC -PDC -FPPDC -NDC -LIBERO_EXTRA_SDC -LIBEROPRECOMPLIBDIR -DCVLOG -VIVADOVLOG -DESIGNER_LAYOUT_OPT -DESIGNER_RADEXP -SDC_EXTRA -PDC_EXTRA -DESIGNER_PART -DESIGNER_PACKAGE -DESIGN -DEVICE -GRLIB_XIL_PlanAhead_Simulator -PROTOBOARD -CONFIG_MIG_DDR2 -UCF_PLANAHEAD -PLANAHEAD_BITGEN -GRLIB_XIL_PlanAhead_sim_verilog_define -PLANAHEAD_SYNTH_STRATEGY -PLANAHEAD_IMPL_STRATEGY -GRLIB_XIL_Vivado_sim_verilog_define -XDC_EARLY -XDC -XDC_LATE -TCL -VIVADO_UCF -GRLIB_XIL_Vivado_Simulator -CONFIG_MIG_7SERIES -VIVADO_MIG_AXI -CONFIG_XILINX_SPFI_SERDES -AXI_64 -AXI_128 -VIVADO_CROSSBAR_AXI -VIVADO_INCL_DIRS -CONFIG_GRETH_ENABLE -VIVADO_SYNTH_FLOW -VIVADO_SYNTH_STRATEGY -VIVADO_IMPL_STRATEGY -VIVADO_SIMSET -GRLIB_XILINX_SOURCE_MGMT_MODE -BOARD -DESIGNER_RESTRICTPROBEPINS -DESIGNER_RTG4_SET_MITIGATION -OS -ENHANCED_CONSTRAINT_FLOW -AREA_OPT -RAD_EXPOSURE -IO_DEFT_STD -MAPPING_EFFORT -TIMING_DRIVEN -NXCONSTRAINTS -LIBERO_VERSION - diff --git a/grlib-original/bin/scriptgen/scriptgencfg-examples/extrafiles.tcl b/grlib-original/bin/scriptgen/scriptgencfg-examples/extrafiles.tcl deleted file mode 100644 index ab1d11ad4..000000000 --- a/grlib-original/bin/scriptgen/scriptgencfg-examples/extrafiles.tcl +++ /dev/null @@ -1,12 +0,0 @@ -set filelist [list] -lappend filelist "extrafile.vhd" -set dir "local" -set libdict [dict create] -dict set libdict $dir $filelist -set lib "$GRLIB/lib/work" -set extrafiletree [dict create] -dict set extrafiletree $lib $libdict - -set extrafileinfo [dict create] -dict set extrafileinfo "$GRLIB/lib/work" [dict create k_real "/home/gaisler/grlib/lib/work" bn "work" fattr ""] -dict set extrafileinfo "extrafile.vhd" [dict create bn "work" f_real "/home/gaisler/grlib/lib/work/local/extrafile.vhd" q "extrafile.vhd" l "local" i "vhdlsyn" k "../../lib/work" fattr ""] diff --git a/grlib-original/bin/scriptgen/scriptgencfg-examples/newtool.tcl b/grlib-original/bin/scriptgen/scriptgencfg-examples/newtool.tcl deleted file mode 100644 index 4c1d92864..000000000 --- a/grlib-original/bin/scriptgen/scriptgencfg-examples/newtool.tcl +++ /dev/null @@ -1,21 +0,0 @@ -proc newtool_create_tool {filetree fileinfo} { - global GRLIB - source "scriptgenwork/filebuild/newtool_example_file.tcl" - create_newtool_example_file - foreach k [dict keys $filetree] { - set ktree [dict get $filetree $k] - set kinfo [dict get $fileinfo $k] - append_lib_newtool_example_file $k $kinfo - foreach l [dict keys $ktree] { - set filelist [dict get $ktree $l] - foreach f $filelist { - set finfo [dict get $fileinfo $f] - append_file_newtool_example_file $f $finfo - } - } - } - eof_newtool_example_file -} - -newtool_create_tool $filetree $fileinfo -return diff --git a/grlib-original/bin/scriptgen/scriptgencfg-examples/newtool_example_file.tcl b/grlib-original/bin/scriptgen/scriptgencfg-examples/newtool_example_file.tcl deleted file mode 100644 index bcdd358fa..000000000 --- a/grlib-original/bin/scriptgen/scriptgencfg-examples/newtool_example_file.tcl +++ /dev/null @@ -1,71 +0,0 @@ -set newtool_example_contents "" -proc create_newtool_example_file {} { - upvar newtool_example_contents nec - append nec "" - return -} -proc append_lib_newtool_example_file {k kinfo} { - upvar newtool_example_contents nec - append nec "" - return -} -proc append_file_newtool_example_file {f finfo} { - set i [dict get $finfo i] - set bn [dict get $finfo bn] - switch $i { - "vhdlp1735" { - return - } - "vhdlmtie" { - return - } - "vhdlsynpe" { - return - } - "vhdldce" { - return - } - "vhdlcdse" { - return - } - "vhdlxile" { - return - } - "vhdlfpro" { - return - } - "vhdlprec" { - return - } - "vhdlsyn" { - upvar newtool_example_contents nec - append nec "" - return - } - "vlogsyn" { - return - } - "svlogsyn" { - return - } - "vhdlsim" { - upvar newtool_example_contents nec - append nec "" - return - } - "vlogsim" { - return - } - "svlogsim" { - return - } - } - return -} -proc eof_newtool_example_file {} { - upvar newtool_example_contents nec - set examplefile [open "newtool.example" w] - puts $examplefile $nec - close $examplefile - return -} diff --git a/grlib-original/bin/scriptgen/scriptgencfg-examples/tools.tcl b/grlib-original/bin/scriptgen/scriptgencfg-examples/tools.tcl deleted file mode 100644 index 20235bd38..000000000 --- a/grlib-original/bin/scriptgen/scriptgencfg-examples/tools.tcl +++ /dev/null @@ -1 +0,0 @@ -set tools {aldec altera cdns ghdl lattice mentor microsemi snps xlnx newtool} diff --git a/grlib-original/bin/scriptgen/scriptgencfg/README.txt b/grlib-original/bin/scriptgen/scriptgencfg/README.txt deleted file mode 100644 index 0bb641c72..000000000 --- a/grlib-original/bin/scriptgen/scriptgencfg/README.txt +++ /dev/null @@ -1 +0,0 @@ -See documentation in $GRLIB/bin/scriptgen/README.txt diff --git a/grlib-original/bin/scriptgen/scriptgencfg/extrafiles.tcl b/grlib-original/bin/scriptgen/scriptgencfg/extrafiles.tcl deleted file mode 100644 index c0d86732b..000000000 --- a/grlib-original/bin/scriptgen/scriptgencfg/extrafiles.tcl +++ /dev/null @@ -1,2 +0,0 @@ -set extrafiletree [dict create] -set extrafileinfo [dict create] diff --git a/grlib-original/bin/scriptgen/scriptgencfg/tools.tcl b/grlib-original/bin/scriptgen/scriptgencfg/tools.tcl deleted file mode 100644 index 12dfbd5ae..000000000 --- a/grlib-original/bin/scriptgen/scriptgencfg/tools.tcl +++ /dev/null @@ -1 +0,0 @@ -set tools {actel aldec altera cdns ghdl lattice mentor microsemi snps xlnx nanoxplore} diff --git a/grlib-original/bin/scriptgen/targets.tcl b/grlib-original/bin/scriptgen/targets.tcl deleted file mode 100644 index ecd9c1f5b..000000000 --- a/grlib-original/bin/scriptgen/targets.tcl +++ /dev/null @@ -1,72 +0,0 @@ -set toolsstring "" - -if {[info exists ::env(TOP)]} { - set TOP $::env(TOP) -} -source "scriptgenwork/tools.tcl" -foreach tool $tools { - switch $tool { - "aldec" { - append toolsstring "compile.asim " - append toolsstring "make.riviera " - append toolsstring "riviera_ws_create.do " - continue - } - "altera" { - append toolsstring "$TOP\_quartus.qsf " - continue - } - "cdns" { - append toolsstring "compile.ncsim " - append toolsstring "compile.rc " - continue - } - "ghdl" { - append toolsstring "make.ghdl " - continue - } - "lattice" { - append toolsstring "$TOP\.ldf " - continue - } - "mentor" { - append toolsstring "compile.vsim " - append toolsstring "$TOP\_precision.tcl " - append toolsstring "modelsim.ini " - append toolsstring "$TOP\_rtl_fpro.fl " - continue - - } - "microsemi" { - append toolsstring "$TOP\_libero.prj " - continue - } - "snps" { - append toolsstring "compile.simv " - append toolsstring "synopsys_sim.setup " - append toolsstring "compile.dc " - append toolsstring "compile.synp " - append toolsstring "make.simv " - continue - } - "xlnx" { - append toolsstring "vivado/$TOP\_vivado.tcl " - append toolsstring "planahead/$TOP\_planAhead.tcl " - append toolsstring "compile.xst " - append toolsstring "$TOP.npl " - append toolsstring "$TOP\_ise.tcl " - append toolsstring "$TOP.xise " - continue - } - "nanoxplore" { - append toolsstring "$TOP\_nanoxmap.py " - continue - } - - } -} -if {[string length $toolsstring] > 0 } { - set toolsstring [string range $toolsstring 0 end-1] -} - -puts $toolsstring diff --git a/grlib-original/bin/scriptgen/tcl_dict.tcl b/grlib-original/bin/scriptgen/tcl_dict.tcl deleted file mode 100644 index 2a98e5134..000000000 --- a/grlib-original/bin/scriptgen/tcl_dict.tcl +++ /dev/null @@ -1,643 +0,0 @@ -# dict.tcl -# http://wiki.tcl.tk/10609 -# -# Tcl 8.4-compatible implementation of the [dict] command. -# -# Known deficiencies: -# - In error messages, the variable name doesn't always appear correctly. This -# is due to use of [upvar] which renames the variable. -# - Tcl 8.4 offers no way for [return], [break], etc. inside the script to -# affect the caller. [uplevel] doesn't quite do everything that's needed. -# - Some usage error messages show different names for formal parameters. -# - Performance is reduced. -# -# Test failures (prefix each name with "dict-"): -# 3.12 4.5 5.7 9.7 9.8 11.15 12.7 12.8 12.10 -# 13.7 13.8 13.9 14.1 14.2 14.3 14.4 14.12 14.13 -# 14.22 15.9 15.10 15.11 16.8 16.9 16.17 16.18 17.13 -# 17.16 17.18 21.1 21.2 21.3 21.4 21.13 21.14 21.15 -# 22.1 22.2 22.3 22.10 22.14 22.15 23.1 23.2 24.1 -# 24.2 24.3 24.4 24.12 24.13 24.20.1 24.21 24.24 24.25 - -# Only create [dict] command if it doesn't already exist. -if {[catch {dict get {}}]} { - # Tcl 8.4-style implementation of namespace ensembles. - namespace eval ::dict {} - proc ::dict {subcommand args} { - # Confirm $subcommand is a [dict] command or unambiguous prefix thereof. - if {[regexp {[][*?\\]} $subcommand] - || [llength [set command [info commands ::dict::$subcommand*]]] != 1} { - set commands [string map {::dict:: {}}\ - [lsort [info commands ::dict::*]]] - if {[llength $commands] > 1} { - lset commands end "or [lindex $commands end]" - } - if {[llength $commands] > 2} { - set commands [join $commands ", "] - } else { - set commands [join $commands] - } - return -code error "unknown or ambiguous subcommand\ - \"$subcommand\": must be $commands" - } - - # Invoke the command. - if {[catch {uplevel 1 [concat [list $command] $args]} msg]} { - # Rewrite the command name on error. - regsub {^(wrong # args: should be \")::(dict)::} $msg {\1\2 } msg - return -code error $msg - } else { - return $msg - } - } - - # [dict append] - proc ::dict::append {varName key args} { - upvar 1 $varName var - - # Locate the matching key. On match, append to the key's value. - if {[::info exists var]} { - ::set var [get $var] - ::for {::set i 0} {$i < [llength $var]} {::incr i 2} { - if {[lindex $var $i] eq $key} { - ::incr i - return [lset var $i [lindex $var $i][join $args {}]] - } - } - } - - # On search failure, add the key to the dict. This code also will - # create the dict if it doesn't already exist. - ::lappend var $key [join $args {}] - } - - # [dict create] - proc ::dict::create {args} { - if {[llength $args] & 1} { - return -code error "wrong # args: should be\ - \"dict create ?key value ...?\"" - } - get $args - } - - # [dict exists] - proc ::dict::exists {dictionary key args} { - # Traverse through nested dicts searching for matches. - ::set sub $dictionary - foreach key [concat [list $key] $args] { - if {[llength $sub] & 1} { - return 0 - } - ::set match 0 - foreach {subkey sub} $sub { - if {$subkey eq $key} { - ::set match 1 - break - } - } - if {!$match} { - return 0 - } - } - return $match - } - - # [dict filter] - proc ::dict::filter {dictionary filterType args} { - # Invoke the correct filter handler. - ::set result {} - switch $filterType { - k - ke - key { - # Filter on keys. - foreach {key val} [get $dictionary] { - foreach pattern $args { - if {[string match $pattern $key]} { - ::lappend result $key $val - break - } - } - } - } v - va - val - valu - value { - # Filter on values. - foreach {key val} [get $dictionary] { - foreach pattern $args { - if {[string match $pattern $val]} { - ::lappend result $key $val - break - } - } - } - } s - sc - scr - scri - scrip - script { - # Filter on script returning true. - if {[llength $args] != 2} { - return -code error "wrong # args: should be\ - \"dict filter dictionary script\ - {keyVarName valueVarName} filterScript\"" - } elseif {[llength [lindex $args 0]] != 2} { - return -code error "must have exactly two variable names" - } - upvar 1 [lindex $args 0 0] key [lindex $args 0 1] val - foreach {key val} [get $dictionary] { - if {[uplevel 1 [lindex $args 1]]} { - ::lappend result $key $val - } - } - } default { - return -code error "bad filterType \"$filterType\":\ - must be key, script, or value" - }} - return $result - } - - # [dict for] - proc ::dict::for {keyVarValueVar dictionary script} { - if {[llength $keyVarValueVar] != 2} { - return -code error "must have exactly two variable names" - } - - # [foreach] does what's needed, mostly. Tcl 8.4 offers no way for - # [return], etc. inside the script to make the caller return. - uplevel 1 [list foreach $keyVarValueVar [get $dictionary] $script] - } - - # [dict get] - proc ::dict::get {dictionary args} { - if {[llength $args]} { - # When given multiple arguments, traverse nested dicts to find the - # requested key. Fail if the key is not found. - ::set sub $dictionary - foreach key $args { - if {[llength $sub] & 1} { - return -code error "missing value to go with key" - } - ::for {::set i [expr {[llength $sub] - 2}]} {1} {::incr i -2} { - if {$i < 0} { - return -code error "key \"$key\" not known\ - in dictionary" - } elseif {[lindex $sub $i] eq $key} { - break - } - } - ::set sub [lindex $sub [expr {$i + 1}]] - } - return $sub - } else { - # With only one argument, convert that argument to a canonical dict. - if {[llength $dictionary] & 1} { - return -code error "missing value to go with key" - } - ::for {::set i 0} {$i < [llength $dictionary]} {::incr i 2} { - if {[::info exists indexes([lindex $dictionary $i])]} { - lset dictionary $indexes([lindex $dictionary $i])\ - [lindex $dictionary [expr {$i + 1}]] - ::set dictionary [lreplace $dictionary $i [expr {$i + 1}]] - ::incr i -2 - } else { - ::set indexes([lindex $dictionary $i]) [expr {$i + 1}] - } - } - return $dictionary - } - } - - # [dict incr] - proc ::dict::incr {varName key {increment 1}} { - upvar 1 $varName var - - # Disallow non-integer increments. - if {![string is integer -strict $increment]} { - return -code error "expected integer but got \"$increment\"" - } - - # Locate the matching key and increment its value. - if {[::info exists var]} { - ::set var [get $var] - ::for {::set i 0} {$i < [llength $var]} {::incr i 2} { - if {$key eq [lindex $var $i]} { - ::incr i - - # Disallow non-integer values. - if {![string is integer -strict [lindex $var $i]]} { - return -code error "expected integer but\ - got \"[lindex $var $i]\"" - } - - # Increment the value in place. - return [lset var $i [expr {[lindex $var $i] + $increment}]] - } - } - } - - # On search failure, add the key to the dict. This code also will - # create the dict if it doesn't already exist. - ::lappend var $key $increment - } - - # [dict info] - proc ::dict::info {dictionary} { - # Make sure the dictionary is valid. - if {[llength $dictionary] & 1} { - return -code error "missing value to go with key" - } - - # No hash table. - return "dict is represented as plain list" - } - - # [dict keys] - proc ::dict::keys {dictionary {pattern *}} { - # Build and return a list of matching keys. - ::set result {} - foreach {key val} [get $dictionary] { - if {[string match $pattern $key]} { - ::lappend result $key - } - } - return $result - } - - # [dict lappend] - proc ::dict::lappend {varName key args} { - upvar 1 $varName var - - # Locate the matching key and append a list element to its value. - if {[::info exists var]} { - ::set var [get $var] - ::for {::set i 0} {$i < [llength $var]} {::incr i 2} { - if {$key eq [lindex $var $i]} { - ::incr i - - # Disallow non-list values. - llength [lindex $var $i] - - # Increment the value in place. - return [lset var $i [concat [lindex $var $i] $args]] - } - } - } - - # On search failure, add the key to the dict. This code also will - # create the dict if it doesn't already exist. - ::lappend var $key $args - } - - # [dict map] - proc ::dict::map {keyVarValueVar dictionary script} { - # Confirm argument syntax. - if {[llength $keyVarValueVar] != 2} { - return -code error "must have exactly two variable names" - } - - # Link to local variables which will be used as iterators. - upvar 1 [lindex $keyVarValueVar 0] key [lindex $keyVarValueVar 1] val - - # Accumulate and return the result. - ::set result {} - foreach {key val} [get $dictionary] { - ::lappend result $key [uplevel 1 $script] - } - return $result - } - - # [dict merge] - proc ::dict::merge {args} { - # Confirm each argument is a dict. - foreach dict $args { - if {[llength $dict] & 1} { - return -code error "missing value to go with key" - } - } - - # Merge the dicts, then normalize. - get [eval [list concat] $args] - } - - # [dict remove] - proc ::dict::remove {dictionary args} { - # Remove all dictionary keys matching any of the key arguments. - ::set dictionary [get $dictionary] - ::set args [lsort -unique $args] - ::for {::set i 0} {$i < [llength $dictionary]} {::incr i 2} { - ::set index [lsearch -exact -sorted $args [lindex $dictionary $i]] - if {$index >= 0} { - ::set dictionary [lreplace $dictionary $i [expr {$i + 1}]] - ::set args [lreplace $args $index $index] - if {![llength $args]} { - break - } - ::incr i -2 - } - } - return $dictionary - } - - # [dict replace] - proc ::dict::replace {dictionary args} { - # Confirm correct argument parity. - if {[llength $args] & 1} { - return -code error "wrong # args:\ - should be \"dict replace dictionary ?key value ...?\"" - } - - # Concatenate the dicts then use [get] to canonicalize the result. - get [eval [list concat $dictionary] $args] - } - - # [dict set] - proc ::dict::set {varName key args} { - upvar 1 $varName var - - # Confirm that a value argument was given. - if {![llength $args]} { - return -code error "wrong # args:\ - should be \"dict set varName key ?key ...? value\"" - } - - # Default the dictionary to empty. - if {![::info exists var]} { - ::set var {} - } - - # Shuffle the arguments into the right variables. - ::set keys [concat [list $key] [lrange $args 0 end-1]] - ::set val [lindex $args end] - - # Traverse through nested dicts to find the key to insert or replace. - ::set path {} - ::set sub $var - ::for {::set i 0} {$i < [llength $keys]} {::incr i} { - # Canonicalize each level of nested dicts. - lset var $path [::set sub [get $sub]] - - # Search the current level to see if any keys match. - ::for {::set j 0} {1} {::incr j 2} { - if {$j >= [llength $sub]} { - # On match failure, move the remaining keys into the value, - # transforming it into a nested dict, then set that value. - ::set j [expr {[llength $keys] - 1}] - ::for {} {$j > $i} {::incr j -1} { - ::set val [list [lindex $keys $j] $val] - } - lset var $path [concat $sub [list [lindex $keys $i] $val]] - return $var - } elseif {[lindex $sub $j] eq [lindex $keys $i]} { - # On match success, advance to the next level of nesting. - break - } - } - - # Descend into the value associated with the matching key. - ::incr j - ::lappend path $j - ::set sub [lindex $sub $j] - } - - # Replace the value of the matched key. - lset var $path $val - } - - # [dict size] - proc ::dict::size {dictionary} { - # Canonicalize the dict and return half its length. - expr {[llength [get $dictionary]] / 2} - } - - # [dict unset] - proc ::dict::unset {varName key args} { - upvar 1 $varName var - - # Handle the case of the dict not existing. - if {![::info exists var]} { - if {[llength $args]} { - # Fail when unsetting a nested key. - return -code error "key \"$key\" not known in dictionary" - } else { - # Create the dict when unsetting a non-nested key. - ::set var {} - return - } - } - - # Traverse through nested dicts to find the key to remove. - ::set keys [concat [list $key] $args] - ::set path {} - ::set sub $var - ::for {::set i 0} {1} {::incr i} { - # Canonicalize each level of nested dicts. - lset var $path [::set sub [get $sub]] - - # Search the current level to see if any keys match. - ::for {::set j 0} {$j < [llength $sub]} {::incr j 2} { - if {[lindex $sub $j] eq [lindex $keys $i]} { - break - } - } - - # Handle outer and innermost nesting levels differently. - if {$i < [llength $keys] - 1} { - # In parent levels, search failure is an error. - if {$j >= [llength $sub]} { - return -code error "key \"[lindex $keys $i]\"\ - not known in dictionary" - } - - # Descend into the value associated with the matching key. - ::incr j - ::lappend path $j - ::set sub [lindex $sub $j] - } else { - # In the innermost level, search failure is acceptable. On - # search success, remove the key, otherwise just ignore. - if {$j < [llength $sub]} { - lset var $path [lreplace $sub $j [expr {$j + 1}]] - } - - # Return the updated dictionary. - return $var - } - } - } - - # [dict update] - proc ::dict::update {varName key valVarName args} { - # Confirm argument parity. - if {!([llength $args] & 1)} { - return -code error "wrong # args: should be\ - \"dict update varName key valVarName\ - ?key valVarName ...? script\"" - } - ::set script [lindex $args end] - - # Convert the list of keys and variable names to an array. - array set names [concat [list $key $valVarName] [lrange $args 0 end-1]] - - # Initially unset caller variables. - ::set valVarNames {} - foreach {key valVarName} [array get names] { - lappend valVarNames $valVarName - } - uplevel 1 [list unset -nocomplain] $valVarNames - - # Copy the dict values into the caller's variables. - upvar 1 $varName dict - foreach {key val} [get $dict] { - if {[::info exists names($key)]} { - upvar 1 $names($key) valVar - ::set valVar $val - } - } - - # Invoke the caller-supplied script. - ::set result [uplevel 1 $script] - - # If the dict is gone, let it stay gone. Otherwise update it. - if {[::info exists dict]} { - # Update the dict values from the caller's variables, and remove - # keys corresponding to unset variables. - ::for {::set i 0} {$i < [llength $dict]} {::incr i 2} { - if {[::info exists names([lindex $dict $i])]} { - upvar 1 $names([lindex $dict $i]) valVar - ::unset names([lindex $dict $i]) - if {[::info exists valVar]} { - lset dict [expr {$i + 1}] $valVar - } else { - ::set dict [lreplace $dict $i [expr {$i + 1}]] - ::incr i -2 - } - } - } - - # Add keys back to the dict from the caller's variables, in case the - # caller removed some keys directly from the dict. - foreach {key valVarName} [array get names] { - upvar 1 $valVarName valVar - if {[::info exists valVar]} { - ::lappend dict $key $valVar - } - } - } - - # Return the result of the script. - return $result - } - - # [dict values] - proc ::dict::values {dictionary {pattern *}} { - # Build and return a list of matching values. - ::set result {} - foreach {key val} [get $dictionary] { - if {[string match $pattern $val]} { - ::lappend result $val - } - } - return $result - } - - # [dict with] - proc ::dict::with {varName args} { - upvar 1 $varName dict - - # Confirm a script argument was supplied. - if {![llength $args]} { - return -code error "wrong # args:\ - should be \"dict with varName ?key ...? script\"" - } - ::set script [lindex $args end] - ::set args [lrange $args 0 end-1] - - # Traverse through nested dicts to find the dict on which to operate. - ::set path {} - ::set sub [get $dict] - foreach key $args { - # Canonicalize each level of nested dicts. - lset dict $path $sub - - # Search the current level to see if any keys match. - ::for {::set i 0} {$i < [llength $sub]} {::incr i 2} { - if {[lindex $sub $i] eq $key} { - break - } - } - - # Terminate on match failure. - if {$i >= [llength $sub]} { - return -code error "key \"$key\" not known in dictionary" - } - - # Descend into the value associated with the matching key. - ::incr i - ::set sub [get [lindex $sub $i]] - ::lappend path $i - } - - # Copy the dict values into the caller's variables. Make an array to - # keep track of all the keys in the dict. - foreach {key val} $sub { - upvar 1 $key valVar - ::set valVar $val - ::set keys($key) {} - } - - # Invoke the caller-supplied script. - ::set result [uplevel 1 $script] - - # If the dict is gone, let it stay gone. Otherwise update it. - if {[::info exists dict]} { - # Traverse through nested dicts again in case the caller-supplied - # script reorganized the dict. - ::set path {} - ::set sub [get $dict] - foreach key $args { - # Canonicalize each level of nested dicts. - lset dict $path $sub - - # Search the current level to see if any keys match. - ::for {::set i 0} {$i < [llength $sub]} {::incr i 2} { - if {[lindex $sub $i] eq $key} { - break - } - } - - # Terminate on match failure. - if {$i >= [llength $sub]} { - return -code error "key \"$key\" not known in dictionary" - } - - # Descend into the value associated with the matching key. - ::incr i - ::set sub [get [lindex $sub $i]] - ::lappend path $i - } - - # Update the dict values from the caller's variables, and remove - # keys corresponding to unset variables. - ::for {::set i 0} {$i < [llength $sub]} {::incr i 2} { - if {[::info exists keys([lindex $sub $i])]} { - upvar 1 [lindex $sub $i] valVar - ::unset keys([lindex $sub $i]) - if {[::info exists valVar]} { - lset sub [expr {$i + 1}] $valVar - } else { - ::set sub [lreplace $sub $i [expr {$i + 1}]] - ::incr i -2 - } - } - } - - # Add keys back to the dict from the caller's variables, in case the - # caller removed some keys directly from the dict. - foreach key [array names keys] { - upvar 1 $key valVar - if {[::info exists valVar]} { - ::lappend sub $key $valVar - } - } - - # Save the updated nested dict back into the dict variable. - lset dict $path $sub - } - - # Return the result of the script. - return $result - } -} diff --git a/grlib-original/bin/synopsys_sim.setup b/grlib-original/bin/synopsys_sim.setup deleted file mode 100755 index eeea43b25..000000000 --- a/grlib-original/bin/synopsys_sim.setup +++ /dev/null @@ -1,3 +0,0 @@ -WORK > work -timebase = ps - diff --git a/grlib-original/bin/synplify.prj b/grlib-original/bin/synplify.prj deleted file mode 100644 index 042301b1f..000000000 --- a/grlib-original/bin/synplify.prj +++ /dev/null @@ -1,26 +0,0 @@ - -#implementation: "synplify" -impl -add synplify - -#device options -set_option -technology TECHNOLOGY -set_option -part PART -set_option -speed_grade SPEED - -#compilation/mapping options -set_option -use_fsm_explorer 0 -set_option -symbolic_fsm_compiler 0 -set_option -resource_sharing 0 - -set_option -write_vhdl 1 -#set_option -disable_io_insertion 0 - -#map options -set_option -frequency SYNFREQ - -set_option -top_module TOP - -#set result format/file last -project -result_file "synplify/TOP.edf" - -#implementation attributes diff --git a/grlib-original/bin/tkconfig/.config b/grlib-original/bin/tkconfig/.config deleted file mode 100644 index 7c26f41e1..000000000 --- a/grlib-original/bin/tkconfig/.config +++ /dev/null @@ -1,190 +0,0 @@ -# -# Automatically generated make config: don't edit -# -CONFIG_PERI_LCONF=y - -# -# Synthesis -# -# CONFIG_SYN_GENERIC is not set -# CONFIG_SYN_ATC35 is not set -# CONFIG_SYN_ATC25 is not set -# CONFIG_SYN_ATC18 is not set -# CONFIG_SYN_FS90 is not set -# CONFIG_SYN_UMC018 is not set -# CONFIG_SYN_TSMC025 is not set -# CONFIG_SYN_PROASIC is not set -# CONFIG_SYN_AXCEL is not set -# CONFIG_SYN_VIRTEX is not set -CONFIG_SYN_VIRTEX2=y -# CONFIG_SYN_INFER_RAM is not set -# CONFIG_SYN_INFER_REGF is not set -# CONFIG_SYN_INFER_ROM is not set -# CONFIG_SYN_INFER_PCI_PADS is not set -CONFIG_SYN_INFER_MULT=y -CONFIG_SYN_RFTYPE=y -CONFIG_SYN_TRACE_DPRAM=y - -# -# Clock generation -# -# CONFIG_CLK_VIRTEX is not set -CONFIG_CLK_VIRTEX2=y -# CONFIG_DCM_2_3 is not set -# CONFIG_DCM_3_4 is not set -# CONFIG_DCM_4_5 is not set -CONFIG_DCM_1_1=y -# CONFIG_DCM_5_4 is not set -# CONFIG_DCM_4_3 is not set -# CONFIG_DCM_3_2 is not set -# CONFIG_DCM_5_3 is not set -# CONFIG_DCM_2_1 is not set -# CONFIG_DCM_3_1 is not set -# CONFIG_DCM_4_1 is not set -# CONFIG_PCI_DLL is not set -# CONFIG_PCI_SYSCLK is not set - -# -# Processor -# - -# -# Integer unit -# -CONFIG_IU_NWINDOWS=8 -CONFIG_IU_V8MULDIV=y -# CONFIG_IU_MUL_LATENCY_1 is not set -# CONFIG_IU_MUL_LATENCY_2 is not set -CONFIG_IU_MUL_LATENCY_4=y -# CONFIG_IU_MUL_LATENCY_5 is not set -# CONFIG_IU_MUL_LATENCY_35 is not set -# CONFIG_IU_MUL_MAC is not set -CONFIG_IU_LDELAY=1 -CONFIG_IU_FASTJUMP=y -CONFIG_IU_ICCHOLD=y -CONFIG_IU_FASTDECODE=y -CONFIG_IU_WATCHPOINTS=2 - -# -# Floating-point unit -# -# CONFIG_FPU_ENABLE is not set - -# -# Co-processor -# -# CONFIG_CP_ENABLE is not set - -# -# Cache system -# - -# -# Instruction cache -# -CONFIG_ICACHE_ASSO1=y -# CONFIG_ICACHE_ASSO2 is not set -# CONFIG_ICACHE_ASSO3 is not set -# CONFIG_ICACHE_ASSO4 is not set -# CONFIG_ICACHE_SZ1 is not set -# CONFIG_ICACHE_SZ2 is not set -CONFIG_ICACHE_SZ4=y -# CONFIG_ICACHE_SZ8 is not set -# CONFIG_ICACHE_SZ16 is not set -# CONFIG_ICACHE_SZ32 is not set -# CONFIG_ICACHE_SZ64 is not set -# CONFIG_ICACHE_LZ16 is not set -CONFIG_ICACHE_LZ32=y - -# -# Data cache -# -CONFIG_DCACHE_ASSO1=y -# CONFIG_DCACHE_ASSO2 is not set -# CONFIG_DCACHE_ASSO3 is not set -# CONFIG_DCACHE_ASSO4 is not set -# CONFIG_DCACHE_SZ1 is not set -# CONFIG_DCACHE_SZ2 is not set -CONFIG_DCACHE_SZ4=y -# CONFIG_DCACHE_SZ8 is not set -# CONFIG_DCACHE_SZ16 is not set -# CONFIG_DCACHE_SZ32 is not set -# CONFIG_DCACHE_SZ64 is not set -# CONFIG_DCACHE_LZ16 is not set -CONFIG_DCACHE_LZ32=y -CONFIG_DCACHE_SNOOP=y -CONFIG_DCACHE_SNOOP_SLOW=y -# CONFIG_DCACHE_SNOOP_FAST is not set -# CONFIG_DCACHE_LRAM is not set - -# -# MMU -# -# CONFIG_MMU_ENABLE is not set - -# -# Debug support unit -# -CONFIG_DSU_ENABLE=y -CONFIG_DSU_TRACEBUF=y -CONFIG_DSU_MIXED_TRACE=y -# CONFIG_DSU_TRACESZ64 is not set -# CONFIG_DSU_TRACESZ128 is not set -CONFIG_DSU_TRACESZ256=y -# CONFIG_DSU_TRACESZ512 is not set -# CONFIG_DSU_TRACESZ1024 is not set - -# -# AMBA configuration -# -CONFIG_AHB_DEFMST=0 -# CONFIG_AHB_SPLIT is not set - -# -# Memory controller -# -# CONFIG_MCTRL_8BIT is not set -# CONFIG_MCTRL_16BIT is not set -# CONFIG_PERI_WPROT is not set -# CONFIG_MCTRL_WFB is not set -# CONFIG_MCTRL_5CS is not set -CONFIG_MCTRL_SDRAM=y -# CONFIG_MCTRL_SDRAM_INVCLK is not set -CONFIG_MCTRL_SDRAM_SEPBUS=y - -# -# Peripherals -# -CONFIG_PERI_LCONF=y -# CONFIG_PERI_IRQ2 is not set -# CONFIG_PERI_WDOG is not set -CONFIG_PERI_AHBSTAT=y -# CONFIG_AHBRAM_ENABLE is not set - -# -# Ethernet interface -# -CONFIG_ETH_ENABLE=y -CONFIG_ETH_TXFIFO=8 -CONFIG_ETH_RXFIFO=8 -CONFIG_ETH_BURST=4 - -# -# PCI interface -# -# CONFIG_PCI_ENABLE is not set - -# -# Boot options -# -CONFIG_BOOT_EXTPROM=y -# CONFIG_BOOT_INTPROM is not set -# CONFIG_BOOT_MIXPROM is not set - -# -# VHDL Debugging -# -# CONFIG_DEBUG_UART is not set -# CONFIG_DEBUG_IURF is not set -# CONFIG_DEBUG_NOHALT is not set -# CONFIG_DEBUG_PC32 is not set diff --git a/grlib-original/bin/tkconfig/.config.old b/grlib-original/bin/tkconfig/.config.old deleted file mode 100644 index 9e7d20fbd..000000000 --- a/grlib-original/bin/tkconfig/.config.old +++ /dev/null @@ -1,157 +0,0 @@ -# -# Automatically generated make config: don't edit -# -CONFIG_PERI_LCONF=y - -# -# Synthesis -# -CONFIG_SYN_GENERIC=y -# CONFIG_SYN_ATC35 is not set -# CONFIG_SYN_ATC25 is not set -# CONFIG_SYN_ATC18 is not set -# CONFIG_SYN_FS90 is not set -# CONFIG_SYN_UMC018 is not set -# CONFIG_SYN_TSMC025 is not set -# CONFIG_SYN_PROASIC is not set -# CONFIG_SYN_AXCEL is not set -# CONFIG_SYN_VIRTEX is not set -# CONFIG_SYN_VIRTEX2 is not set -CONFIG_SYN_INFER_MULT=y -CONFIG_SYN_RFTYPE=y - -# -# Clock generation -# -# CONFIG_PCI_SYSCLK is not set - -# -# Processor -# - -# -# Integer unit -# -CONFIG_IU_NWINDOWS=8 -CONFIG_IU_V8MULDIV=y -# CONFIG_IU_MUL_LATENCY_1 is not set -# CONFIG_IU_MUL_LATENCY_2 is not set -CONFIG_IU_MUL_LATENCY_4=y -# CONFIG_IU_MUL_LATENCY_5 is not set -# CONFIG_IU_MUL_LATENCY_35 is not set -CONFIG_IU_MUL_MAC=y -CONFIG_IU_LDELAY=1 -CONFIG_IU_FASTJUMP=y -CONFIG_IU_ICCHOLD=y -CONFIG_IU_FASTDECODE=y -CONFIG_IU_WATCHPOINTS=0 - -# -# Floating-point unit -# -# CONFIG_FPU_ENABLE is not set - -# -# Co-processor -# -# CONFIG_CP_ENABLE is not set - -# -# Cache system -# - -# -# Instruction cache -# -CONFIG_ICACHE_ASSO1=y -# CONFIG_ICACHE_ASSO2 is not set -# CONFIG_ICACHE_ASSO3 is not set -# CONFIG_ICACHE_ASSO4 is not set -# CONFIG_ICACHE_SZ1 is not set -# CONFIG_ICACHE_SZ2 is not set -CONFIG_ICACHE_SZ4=y -# CONFIG_ICACHE_SZ8 is not set -# CONFIG_ICACHE_SZ16 is not set -# CONFIG_ICACHE_SZ32 is not set -# CONFIG_ICACHE_SZ64 is not set -# CONFIG_ICACHE_LZ16 is not set -CONFIG_ICACHE_LZ32=y - -# -# Data cache -# -CONFIG_DCACHE_ASSO1=y -# CONFIG_DCACHE_ASSO2 is not set -# CONFIG_DCACHE_ASSO3 is not set -# CONFIG_DCACHE_ASSO4 is not set -# CONFIG_DCACHE_SZ1 is not set -# CONFIG_DCACHE_SZ2 is not set -CONFIG_DCACHE_SZ4=y -# CONFIG_DCACHE_SZ8 is not set -# CONFIG_DCACHE_SZ16 is not set -# CONFIG_DCACHE_SZ32 is not set -# CONFIG_DCACHE_SZ64 is not set -# CONFIG_DCACHE_LZ16 is not set -CONFIG_DCACHE_LZ32=y -# CONFIG_DCACHE_LRAM is not set - -# -# MMU -# -# CONFIG_MMU_ENABLE is not set - -# -# Debug support unit -# -CONFIG_DSU_ENABLE=y -# CONFIG_DSU_TRACEBUF is not set - -# -# AMBA configuration -# -CONFIG_AHB_DEFMST=0 -# CONFIG_AHB_SPLIT is not set - -# -# Memory controller -# -# CONFIG_MCTRL_8BIT is not set -# CONFIG_MCTRL_16BIT is not set -# CONFIG_PERI_WPROT is not set -# CONFIG_MCTRL_WFB is not set -# CONFIG_MCTRL_5CS is not set -# CONFIG_MCTRL_SDRAM is not set - -# -# Peripherals -# -CONFIG_PERI_LCONF=y -# CONFIG_PERI_IRQ2 is not set -# CONFIG_PERI_WDOG is not set -# CONFIG_PERI_AHBSTAT is not set -# CONFIG_AHBRAM_ENABLE is not set - -# -# Ethernet interface -# -# CONFIG_ETH_ENABLE is not set - -# -# PCI interface -# -# CONFIG_PCI_ENABLE is not set - -# -# Boot options -# -CONFIG_BOOT_EXTPROM=y -# CONFIG_BOOT_INTPROM is not set -# CONFIG_BOOT_MIXPROM is not set - -# -# VHDL Debugging -# -# CONFIG_DEBUG_UART is not set -# CONFIG_DEBUG_IURF is not set -# CONFIG_DEBUG_NOHALT is not set -# CONFIG_DEBUG_PC32 is not set diff --git a/grlib-original/bin/tkconfig/.null b/grlib-original/bin/tkconfig/.null deleted file mode 100644 index 005de6c64..000000000 --- a/grlib-original/bin/tkconfig/.null +++ /dev/null @@ -1,157 +0,0 @@ -/* - * Automatically generated C config: don't edit - */ -#define AUTOCONF_INCLUDED -#define CONFIG_PERI_LCONF 1 -/* - * Synthesis - */ -#undef CONFIG_SYN_GENERIC -#undef CONFIG_SYN_ATC35 -#undef CONFIG_SYN_ATC25 -#undef CONFIG_SYN_ATC18 -#undef CONFIG_SYN_FS90 -#undef CONFIG_SYN_UMC018 -#undef CONFIG_SYN_TSMC025 -#undef CONFIG_SYN_PROASIC -#undef CONFIG_SYN_AXCEL -#define CONFIG_SYN_VIRTEX 1 -#undef CONFIG_SYN_VIRTEX2 -#undef CONFIG_SYN_INFER_RAM -#undef CONFIG_SYN_INFER_REGF -#undef CONFIG_SYN_INFER_ROM -#define CONFIG_SYN_INFER_MULT 1 -#define CONFIG_SYN_RFTYPE 1 -#define CONFIG_SYN_TRACE_DPRAM 1 -/* - * Clock generation - */ -#define CONFIG_CLK_VIRTEX 1 -#undef CONFIG_CLKDLL_1_2 -#define CONFIG_CLKDLL_1_1 1 -#undef CONFIG_CLKDLL_2_1 -#undef CONFIG_PCI_DLL -/* - * Processor - */ -/* - * Integer unit - */ -#define CONFIG_IU_NWINDOWS (8) -#undef CONFIG_IU_V8MULDIV -#define CONFIG_IU_LDELAY (1) -#define CONFIG_IU_FASTJUMP 1 -#define CONFIG_IU_ICCHOLD 1 -#define CONFIG_IU_FASTDECODE 1 -#define CONFIG_IU_WATCHPOINTS (2) -#define CONFIG_IU_IMPL 0x0 -#define CONFIG_IU_VER 0x0 -/* - * Floating-point unit - */ -#undef CONFIG_FPU_ENABLE -/* - * Co-processor - */ -#undef CONFIG_CP_ENABLE -/* - * Cache system - */ -/* - * Instruction cache - */ -#undef CONFIG_ICACHE_ASSO1 -#define CONFIG_ICACHE_ASSO2 1 -#undef CONFIG_ICACHE_ASSO3 -#undef CONFIG_ICACHE_ASSO4 -#undef CONFIG_ICACHE_SZ1 -#define CONFIG_ICACHE_SZ2 1 -#undef CONFIG_ICACHE_SZ4 -#undef CONFIG_ICACHE_SZ8 -#undef CONFIG_ICACHE_SZ16 -#undef CONFIG_ICACHE_SZ32 -#undef CONFIG_ICACHE_SZ64 -#undef CONFIG_ICACHE_LZ16 -#define CONFIG_ICACHE_LZ32 1 -#undef CONFIG_ICACHE_ALGORND -#define CONFIG_ICACHE_ALGOLRR 1 -#undef CONFIG_ICACHE_ALGOLRU -#undef CONFIG_ICACHE_LOCK -/* - * Data cache - */ -#undef CONFIG_DCACHE_ASSO1 -#define CONFIG_DCACHE_ASSO2 1 -#undef CONFIG_DCACHE_ASSO3 -#undef CONFIG_DCACHE_ASSO4 -#undef CONFIG_DCACHE_SZ1 -#define CONFIG_DCACHE_SZ2 1 -#undef CONFIG_DCACHE_SZ4 -#undef CONFIG_DCACHE_SZ8 -#undef CONFIG_DCACHE_SZ16 -#undef CONFIG_DCACHE_SZ32 -#undef CONFIG_DCACHE_SZ64 -#undef CONFIG_DCACHE_LZ16 -#define CONFIG_DCACHE_LZ32 1 -#undef CONFIG_DCACHE_ALGORND -#define CONFIG_DCACHE_ALGOLRR 1 -#undef CONFIG_DCACHE_ALGOLRU -#undef CONFIG_DCACHE_LOCK -#undef CONFIG_DCACHE_SNOOP -#undef CONFIG_DCACHE_RFAST -#undef CONFIG_DCACHE_WFAST -#undef CONFIG_DCACHE_LRAM -/* - * Debug support unit - */ -#define CONFIG_DSU_ENABLE 1 -#define CONFIG_DSU_TRACEBUF 1 -#undef CONFIG_DSU_MIXED_TRACE -#undef CONFIG_DSU_TRACESZ64 -#define CONFIG_DSU_TRACESZ128 1 -#undef CONFIG_DSU_TRACESZ256 -#undef CONFIG_DSU_TRACESZ512 -#undef CONFIG_DSU_TRACESZ1024 -/* - * AMBA configuration - */ -#define CONFIG_AHB_DEFMST (0) -#undef CONFIG_AHB_SPLIT -/* - * Memory controller - */ -#undef CONFIG_MCTRL_8BIT -#undef CONFIG_MCTRL_16BIT -#undef CONFIG_PERI_WPROT -#undef CONFIG_MCTRL_WFB -#undef CONFIG_MCTRL_5CS -#undef CONFIG_MCTRL_SDRAM -/* - * Peripherals - */ -#define CONFIG_PERI_LCONF 1 -#undef CONFIG_PERI_IRQ2 -#undef CONFIG_PERI_WDOG -#undef CONFIG_PERI_AHBSTAT -#undef CONFIG_AHBRAM_ENABLE -/* - * Ethernet interface - */ -#undef CONFIG_ETH_ENABLE -/* - * PCI interface - */ -#undef CONFIG_PCI_ENABLE -/* - * Boot options - */ -#define CONFIG_BOOT_EXTPROM 1 -#undef CONFIG_BOOT_INTPROM -#undef CONFIG_BOOT_MIXPROM -/* - * VHDL Debugging - */ -#undef CONFIG_DEBUG_UART -#undef CONFIG_DEBUG_IURF -#undef CONFIG_DEBUG_NOHALT -#undef CONFIG_DEBUG_PC32 diff --git a/grlib-original/bin/tkconfig/Makefile b/grlib-original/bin/tkconfig/Makefile deleted file mode 100644 index dcc2bbd8a..000000000 --- a/grlib-original/bin/tkconfig/Makefile +++ /dev/null @@ -1,35 +0,0 @@ - -CC=gcc -CFLAGS=-g - -all: lconfig.tk - -xconfig: lconfig.tk - wish -f lconfig.tk; echo xconfig exited with code $$?; - -wconfig: lconfig.tk - cygwish80 -f lconfig.tk - -dep: mkdevice lconfig.tk - ./mkdevice < .config - -cp device.vhd device.v ../leon/ - -tkparse: tkparse.o tkcond.o tkgen.o - $(CC) tkparse.o tkcond.o tkgen.o -o tkparse - -mkdevice: mkdevice.o - $(CC) mkdevice.o -o mkdevice - -lconfig.tk: leon.tk header.tk tail.tk - cat header.tk leon.tk tail.tk > lconfig.tk - chmod a+x lconfig.tk - -leon.tk : config.in tkparse - ./tkparse < config.in > leon.tk - -clean: - -rm lconfig.tk leon.tk test.tk *.o tkparse mkdevice *.exe device.vhd device.v - -dist-clean: clean - -rm .config .config.old - cp defconfig .config diff --git a/grlib-original/bin/tkconfig/config-language.txt b/grlib-original/bin/tkconfig/config-language.txt deleted file mode 100644 index a56660f9e..000000000 --- a/grlib-original/bin/tkconfig/config-language.txt +++ /dev/null @@ -1,710 +0,0 @@ -Config Language Specification -18 October 1999 -Michael Elizabeth Chastain, - - - -=== Introduction - -Config Language is not 'bash'. - -This document describes Config Language, the Linux Kernel Configuration -Language. config.in and Config.in files are written in this language. - -Although it looks, and usually acts, like a subset of the 'sh' language, -Config Language has a restricted syntax and different semantics. - -Here is a basic guideline for Config Language programming: use only the -programming idioms that you see in existing Config.in files. People often -draw on their shell programming experience to invent idioms that look -reasonable to shell programmers, but silently fail in Config Language. - -Config Language is not 'bash'. - - - -=== Interpreters - -Four different configuration programs read Config Language: - - scripts/Configure make config, make oldconfig - scripts/Menuconfig make menuconfig - scripts/tkparse make xconfig - mconfig ftp.kernel.org/pub/linux/kernel/people/hch/mconfig/ - -'Configure' is a bash script which interprets Config.in files by sourcing -them. Some of the Config Language commands are native bash commands; -simple bash functions implement the rest of the commands. - -'Menuconfig' is another bash script. It scans the input files with a -small awk script, builds a shell function for each menu, sources the -shell functions that it builds, and then executes the shell functions -in a user-driven order. Menuconfig uses 'lxdialog', a back-end utility -program, to perform actual screen output. 'lxdialog' is a C program -which uses curses. - -'scripts/tkparse' is a C program with an ad hoc parser which translates -a Config Language script to a huge TCL/TK program. 'make xconfig' -then hands this TCL/TK program to 'wish', which executes it. - -'mconfig' is the next generation of Config Language interpreters. It is a -C program with a bison parser which translates a Config Language script -into an internal syntax tree and then hands the syntax tree to one of -several user-interface front ends. - - - -=== Statements - -A Config Language script is a list of statements. There are 21 simple -statements; an 'if' statement; menu blocks; and a 'source' statement. - -A '\' at the end of a line marks a line continuation. - -'#' usually introduces a comment, which continues to the end of the line. -Lines of the form '# ... is not set', however, are not comments. They -are semantically meaningful, and all four config interpreters implement -this meaning. - -Newlines are significant. You may not substitute semicolons for newlines. -The 'if' statement does accept a semicolon in one position; you may use -a newline in that position instead. - -Here are the basic grammar elements. - - A /prompt/ is a single-quoted string or a double-quoted string. - If the word is double-quoted, it may not have any $ substitutions. - - A /word/ is a single unquoted word, a single-quoted string, or a - double-quoted string. If the word is unquoted or double quoted, - then $-substitution will be performed on the word. - - A /symbol/ is a single unquoted word. A symbol must have a name of - the form CONFIG_*. scripts/mkdep.c relies on this convention in order - to generate dependencies on individual CONFIG_* symbols instead of - making one massive dependency on include/linux/autoconf.h. - - A /dep/ is a dependency. Syntactically, it is a /word/. At run - time, a /dep/ must evaluate to "y", "m", "n", or "". - - An /expr/ is a bash-like expression using the operators - '=', '!=', '-a', '-o', and '!'. - -Here are all the statements: - - Text statements: - - mainmenu_name /prompt/ - comment /prompt/ - text /prompt/ - - Ask statements: - - bool /prompt/ /symbol/ - hex /prompt/ /symbol/ /word/ - int /prompt/ /symbol/ /word/ - string /prompt/ /symbol/ /word/ - tristate /prompt/ /symbol/ - - Define statements: - - define_bool /symbol/ /word/ - define_hex /symbol/ /word/ - define_int /symbol/ /word/ - define_string /symbol/ /word/ - define_tristate /symbol/ /word/ - - Dependent statements: - - dep_bool /prompt/ /symbol/ /dep/ ... - dep_mbool /prompt/ /symbol/ /dep/ ... - dep_hex /prompt/ /symbol/ /word/ /dep/ ... - dep_int /prompt/ /symbol/ /word/ /dep/ ... - dep_string /prompt/ /symbol/ /word/ /dep/ ... - dep_tristate /prompt/ /symbol/ /dep/ ... - - Unset statement: - - unset /symbol/ ... - - Choice statements: - - choice /prompt/ /word/ /word/ - nchoice /prompt/ /symbol/ /prompt/ /symbol/ ... - - If statements: - - if [ /expr/ ] ; then - /statement/ - ... - fi - - if [ /expr/ ] ; then - /statement/ - ... - else - /statement/ - ... - fi - - Menu block: - - mainmenu_option next_comment - comment /prompt/ - /statement/ - ... - endmenu - - Source statement: - - source /word/ - - - -=== mainmenu_name /prompt/ - -This verb is a lot less important than it looks. It specifies the top-level -name of this Config Language file. - -Configure: ignores this line -Menuconfig: ignores this line -Xconfig: uses /prompt/ for the label window. -mconfig: ignores this line (mconfig does a better job without it). - -Example: - - # arch/sparc/config.in - mainmenu_name "Linux/SPARC Kernel Configuration" - - - -=== comment /prompt/ - -This verb displays its prompt to the user during the configuration process -and also echoes it to the output files during output. Note that the -prompt, like all prompts, is a quoted string with no dollar substitution. - -The 'comment' verb is not a Config Language comment. It causes the -user interface to display text, and it causes output to appear in the -output files. - -Configure: implemented -Menuconfig: implemented -Xconfig: implemented -mconfig: implemented - -Example: - - # drivers/net/Config.in - comment 'CCP compressors for PPP are only built as modules.' - - - -=== text /prompt/ - -This verb displays the prompt to the user with no adornment whatsoever. -It does not echo the prompt to the output file. mconfig uses this verb -internally for its help facility. - -Configure: not implemented -Menuconfig: not implemented -Xconfig: not implemented -mconfig: implemented - -Example: - - # mconfig internal help text - text 'Here are all the mconfig command line options.' - - - -=== bool /prompt/ /symbol/ - -This verb displays /prompt/ to the user, accepts a value from the user, -and assigns that value to /symbol/. The legal input values are "n" and -"y". - -Note that the bool verb does not have a default value. People keep -trying to write Config Language scripts with a default value for bool, -but *all* of the existing language interpreters discard additional values. -Feel free to submit a multi-interpreter patch to linux-kbuild if you -want to implement this as an enhancement. - -Configure: implemented -Menuconfig: implemented -Xconfig: implemented -mconfig: implemented - -Example: - - # arch/i386/config.in - bool 'Symmetric multi-processing support' CONFIG_SMP - - - -=== hex /prompt/ /symbol/ /word/ - -This verb displays /prompt/ to the user, accepts a value from the user, -and assigns that value to /symbol/. Any hexadecimal number is a legal -input value. /word/ is the default value. - -The hex verb does not accept range parameters. - -Configure: implemented -Menuconfig: implemented -Xconfig: implemented -mconfig: implemented - -Example: - - # drivers/sound/Config.in - hex 'I/O base for SB Check from manual of the card' CONFIG_SB_BASE 220 - - - -=== int /prompt/ /symbol/ /word/ - -This verb displays /prompt/ to the user, accepts a value from the user, -and assigns that value to /symbol/. /word/ is the default value. -Any decimal number is a legal input value. - -The int verb does not accept range parameters. - -Configure: implemented -Menuconfig: implemented -Xconfig: implemented -mconfig: implemented - -Example: - - # drivers/char/Config.in - int 'Maximum number of Unix98 PTYs in use (0-2048)' \ - CONFIG_UNIX98_PTY_COUNT 256 - - - -=== string /prompt/ /symbol/ /word/ - -This verb displays /prompt/ to the user, accepts a value from the user, -and assigns that value to /symbol/. /word/ is the default value. Legal -input values are any ASCII string, except for the characters '"' and '\\'. -Configure will trap an input string of "?" to display help. - -The default value is mandatory. - -Configure: implemented -Menuconfig: implemented -Xconfig: implemented -mconfig: implemented - -Example: - - # drivers/sound/Config.in - string ' Full pathname of DSPxxx.LD firmware file' \ - CONFIG_PSS_BOOT_FILE /etc/sound/dsp001.ld - - - -=== tristate /prompt/ /symbol/ - -This verb displays /prompt/ to the user, accepts a value from the user, -and assigns that value to /symbol/. Legal values are "n", "m", or "y". - -The value "m" stands for "module"; it indicates that /symbol/ should -be built as a kernel module. The value "m" is legal only if the symbol -CONFIG_MODULES currently has the value "y". - -The tristate verb does not have a default value. - -Configure: implemented -Menuconfig: implemented -Xconfig: implemented -mconfig: implemented - -Example: - - # fs/Config.in - tristate 'NFS filesystem support' CONFIG_NFS_FS - - - -=== define_bool /symbol/ /word/ - -This verb the value of /word/ to /symbol/. Legal values are "n" or "y". - -For compatibility reasons, the value of "m" is also legal, because it -will be a while before define_tristate is implemented everywhere. - -Configure: implemented -Menuconfig: implemented -Xconfig: implemented -mconfig: implemented - -Example: - - # arch/alpha/config.in - if [ "$CONFIG_ALPHA_GENERIC" = "y" ] - then - define_bool CONFIG_PCI y - define_bool CONFIG_ALPHA_NEED_ROUNDING_EMULATION y - fi - - - -=== define_hex /symbol/ /word/ - -This verb assigns the value of /word/ to /symbol/. Any hexadecimal -number is a legal value. - -Configure: implemented -Menuconfig: implemented -Xconfig: implemented -mconfig: implemented - -Example: - - # Not from the corpus - bool 'Specify custom serial port' CONFIG_SERIAL_PORT_CUSTOM - if [ "$CONFIG_SERIAL_PORT_CUSTOM" = "y" ]; then - hex 'Serial port number' CONFIG_SERIAL_PORT - else - define_hex CONFIG_SERIAL_PORT 0x3F8 - fi - - - -=== define_int /symbol/ /word/ - -This verb assigns /symbol/ the value /word/. Any decimal number is a -legal value. - -Configure: implemented -Menuconfig: implemented -Xconfig: implemented -mconfig: implemented - -Example: - - # drivers/char/ftape/Config.in - define_int CONFIG_FT_ALPHA_CLOCK 0 - - - -=== define_string /symbol/ /word/ - -This verb assigns the value of /word/ to /symbol/. Legal input values -are any ASCII string, except for the characters '"' and '\\'. - -Configure: implemented -Menuconfig: implemented -Xconfig: implemented -mconfig: implemented - -Example - - # Not from the corpus - define_string CONFIG_VERSION "2.2.0" - - - -=== define_tristate /symbol/ /word/ - -This verb assigns the value of /word/ to /symbol/. Legal input values -are "n", "m", and "y". - -As soon as this verb is implemented in all interpreters, please use it -instead of define_bool to define tristate values. This aids in static -type checking. - -Configure: implemented -Menuconfig: implemented -Xconfig: implemented -mconfig: implemented - -Example: - - # drivers/video/Config.in - if [ "$CONFIG_FB_AMIGA" = "y" ]; then - define_tristate CONFIG_FBCON_AFB y - define_tristate CONFIG_FBCON_ILBM y - else - if [ "$CONFIG_FB_AMIGA" = "m" ]; then - define_tristate CONFIG_FBCON_AFB m - define_tristate CONFIG_FBCON_ILBM m - fi - fi - - - -=== dep_bool /prompt/ /symbol/ /dep/ ... - -This verb evaluates all of the dependencies in the dependency list. -Any dependency which has a value of "y" does not restrict the input -range. Any dependency which has an empty value is ignored. -Any dependency which has a value of "n", or which has some other value, -(like "m") restricts the input range to "n". Quoting dependencies is not -allowed. Using dependencies with an empty value possible is not -recommended. See also dep_mbool below. - -If the input range is restricted to the single choice "n", dep_bool -silently assigns "n" to /symbol/. If the input range has more than -one choice, dep_bool displays /prompt/ to the user, accepts a value -from the user, and assigns that value to /symbol/. - -Configure: implemented -Menuconfig: implemented -XConfig: implemented -mconfig: implemented - -Example: - - # drivers/net/Config.in - dep_bool 'Aironet 4500/4800 PCI support 'CONFIG_AIRONET4500_PCI $CONFIG_PCI - -Known bugs: -- Xconfig does not write "# foo is not set" to .config (as well as - "#undef foo" to autoconf.h) if command is disabled by its dependencies. - - -=== dep_mbool /prompt/ /symbol/ /dep/ ... - -This verb evaluates all of the dependencies in the dependency list. -Any dependency which has a value of "y" or "m" does not restrict the -input range. Any dependency which has an empty value is ignored. -Any dependency which has a value of "n", or which has some other value, -restricts the input range to "n". Quoting dependencies is not allowed. -Using dependencies with an empty value possible is not recommended. - -If the input range is restricted to the single choice "n", dep_bool -silently assigns "n" to /symbol/. If the input range has more than -one choice, dep_bool displays /prompt/ to the user, accepts a value -from the user, and assigns that value to /symbol/. - -Notice that the only difference between dep_bool and dep_mbool -is in the way of treating the "m" value as a dependency. - -Configure: implemented -Menuconfig: implemented -XConfig: implemented -mconfig: implemented - -Example: - - # Not from the corpus - dep_mbool 'Packet socket: mmapped IO' CONFIG_PACKET_MMAP $CONFIG_PACKET - -Known bugs: -- Xconfig does not write "# foo is not set" to .config (as well as - "#undef foo" to autoconf.h) if command is disabled by its dependencies. - - -=== dep_hex /prompt/ /symbol/ /word/ /dep/ ... -=== dep_int /prompt/ /symbol/ /word/ /dep/ ... -=== dep_string /prompt/ /symbol/ /word/ /dep/ ... - -I am still thinking about the semantics of these verbs. - -Configure: not implemented -Menuconfig: not implemented -XConfig: not implemented -mconfig: not implemented - - - -=== dep_tristate /prompt/ /symbol/ /dep/ ... - -This verb evaluates all of the dependencies in the dependency list. -Any dependency which has a value of "y" does not restrict the input range. -Any dependency which has a value of "m" restricts the input range to -"m" or "n". Any dependency which has an empty value is ignored. -Any dependency which has a value of "n", or which has some other value, -restricts the input range to "n". Quoting dependencies is not allowed. -Using dependencies with an empty value possible is not recommended. - -If the input range is restricted to the single choice "n", dep_tristate -silently assigns "n" to /symbol/. If the input range has more than -one choice, dep_tristate displays /prompt/ to the user, accepts a value -from the user, and assigns that value to /symbol/. - -Configure: implemented -Menuconfig: implemented -Xconfig: implemented -mconfig: implemented - -Example: - - # drivers/char/Config.in - dep_tristate 'Parallel printer support' CONFIG_PRINTER $CONFIG_PARPORT - -Known bugs: -- Xconfig does not write "# foo is not set" to .config (as well as - "#undef foo" to autoconf.h) if command is disabled by its dependencies. - - -=== unset /symbol/ ... - -This verb assigns the value "" to /symbol/, but does not cause /symbol/ -to appear in the output. The existence of this verb is a hack; it covers -up deeper problems with variable semantics in a random-execution language. - -Configure: implemented -Menuconfig: implemented -Xconfig: implemented (with bugs) -mconfig: implemented - -Example: - - # arch/mips/config.in - unset CONFIG_PCI - unset CONFIG_MIPS_JAZZ - unset CONFIG_VIDEO_G364 - - - -=== choice /prompt/ /word/ /word/ - -This verb implements a choice list or "radio button list" selection. -It displays /prompt/ to the user, as well as a group of sub-prompts -which have corresponding symbols. - -When the user selects a value, the choice verb sets the corresponding -symbol to "y" and sets all the other symbols in the choice list to "n". - -The second argument is a single-quoted or double-quoted word that -describes a series of sub-prompts and symbol names. The interpreter -breaks up the word at white space boundaries into a list of sub-words. -The first sub-word is the first prompt; the second sub-word is the -first symbol. The third sub-word is the second prompt; the fourth -sub-word is the second symbol. And so on, for all the sub-words. - -The third word is a literal word. Its value must be a unique abbreviation -for exactly one of the prompts. The symbol corresponding to this prompt -is the default enabled symbol. - -Note that because of the syntax of the choice verb, the sub-prompts -may not have spaces in them. - -Configure: implemented -Menuconfig: implemented -Xconfig: implemented -mconfig: implemented - -Example: - - # arch/i386/config.in - choice ' PCI access mode' \ - "BIOS CONFIG_PCI_GOBIOS \ - Direct CONFIG_PCI_GODIRECT \ - Any CONFIG_PCI_GOANY" Any - - - -=== nchoice /prompt/ /symbol/ /prompt/ /symbol/ ... - -This verb has the same semantics as the choice verb, but with a sensible -syntax. - -The first /prompt/ is the master prompt for the entire choice list. - -The first /symbol/ is the default symbol to enable (notice that this -is a symbol, not a unique prompt abbreviation). - -The subsequent /prompt/ and /symbol/ pairs are the prompts and symbols -for the choice list. - -Configure: not implemented -Menuconfig: not implemented -XConfig: not implemented -mconfig: implemented - - - -=== if [ /expr/ ] ; then - -This is a conditional statement, with an optional 'else' clause. You may -substitute a newline for the semicolon if you choose. - -/expr/ may contain the following atoms and operators. Note that, unlike -shell, you must use double quotes around every atom. - - /atom/: - "..." a literal - "$..." a variable - - /expr/: - /atom/ = /atom/ true if atoms have identical value - /atom/ != /atom/ true if atoms have different value - - /expr/: - /expr/ -o /expr/ true if either expression is true - /expr/ -a /expr/ true if both expressions are true - ! /expr/ true if expression is not true - -Note that a naked /atom/ is not a valid /expr/. If you try to use it -as such: - - # Do not do this. - if [ "$CONFIG_EXPERIMENTAL" ]; then - bool 'Bogus experimental feature' CONFIG_BOGUS - fi - -... then you will be surprised, because CONFIG_EXPERIMENTAL never has a -value of the empty string! It is always "y" or "n", and both of these -are treated as true (non-empty) by the bash-based interpreters Configure -and Menuconfig. - -Configure: implemented -Menuconfig: implemented -XConfig: implemented, with bugs -mconfig: implemented - -Xconfig has some known bugs, and probably some unknown bugs too: - -- literals with an empty "" value are not properly handled. - - - -=== mainmenu_option next_comment - -This verb introduces a new menu. The next statement must have a comment -verb. The /prompt/ of that comment verb becomes the title of the menu. -(I have no idea why the original designer didn't create a 'menu ...' verb). - -Statements outside the scope of any menu are in the implicit top menu. -The title of the top menu comes from a variety of sources, depending on -the interpreter. - -Configure: implemented -Menuconfig: implemented -Xconfig: implemented -mconfig: implemented - - - -=== endmenu - -This verb closes the scope of a menu. - -Configure: implemented -Menuconfig: implemented -Xconfig: implemented -mconfig: implemented - - - -=== source /word/ - -This verb interprets the literal /word/ as a filename, and interpolates -the contents of that file. The word must be a single unquoted literal -word. - -Some interpreters interpret this verb at run time; some interpreters -interpret it at parse time. - -Inclusion is textual inclusion, like the C preprocessor #include facility. -The source verb does not imply a submenu or any kind of block nesting. - -Configure: implemented (run time) -Menuconfig: implemented (parse time) -Xconfig: implemented (parse time) -mconfig: implemented (parse time) diff --git a/grlib-original/bin/tkconfig/config.h b/grlib-original/bin/tkconfig/config.h deleted file mode 100755 index 31355fc57..000000000 --- a/grlib-original/bin/tkconfig/config.h +++ /dev/null @@ -1,173 +0,0 @@ -/* - * Automatically generated C config: don't edit - */ -#define AUTOCONF_INCLUDED -#define CONFIG_PERI_LCONF 1 -/* - * Synthesis - */ -#undef CONFIG_SYN_GENERIC -#undef CONFIG_SYN_ATC35 -#undef CONFIG_SYN_ATC25 -#undef CONFIG_SYN_ATC18 -#undef CONFIG_SYN_FS90 -#undef CONFIG_SYN_UMC018 -#undef CONFIG_SYN_TSMC025 -#undef CONFIG_SYN_PROASIC -#undef CONFIG_SYN_AXCEL -#undef CONFIG_SYN_VIRTEX -#define CONFIG_SYN_VIRTEX2 1 -#undef CONFIG_SYN_INFER_RAM -#undef CONFIG_SYN_INFER_REGF -#undef CONFIG_SYN_INFER_ROM -#undef CONFIG_SYN_INFER_PCI_PADS -#define CONFIG_SYN_INFER_MULT 1 -#define CONFIG_SYN_RFTYPE 1 -#define CONFIG_SYN_TRACE_DPRAM 1 -/* - * Clock generation - */ -#undef CONFIG_CLK_VIRTEX -#define CONFIG_CLK_VIRTEX2 1 -#undef CONFIG_DCM_2_3 -#undef CONFIG_DCM_3_4 -#undef CONFIG_DCM_4_5 -#define CONFIG_DCM_1_1 1 -#undef CONFIG_DCM_5_4 -#undef CONFIG_DCM_4_3 -#undef CONFIG_DCM_3_2 -#undef CONFIG_DCM_5_3 -#undef CONFIG_DCM_2_1 -#undef CONFIG_DCM_3_1 -#undef CONFIG_DCM_4_1 -#undef CONFIG_PCI_DLL -#undef CONFIG_PCI_SYSCLK -/* - * Processor - */ -/* - * Integer unit - */ -#define CONFIG_IU_NWINDOWS (8) -#define CONFIG_IU_V8MULDIV 1 -#undef CONFIG_IU_MUL_LATENCY_1 -#undef CONFIG_IU_MUL_LATENCY_2 -#define CONFIG_IU_MUL_LATENCY_4 1 -#undef CONFIG_IU_MUL_LATENCY_5 -#undef CONFIG_IU_MUL_LATENCY_35 -#undef CONFIG_IU_MUL_MAC -#define CONFIG_IU_LDELAY (1) -#define CONFIG_IU_FASTJUMP 1 -#define CONFIG_IU_ICCHOLD 1 -#define CONFIG_IU_FASTDECODE 1 -#define CONFIG_IU_WATCHPOINTS (2) -/* - * Floating-point unit - */ -#undef CONFIG_FPU_ENABLE -/* - * Co-processor - */ -#undef CONFIG_CP_ENABLE -/* - * Cache system - */ -/* - * Instruction cache - */ -#define CONFIG_ICACHE_ASSO1 1 -#undef CONFIG_ICACHE_ASSO2 -#undef CONFIG_ICACHE_ASSO3 -#undef CONFIG_ICACHE_ASSO4 -#undef CONFIG_ICACHE_SZ1 -#undef CONFIG_ICACHE_SZ2 -#define CONFIG_ICACHE_SZ4 1 -#undef CONFIG_ICACHE_SZ8 -#undef CONFIG_ICACHE_SZ16 -#undef CONFIG_ICACHE_SZ32 -#undef CONFIG_ICACHE_SZ64 -#undef CONFIG_ICACHE_LZ16 -#define CONFIG_ICACHE_LZ32 1 -/* - * Data cache - */ -#define CONFIG_DCACHE_ASSO1 1 -#undef CONFIG_DCACHE_ASSO2 -#undef CONFIG_DCACHE_ASSO3 -#undef CONFIG_DCACHE_ASSO4 -#undef CONFIG_DCACHE_SZ1 -#undef CONFIG_DCACHE_SZ2 -#define CONFIG_DCACHE_SZ4 1 -#undef CONFIG_DCACHE_SZ8 -#undef CONFIG_DCACHE_SZ16 -#undef CONFIG_DCACHE_SZ32 -#undef CONFIG_DCACHE_SZ64 -#undef CONFIG_DCACHE_LZ16 -#define CONFIG_DCACHE_LZ32 1 -#define CONFIG_DCACHE_SNOOP 1 -#define CONFIG_DCACHE_SNOOP_SLOW 1 -#undef CONFIG_DCACHE_SNOOP_FAST -#undef CONFIG_DCACHE_LRAM -/* - * MMU - */ -#undef CONFIG_MMU_ENABLE -/* - * Debug support unit - */ -#define CONFIG_DSU_ENABLE 1 -#define CONFIG_DSU_TRACEBUF 1 -#define CONFIG_DSU_MIXED_TRACE 1 -#undef CONFIG_DSU_TRACESZ64 -#undef CONFIG_DSU_TRACESZ128 -#define CONFIG_DSU_TRACESZ256 1 -#undef CONFIG_DSU_TRACESZ512 -#undef CONFIG_DSU_TRACESZ1024 -/* - * AMBA configuration - */ -#define CONFIG_AHB_DEFMST (0) -#undef CONFIG_AHB_SPLIT -/* - * Memory controller - */ -#undef CONFIG_MCTRL_8BIT -#undef CONFIG_MCTRL_16BIT -#undef CONFIG_PERI_WPROT -#undef CONFIG_MCTRL_WFB -#undef CONFIG_MCTRL_5CS -#define CONFIG_MCTRL_SDRAM 1 -#undef CONFIG_MCTRL_SDRAM_INVCLK -#define CONFIG_MCTRL_SDRAM_SEPBUS 1 -/* - * Peripherals - */ -#define CONFIG_PERI_LCONF 1 -#undef CONFIG_PERI_IRQ2 -#undef CONFIG_PERI_WDOG -#define CONFIG_PERI_AHBSTAT 1 -#undef CONFIG_AHBRAM_ENABLE -/* - * Ethernet interface - */ -#define CONFIG_ETH_ENABLE 1 -#define CONFIG_ETH_TXFIFO (8) -#define CONFIG_ETH_RXFIFO (8) -#define CONFIG_ETH_BURST (4) -/* - * PCI interface - */ -#undef CONFIG_PCI_ENABLE -/* - * Boot options - */ -#define CONFIG_BOOT_EXTPROM 1 -#undef CONFIG_BOOT_INTPROM -#undef CONFIG_BOOT_MIXPROM -/* - * VHDL Debugging - */ -#undef CONFIG_DEBUG_UART -#undef CONFIG_DEBUG_IURF -#undef CONFIG_DEBUG_NOHALT -#undef CONFIG_DEBUG_PC32 diff --git a/grlib-original/bin/tkconfig/config.help b/grlib-original/bin/tkconfig/config.help deleted file mode 100644 index da3e645df..000000000 --- a/grlib-original/bin/tkconfig/config.help +++ /dev/null @@ -1,702 +0,0 @@ - -Name of configuration -CONFIG_CFG_NAME - The VHDL name of the created configuration record. Must be a valid - VHDL identifier. - -Prompt for target technology -CONFIG_SYN_GENERIC - Selects the target technology. The following are available: - - - Generic: Generic FPGA or ASIC targets if your synthesis tool - is capable of infering RAMs and pads automatically. - - - ATC35: Atmel-Nantes 0.35 um rad-hard CMOS - - - ATC25: Atmel-Nantes 0.25 um rad-hard CMOS - - - ATC18: Atmel-Nantes 0.18 um rad-hard CMOS with Virage ram cells - - - FS90: UMC with Faraday FS90 libraries - - - UMC-0.18 : UMC 0.18 um CMOS with Virtual Silicon libraries - - - TSMC-0.25: TSMC 0.25 um CMOS - - - Xilinx-Virtex: Xilinx Virtex libraries - - - Xilinx-Virtex2: Xilinx Virtex2 libraries - - - Actel ProAsic and Axellerator FPGAs - -Infer ram -CONFIG_SYN_INFER_RAM - Say Y here if you want the synthesis tool to infer your - RAMs for cache memories and trace buffer. Say N to directly - instantiate technology-specific RAM cells from the selected - target technology package (tech_xxx.vhd). - -Infer register file -CONFIG_SYN_INFER_REGF - Say Y here if you want the synthesis tool to infer the RAMS in - the register file. Say N to directly instantiate technology- - specific RAM cells from the selected target technology package - (tech_xxx.vhd). - -Infer rom -CONFIG_SYN_INFER_ROM - Say Y here if you want the synthesis tool to infer the - (optional) internal boot ROM. Say N to directly instantiate - technology-specific ROM cells from the selected target - technology package (tech_xxx.vhd). Most users should say Y - here since only the Virtex package provides support for hard - ROM cells, and then only through Coregen. - -Infer pads -CONFIG_SYN_INFER_PADS - Say Y here if you want the synthesis tool to infer pads. - Say N to directly instantiate technology-specific pads from - the selected target technology package (tech_xxx.vhd). - -Infer multiplier -CONFIG_SYN_INFER_MULT - Say Y here if you want the synthesis tool to infer a multiplier - for the UMUL/SMUL instructions. Say N to use a structural - multiplier provided in multlib.vhd. FPGA targets should say Y - here, ASIC targets should say N unless your synthesis tool can - infer some really fast multiplier core. - -Use dual-port RAMS for DSU trace buffer -CONFIG_SYN_TRACE_DPRAM - Say Y here if you want to use dual-port RAMs instead of single-port - RAMs for the DSU trace buffer. This will reduce the total number of - RAM blocks. Note that the target tech package must have support for - DPRAM's, which is currently only implemented for Virtex, ATC25, and - TSMC025. - -Improve register file write timing -CONFIG_SYN_RFTYPE - If you say Y here, the register file write timing will be improved - by clocking the write port on the rising edge, providing a whole - cycle for write strobe generation. If you say N, both read and write - ports will be clocked on the falling edge of the clock, simplifying - timing analysis. - - This option is not implemented on all targets. Say Y when possible. - -Use Virtex CLKDLL for clock synchronisation -CONFIG_CLK_VIRTEX - Valid for all Spartan and Virtex targets. If enabled, the input - clock will be re-synchronized using a Virtex CLKDLL macro. This - will improve clock-to-output delays and allow scaling the clock - with a factor 0.5, 1.0, or 2.0. This option also re-synchronizes - the SDRAM clock, allowing the use of the SDRAM controller without - the inverted-clock option. For this to work, connect SDCLK to PLLREF. - - WARNING: This option cannot be simulated unless you also compile - the VHDL component libraries for the Virtex macro blocks (comes - with the Xilinx ISE tool). Also, the input clock must be at - least 24 MHz for the CKLDLL to work. - -System clock multiplier -CONFIG_CLKDLL_1_2 - Scale the input clock with a factor of 0.5, 1.0, or 2.0. Useful - when the target board has an oscillator with a too high (or low) - frequency for your design. The divided clock will be used as the - main clock for the whole processor (except PCI and ethernet clocks). - -Use Virtex-II DCM for clock synchronisation -CONFIG_CLK_VIRTEX2 - Valid for Spartan2/Spartan3/Virtex2 targets. If enabled, the input - clock will be re-synchronized using a Virtex DCM macro. This - will improve clock-to-output delays and allow scaling the clock - frequency. This option also re-synchronizes the SDRAM clock, - allowing the use of the SDRAM controller without the inverted-clock - option. For this to work, connect SDCLK to PLLREF. - - WARNING: This option cannot be simulated unless you also compile - the VHDL component libraries for the Virtex macro blocks (comes - with the Xilinx ISE tool). - -System clock multiplier -CONFIG_DCM_2_3 - Scale the input clock with a factor of 2/3, 3/4, 1, 4/3, 3/2, - 2, 3, and 4. Useful when the target board has an oscillator with a - too high (or low) frequency for your design. The divided clock will - be used as the main clock for the whole processor (except PCI and - ethernet clocks). NOTE: the resulting frequency must be at least - 24 MHz or the DCM might not work (see Virtex-II datasheet). - -Enable CLKDLL for PCI clock -CONFIG_PCI_DLL - Say Y here to re-synchronize the PCI clock using a - Virtex BUFGDLL macro. Will improve PCI clock-to-output - delays on the expense of input-setup requirements. - -Use PCI clock system clock -CONFIG_PCI_SYSCLK - Say Y here to the PCI clock to generate the system clock. - The PCI clock can be scaled using the DCM or CLKDLL to - generate a suitable processor clock. - -Number of SPARC register windows -CONFIG_IU_NWINDOWS - The SPARC architecture (and LEON) allows 2 - 32 register windows. - However, any number except 8 will require that you modify and - recompile your run-time system or kernel. Unless you know what - you are doing, use 8. - -SPARC V8 multiply and divide instruction -CONFIG_IU_V8MULDIV - If you say Y here, the SPARC V8 multiply and divide instructions - will be implemented. The instructions are: UMUL, UMULCC, SMUL, - SMULCC, UDIV, UDIVCC, SDIV, SDIVCC. In code containing frequent - integer multiplications and divisions, significant performance - increase can be achieved. Emulated floating-point operations will - also benefit from this option. - - By default, the sparc-rtems-gcc compiler does not emit these - instructions and your code must be compiled with -mv8 to see any - performance increase. On the other hand, code compiled with -mv8 - will generate an illegal instruction trap when executed on processors - with this option disabled. - - The divider consumes approximately 2 kgates, the size of the - multiplier depends on the latency. - -Multiplier latency -CONFIG_IU_MUL_LATENCY_1 - The multiplier used for UMUL/SMUL instructions can be implemented - with 1, 2, 4, 5 or 35 cycles latency. Lower latency gives higher - multiplication performance, but increases area and might reduce - the maximum clock frequency. The best area/timing/performance - compromise is usually 4 or 5. A latency of 5 cycles will use the - same multiplier (16x16) as for 4 cycles, but with a pipeline register - to improve timing. - -Multiplier latency -CONFIG_IU_MUL_MAC - If you say Y here, the SPARC V8e UMAC/SMAC (multiply-accumulate) - instructions will be enabled. The instructions implement a - single-cycle 16x16->32 bits multiply with a 40-bits accumulator. - The details of these instructions can be found in the LEON manual, - section 2.4. Note that the multiplier must be configured with 4 - cycles latency for this option to be enabled. - -Load latency -CONFIG_IU_LDELAY - Defines the pipeline load delay (= pipeline cycles before the data - from a load instruction is available for the next instruction). - One cycle gives best performance, but might create a critical path - on targets with slow (data) cache memories. A 2-cycle delay can - improve timing but will reduce performance with about 5 - 8%. - All FPGA targets and most ASIC targets do fine with 1. - -Icc interlock -CONFIG_IU_ICCHOLD - If you say Y here, a pipeline stall cycle will be introduced when - an instruction that modifies the condition codes is directly followed - by a branch instruction that uses these codes (BICC, TICC). The option - reduces the performance with about 5% but significantly improves timing - on FPGA targets. Recommendation: say Y on FPGA targets, N on ASIC targets. - -Fast jump address generation -CONFIG_IU_FASTJUMP - If you say Y here, jump address generation will accelerated by - using a separate address adder. Will improve timing on most targets - to the cost of approximately 300 gates. - -Fast instruction decoding -CONFIG_IU_FASTDECODE - If you say Y here, instruction decode timing will be improved by adding - some extra parallel logic. Useful when you have a critical path - ending at the register file read address ports. - -Register file power saving -CONFIG_IU_RFPOW - If you say Y here, the read ports of the register file will be disabled - when not used in an attempt to save power. Only implemented on TSMC-0.25, - UMC-0.18 and UMC-FS90 targets. Might lead to a critical path to the - register file read enable signal. If so, say N and the read ports will - be permanently enabled. Also say N if saving a few gates feels better - than saving a few milli-Watts. - -Hardware watchpoints -CONFIG_IU_WATCHPOINTS - The processor can have up to 4 hardware watchpoints, allowing to - create both data and instruction breakpoints at any memory location, - also in PROM. Each watchpoint will use approximately 500 gates. - Use 0 to disable the watchpoint function. - -Processor implementation ID -CONFIG_IU_IMPL - Each SPARC processor has a 4-bit implementation ID hardcoded in the - processor status register (%psr). You should not use numbers 0 - 9 - which are used by existing implementations. The value 10 will be - assigned to Gaisler Research use this value unless you have a - compelling reason not to. In any case, do NOT use 1 since this - number is used by ERC32 and will cause applications compiled with - LECCS to fail. - -Processor version ID -CONFIG_IU_VER - Each SPARC processor has a 4-bit version ID hardcoded in the - processor status register (%psr). Use 2 for LEON2. - -Floating-point enable -CONFIG_FPU_ENABLE - Say Y here to enable the floating-point unit. Note that only the - (incomplete) LTH FPU is provided with the LEON VHDL model. The - Gaisler GRFPU and the Meiko FPU are commercial cores and must be - obtained separately. - -FPU selection -CONFIG_FPU_GRFPU - Select between Gaisler Research's GRFPU, the Sun Meiko FPU core or - the open-source LTH core from Lund's University. The Meiko and GRFPU - are fully IEEE-754 compatible and supports all SPARC FPU instructions. - The LTH FPU also supports IEEE-754, but does not implement the FMUL, - FDIV and FSQRT instructions and cannot (yet) be used for general - floating-point code. - -FPU version ID -CONFIG_FPU_VER - Each SPARC FPU has a 3-bit version ID hardcoded in the FPU status - register (%fsr). Has no impact on operation or any (known) software. - Use as you like, staying with 0 is safe. - -Co-processor enable -CONFIG_CP_ENABLE - Say Y here to enable the interface to a (custom) co-processor unit. - Unless you actually want to add your own co-processor, say N. - -Co-processor configuration -CONFIG_CP_CFG - The VHDL name of the co-processor configuration to be used. Should - exist in target.vhd. - -Instruction cache associativity -CONFIG_ICACHE_ASSO1 - The instruction cache can be implemented as a multi-set cache with - 1 - 4 sets. Higher associativity usually increases the cache hit - rate and thereby the performance. The downside is higher power - consumption and increased gate-count for tag comparators. - - Note that a 1-set cache is effectively a direct-mapped cache. - -Instruction cache set size -CONFIG_ICACHE_SZ1 - The size of each set in the instuction cache (kbytes). Valid values - are 1 - 64 in binary steps. Note that the full range is only supported - by the generic and virtex2 targets. Most target packages are limited - to 2 - 16 kbyte. Large set size gives higher performance but might - affect the maximum frequency (on ASIC targets). The total instruction - cache size is the number of set multiplied with the set size. - -Instruction cache line size -CONFIG_ICACHE_LZ16 - The instruction cache line size. Can be set to either 16 or 32 - bytes per line. Instruction caches typically benefit from larger - line sizes, but on small caches, it migh be better with 16 bytes/line - to limit eviction miss rate. - -Instruction cache replacement algorithm -CONFIG_ICACHE_ALGORND - Cache replacement algorithm for caches with 2 - 4 sets. The 'random' - algorithm selects the set to evict randomly. The least-recently-used - (LRR) algorithm evicts the set least recently replaced. The least- - recently-used (LRU) algorithm evicts the set least recently accessed. - The random algorithm uses a simple 1- or 2-bit counter to select - the eviction set and has low area overhead. The LRR scheme uses one - extra bit in the tag ram and has therefore also low area overhead. - However, the LRR scheme can only be used with 2-set caches. The LRU - scheme has typically the best performance but also highest area overhead. - A 2-set LRU uses 1 flip-flop per line, a 3-set LRU uses 3 flip-flops - per line, and a 4-set LRU uses 5 flip-flops per line to store the access - history. - -Instruction cache locking -CONFIG_ICACHE_LOCK - Say Y here to enable cache locking in the instruction cache. - Locking can be done on cache-line level, but will increase the - width of the tag ram with one bit. If you don't know what - locking is good for, it is safe to say N. - -Data cache associativity -CONFIG_DCACHE_ASSO1 - The data cache can be implemented as a multi-set cache with - 1 - 4 sets. Higher associativity usually increases the cache hit - rate and thereby the performance. The downside is higher power - consumption and increased gate-count for tag comparators. - - Note that a 1-set cache is effectively a direct-mapped cache. - -Data cache set size -CONFIG_DCACHE_SZ1 - The size of each set in the data cache (kbytes). Valid values are - 1 - 64 in binary steps. Note that the full range is only supported - by the generic and virtex2 targets. Most target packages are limited - to 2 - 16 kbyte. A large cache gives higher performance but the - data cache is timing critical an a too large setting might affect - the maximum frequency (on ASIC targets). The total data cache size - is the number of set multiplied with the set size. - -Data cache line size -CONFIG_DCACHE_LZ16 - The data cache line size. Can be set to either 16 or 32 bytes per - line. A smaller line size gives better associativity and higher - cache hit rate, but requires a larger tag memory. - -Data cache replacement algorithm -CONFIG_DCACHE_ALGORND - See the explanation for instruction cache replacement algorithm. - -Data cache locking -CONFIG_DCACHE_LOCK - Say Y here to enable cache locking in the data cache. - Locking can be done on cache-line level, but will increase the - width of the tag ram with one bit. If you don't know what - locking is good for, it is safe to say N. - -Data cache snooping -CONFIG_DCACHE_SNOOP - Say Y here to enable data cache snooping on the AHB bus. Is only - useful if you have additional AHB masters such as the DSU or a - target PCI interface. Note that the target technology must support - dual-port RAMs for this option to be enabled. Dual-port RAMS are - currently supported on Virtex/2, ATC25, ATC18 and TSMC025 targets. - -Data cache snooping implementation -CONFIG_DCACHE_SNOOP_SLOW - Selects the snooping implementation. Use 'slow' if you don't have - AHB slaves in cacheable areas which are capable of supporting - zero-waitstates non-sequential write accesses. Otherwise use 'fast' - and suffer a few kgates extra area. - -Fast read-data generation -CONFIG_DCACHE_RFAST - Say Y here to improve the data read timing in multi-set caches. - FPGA implementations usually do fine with N, while ASIC - implementations tuned for maximum frequency should say Y. Increases - the area with about 200 gates per set. - -Fast write-data generation -CONFIG_DCACHE_WFAST - Say Y here to improve the timing of the data inputs to the data - cache data memory in multi-set caches. FPGA implementations - usually do fine with N, while ASIC implementations tuned for - maximum frequency should say Y. Increases the area with about - 200 gates per set. - -Local data ram -CONFIG_DCACHE_LRAM - Say Y here to add a local ram to the data cache controller. - Accesses to the ram (load/store) will be performed at 0 waitstates - and store data will never be written back to the AHB bus. - -Size of local data ram -CONFIG_DCACHE_LRAM_SZ1 - Defines the size of the local data ram in Kbytes. Note that most - technology libraries do not support larger rams than 16 Kbyte. - -Start address of local data ram -CONFIG_DCACHE_LRSTART - Defines the 8 MSB bits of start address of the local data ram. - By default set to 8f (start address = 0x8f000000), but any value - (except 0) is possible. Note that the local data ram 'shadows' - a 16 Mbyte block of the address space. - -MMU enable -CONFIG_MMU_ENABLE - Say Y here to enable the Memory Management Unit. - -MMU split icache/dcache table lookaside buffer -CONFIG_MMU_COMBINED - Select "combined" for a combined icache/dcache table lookaside buffer, - "split" for a split icache/dcache table lookaside buffer - -MMU tlb replacement scheme -CONFIG_MMU_REPARRAY - Select "LRU" to use the "least recently used" algorithm for TLB - replacement, or "Increment" for a simple incremental replacement - scheme. - -Combined i/dcache tlb -CONFIG_MMU_I2 - Select the number of entries for the instruction TLB, or the - combined icache/dcache TLB if such is used. - -Split tlb, dcache -CONFIG_MMU_D2 - Select the number of entries for the dcache TLB. - -8-bit memory support -CONFIG_MCTRL_8BIT - If you say Y here, the PROM/SRAM memory controller will support - 8-bit mode, i.e. operate from 8-bit devices as if they were 32-bit. - Say N to save a few hundred gates. - -16-bit memory support -CONFIG_MCTRL_16BIT - If you say Y here, the PROM/SRAM memory controller will support - 16-bit mode, i.e. operate from 16-bit devices as if they were 32-bit. - Say N to save a few hundred gates. - -Write strobe feedback -CONFIG_MCTRL_WFB - If you say Y here, the PROM/SRAM write strobes (WRITEN, WEN) will - be used to enable the data bus drivers during write cycles. This - will guarantee that the data is still valid on the rising edge of - the write strobe. If you say N, the write strobes and the data bus - drivers will be clocked on the rising edge, potentially creating - a hold time problem in external memory or I/O. However, in all - practical cases, there is enough capacitance in the data bus lines - to keep the value stable for a few (many?) nano-seconds after the - buffers have been disabled, making it safe to say N and remove a - combinational path in the netlist that might be difficult to - analyze. - -Write strobe feedback -CONFIG_MCTRL_5CS - If you say Y here, the 5th (RAMSN[4]) SRAM chip select signal will - be enabled. If you don't intend to use it, say N and save some gates. - -SDRAM controller enable -CONFIG_MCTRL_SDRAM - Say Y here to enabled the PC100/PC133 SDRAM controller. If you don't - intend to use SDRAM, say N and save about 1 kgates. - -SDRAM controller inverted clock -CONFIG_MCTRL_SDRAM_INVCLK - If you say Y here, the SDRAM clock will be inverted in respect to the - system clock and the SDRAM signals. This will limit the SDRAM frequency - to 50/66 MHz, but has the benefit that you will not need a PLL to - generate the SDRAM clock. On FPGA targets, say Y. On ASIC targets, - say N and tell your foundry to balance the SDRAM clock output. - -SDRAM separate address buses -CONFIG_MCTRL_SDRAM_SEPBUS - Say Y here if your SDRAM is connected through separate address - and data buses (SA & SD). This is the case on the GR-CPCI-XC2V6000 - board, but not on the GR-PCI-XC2V3000 or Avnet XCV1500E boards. - -Default AHB master -CONFIG_AHB_DEFMST - Sets the default AHB master (see AMBA 2.0 specification for definition). - Should not be set to a value larger than the number of AHB masters - 1. - For highest processor performance, leave it at 0. - -Support AHB split-transactions -CONFIG_AHB_SPLIT - Say Y here to enable AHB split-transaction support in the AHB arbiter. - Unless you actually have an AHB slave that can generate AHB split - responses, say N and save some gates. None of the AHB slaves provided - with LEON generates split, so N is a safe choice. - -AHB status register enable -CONFIG_PERI_AHBSTAT - If you want the AHB status register functionality say Y here. - The register will catch the address and parameters of AHB transfers - that are terminated with an error response. Saying N will save - about 500 gates. - -RAM write-protectionenable -CONFIG_PERI_WPROT - If you want to enable RAM write protection (LEON manual 7.13) say Y here. - Otherwise say N and save 1 kgates. - -LEON configuration register -CONFIG_PERI_LCONF - Enables the LEON configuration register that shows how the model was - configured. The register is necessary for the test benches to run, and - also needed by applications compiled with LECCS. Always say Y. - -Secondary interrupt controller enable -CONFIG_PERI_IRQ2 - Say Y here to enable the secondary interrupt controller (LEON - manual 6.3). Routing of the interrupt sources is done in mcore.vhd. - It is safe to say N. - -Secondary interrupt controller configuration -CONFIG_PERI_IRQ2_CFG - The VHDL name of the secondary interrupt controller configuration - to be used. Should exist in target.vhd. - -Watchdog enable -CONFIG_PERI_WDOG - Say Y here to enable the watchdog functionallity in the timer module. - Unless you need a watchdog, say N and save 200 gates. - -On-chip ram -CONFIG_AHBRAM_ENABLE - Say Y here to add a block on on-chip ram to the AHB bus. The ram - will be attached at address 0x60000000. - -On-chip ram size -CONFIG_AHBRAM_SZ1 - Set the size of the on-chip AHB ram. The ram is infered/instantiated - as four byte-wide ram slices to allow byte and half-word write - accesses. It is therefore essential that the target package can - infer byte-wide rams. This is currently supported on the generic, - virtex, virtex2, proasic and axellerator targets. - -DSU enable -CONFIG_DSU_ENABLE - The debug support unit (DSU) allows non-intrusive debugging and tracing - of both executed instructions and AHB transfers. If you want to enable - the DSU, say Y here and select the configuration below. - -Trace buffer enable -CONFIG_DSU_TRACEBUF - Say Y to enable the trace buffer. The buffer is not necessary for - debugging, only for tracing instructions and data transfers. - -Enable mixed tracing -CONFIG_DSU_MIXED_TRACE - If you say Y here, simultaneous instruction and AHB tracing will be - possible. A N will still allow tracing of both, but not simultaneously. - -Size of trace buffer -CONFIG_DSU_TRACESZ64 - Select the number of entries on the trace buffer. For each entry, - 16 bytes (128 bits) will be needed. A 128-entry buffer will need - 2 kbyte. - -PCI interface enable -CONFIG_PCI_ENABLE - To enable a PCI interface, say Y here. - -PCI interface type -CONFIG_PCI_TARGET - Three PCI cores are provided with this version of Leon: a simple - target-only interface without fifos, a fast target interface with - configurable fifos, and a full master-target core with fifos. - The simple target-only interface is small and robust, and is suitable - to be used for DSU communications via PCI. The other two cores core - are suitable when high transfer rates or a master interface are needed. - -PCI trace buffer -CONFIG_PCI_TRACE - The PCI trace buffer implements a simple on-chip logic analyzer - to trace the PCI signals. The PCI AD bus and most control signals - are stored in a circular buffer, and can be read out by the DSU - or any other AHB master. See the manual for detailed operation. - Only available for target technologies with dual-port rams. - -PCI trace buffer depth -CONFIG_PCI_TRACE256 - Select the number of entries in the PCI trace buffer. Each entry - will use 6 bytes of on-chip (block) ram. - -PCI FIFO depth -CONFIG_PCI_FIFO8 - The number words in the PCI FIFO buffers in the master-target - core. The master interface uses four 33-bit wide FIFOs, while the - target interface uses two. - -Ethernet MAC enable -CONFIG_ETH_ENABLE - Say Y here to enable a Ethernet MAC from OpenCores. The control - registers of the MAC will be mapped to 0xb0000000. - -Ethernet MAC transmitt FIFO depth -CONFIG_ETH_TXFIFO - The number of 32-bit words in the transmitt FIFO. 8 words is a - good compromise. - -Ethernet MAC receive FIFO depth -CONFIG_ETH_RXFIFO - The number of 32-bit words in the receiver FIFO. 8 words is a - good compromise. - -Ethernet MAC burts length -CONFIG_ETH_BURST - The length of the burst on the AHB when moving data to and from - the FIFOs. A good compromise is half of the FIFO depth. - -Fault-tolerance enable -CONFIG_FT_ENABLE - Say Y here to enable the fault-tolerance features in LEON-FT. If you - only have access to the the public LGPL model, say N or the model - will not compile. If you do have the LEON-FT model, say Y here - even if you say N to all other options. - -Boot selection -CONFIG_BOOT_EXTPROM - The processor can be configured to boot from external memory, internal - ROM, or both. The internal ROM contains by default the PMON monitor - (LEON manual 11.8). If the 'both' option is selected, boot source will - be controlled through PIO[4]. - -Default RAM read waitstates -CONFIG_BOOT_RWS - If booting from internal ROM is selected, the memory controller will - automatically initialise the SRAM read waitstates setting with this - value (valid range is 0 - 3). - -Default RAM write waitstates -CONFIG_BOOT_WWS - If booting from internal ROM is selected, the memory controller will - automatically initialise the SRAM write waitstates setting with this - value (valid range is 0 - 3). - -System clock -CONFIG_BOOT_SYSCLK - If booting from internal ROM is selected, this value should reflect - the system clock frequency. This will allow proper default - initialisation of the timer unit and UART baud-rate generation. - -UART baud rate -CONFIG_BOOT_BAUDRATE - If booting from internal ROM is selected, use this value to - automatically set the UART baud-rate. - -Select external baud-rate -CONFIG_BOOT_EXTBAUD - If you say Y here and booting from internal ROM is selected, the UART - baud-rate scaler register will be initialised from PIO[7:0]. - -Internal ROM addres bits -CONFIG_BOOT_PROMABITS - Defines the with of the internal ROM address bus. 11 bits is enough - for 2 kbytes. - -UART debugging -CONFIG_DEBUG_UART - During simulation, the output from the UARTs is printed on the - simulator console. Since the ratio between the system clock and - UART baud-rate is quite high, simulating UART output will be very - slow. If you say Y here, the UARTs will print a character as soon - as it is stored in the transmitter data register. The transmitter - ready flag will be permanently set, speeding up simulation. However, - the output on the UART tx line will be garbled. Has not impact on - synthesis, but will cause the LEON test bench to fail. - -IU register tracing -CONFIG_DEBUG_IURF - If you say Y here, all writes to the integer unit register file will be - printed on the simulator console. - -FPU register tracing -CONFIG_DEBUG_FPURF - If you say Y here, all writes to the floating-point unit register file - will be printed on the simulator console. - -Continue on reset trap -CONFIG_DEBUG_NOHALT - The SPARC standard mandates that when error mode is entered, - the processor should be halted. If you say Y here, a reset trap - (tt = 0x0) will be take on error mode and the processor will - not be halted. Use only for testing, since it will not be - possible to stop the processor with this option enabled! - -32-bit program counters -CONFIG_DEBUG_PC32 - Since the LSB 2 bits of the program counters always are zero, they are - normally not implemented. If you say Y here, the program counters will - be implemented with full 32 bits, making debugging of the VHDL model - much easier. Turn of this option for synthesis or you will be wasting - area. - - - diff --git a/grlib-original/bin/tkconfig/config.in b/grlib-original/bin/tkconfig/config.in deleted file mode 100644 index 902abf8ad..000000000 --- a/grlib-original/bin/tkconfig/config.in +++ /dev/null @@ -1,381 +0,0 @@ -# -# LEON configuration written in linux configuration language -# -# Written by Jiri Gaisler, Aeroflex Gaisler -# -# Comments and bug reports to support@gaisler.com -# -# - -define_bool CONFIG_PERI_LCONF y - -mainmenu_name "LEON Processor Configuration" - -mainmenu_option next_comment - comment 'Synthesis ' - choice 'Target technology ' \ - "Generic CONFIG_SYN_GENERIC \ - Atmel-ATC35 CONFIG_SYN_ATC35 \ - Atmel-ATC25 CONFIG_SYN_ATC25 \ - Atmel-ATC18 CONFIG_SYN_ATC18 \ - UMC-FS90 CONFIG_SYN_FS90 \ - UMC-0.18 CONFIG_SYN_UMC018 \ - TSMC-0.25 CONFIG_SYN_TSMC025 \ - Actel-Proasic CONFIG_SYN_PROASIC \ - Actel-Axcel CONFIG_SYN_AXCEL \ - Xilinx-Virtex CONFIG_SYN_VIRTEX \ - Xilinx-Virtex2 CONFIG_SYN_VIRTEX2" Generic - if [ "$CONFIG_SYN_GENERIC" != "y" ]; then - bool 'Infer cache and trace buffer RAM' CONFIG_SYN_INFER_RAM - bool 'Infer register file' CONFIG_SYN_INFER_REGF - if [ "$CONFIG_SYN_VIRTEX" = "y" -o "$CONFIG_SYN_VIRTEX2" = "y"]; then - bool 'Infer ROM' CONFIG_SYN_INFER_ROM - fi - if [ "$CONFIG_SYN_VIRTEX" != "y" -a "$CONFIG_SYN_AXCEL" != "y" \ - -a "$CONFIG_SYN_VIRTEX2" != "y" -a "$CONFIG_SYN_PROASIC" != "y" ]; then - bool 'Infer pads' CONFIG_SYN_INFER_PADS - fi - if [ "$CONFIG_SYN_AXCEL" != "y" -a "$CONFIG_SYN_PROASIC" != "y" ]; then - bool 'Infer PCI pads' CONFIG_SYN_INFER_PCI_PADS - fi - fi - bool 'Infer multiplier' CONFIG_SYN_INFER_MULT - if [ "$CONFIG_SYN_GENERIC" = "y" -o "$CONFIG_SYN_VIRTEX" = "y" \ - -o "$CONFIG_SYN_AXCEL" = "y" -o "$CONFIG_SYN_ATC25" = "y" \ - -o "$CONFIG_SYN_INFER_REGF" = "y" -o "$CONFIG_SYN_VIRTEX2" = "y"]; then - bool 'Improve register file write timing' CONFIG_SYN_RFTYPE - fi - if [ "$CONFIG_SYN_ATC25" = "y" -o "$CONFIG_SYN_VIRTEX" = "y" -o "$CONFIG_SYN_VIRTEX2" = "y"\ - -o "$CONFIG_SYN_ATC18" = "y" -o "$CONFIG_SYN_TSMC025" = "y" ]; then - if [ "$CONFIG_SYN_INFER_RAM" != "y" ]; then - bool 'Use dual-port RAM for DSU trace buffer ' \ - CONFIG_SYN_TRACE_DPRAM $CONFIG_SYN_ATC25 $CONFIG_SYN_ATC18 \ - $CONFIG_SYN_VIRTEX $CONFIG_SYN_TSMC025 $CONFIG_SYN_VIRTEX2 - fi - fi -endmenu - - mainmenu_option next_comment - comment 'Clock generation' - if [ "$CONFIG_SYN_VIRTEX" = "y" -o "$CONFIG_SYN_VIRTEX2" = "y" ]; then - bool 'Use Virtex CLKDLL for clock generation' CONFIG_CLK_VIRTEX - fi - if [ "$CONFIG_SYN_VIRTEX2" = "y" -a "$CONFIG_CLK_VIRTEX" != "y"]; then - bool 'Use Virtex-II DCM for clock generation' CONFIG_CLK_VIRTEX2 - fi - if [ "$CONFIG_CLK_VIRTEX" = "y"]; then - choice ' System clock multiplier (CLKDLL)' \ - "1/2 CONFIG_CLKDLL_1_2 \ - 1 CONFIG_CLKDLL_1_1 \ - 2 CONFIG_CLKDLL_2_1" 1 - fi - if [ "$CONFIG_CLK_VIRTEX2" = "y"]; then - choice ' System clock multiplier (DCM)' \ - "2/3 CONFIG_DCM_2_3 \ - 3/4 CONFIG_DCM_3_4 \ - 4/5 CONFIG_DCM_4_5 \ - 1 CONFIG_DCM_1_1 \ - 5/4 CONFIG_DCM_5_4 \ - 4/3 CONFIG_DCM_4_3 \ - 3/2 CONFIG_DCM_3_2 \ - 5/3 CONFIG_DCM_5_3 \ - 2 CONFIG_DCM_2_1 \ - 3 CONFIG_DCM_3_1 \ - 4 CONFIG_DCM_4_1" 1 - fi - if [ "$CONFIG_SYN_AXCEL" = "y" ]; then - bool 'Use global clock pad (Actel AX)' CONFIG_AXCEL_HCLKBUF - fi - if [ "$CONFIG_SYN_VIRTEX2" = "y" -o "$CONFIG_CLK_VIRTEX" = "y"]; then - bool 'Enable CLKDLL for PCI clock' CONFIG_PCI_DLL - fi - if [ "$CONFIG_PCI_DLL" != "y" ]; then - bool 'Use PCI clock as system clock' CONFIG_PCI_SYSCLK - fi - endmenu - -mainmenu_option next_comment - comment 'Processor ' - mainmenu_option next_comment - comment 'Integer unit ' - int 'SPARC register windows' CONFIG_IU_NWINDOWS 8 - bool 'SPARC V8 MUL/DIV instructions' CONFIG_IU_V8MULDIV - if [ "$CONFIG_IU_V8MULDIV" = "y" ]; then - choice 'Hardware multiplier latency' \ - "1-cycle CONFIG_IU_MUL_LATENCY_1 \ - 2-cycles CONFIG_IU_MUL_LATENCY_2 \ - 4-cycles CONFIG_IU_MUL_LATENCY_4 \ - 5-cycles CONFIG_IU_MUL_LATENCY_5 \ - 35-cycles CONFIG_IU_MUL_LATENCY_35" 5-cycles - fi - dep_bool 'SPARC V8e SMAC/UMAC instructions ' CONFIG_IU_MUL_MAC $CONFIG_IU_MUL_LATENCY_4 $CONFIG_IU_V8MULDIV - int 'Load delay' CONFIG_IU_LDELAY 1 - bool 'Fast jump-address generation ' CONFIG_IU_FASTJUMP - bool 'ICC interlock ' CONFIG_IU_ICCHOLD - bool 'Fast instruction decoding ' CONFIG_IU_FASTDECODE - if [ "$CONFIG_SYN_TSMC025" = "y" -o "$CONFIG_SYN_UMC018" = "y" \ - -o "$CONFIG_SYN_FS90" = "y" -o "$CONFIG_SYN_PROASIC" = "y" \ - -o "$CONFIG_SYN_ATC18" = "y" \ - -o "$CONFIG_SYN_AXCEL" = "y" -o "$CONFIG_SYN_ATC25" = "y" ]; then - bool 'Register file power-saving ' CONFIG_IU_RFPOW - fi - int 'Hardware watchpoints' CONFIG_IU_WATCHPOINTS 0 - endmenu - mainmenu_option next_comment - comment 'Floating-point unit' - bool 'Enable FPU ' CONFIG_FPU_ENABLE - if [ "$CONFIG_FPU_ENABLE" = "y" ]; then - choice 'FPU core' \ - "GRFPU CONFIG_FPU_GRFPU \ - Meiko CONFIG_FPU_MEIKO \ - LTH CONFIG_FPU_LTH" GRFPU - int 'FSR version ID' CONFIG_FPU_VER 0 - fi - endmenu - mainmenu_option next_comment - comment 'Co-processor' - bool 'Enable co-processor ' CONFIG_CP_ENABLE - if [ "$CONFIG_CP_ENABLE" = "y" ]; then - string 'Co-processor configuration' CONFIG_CP_CFG "cp_none" - fi - endmenu - mainmenu_option next_comment - comment 'Cache system ' - comment 'Instruction cache ' - choice 'Associativity (sets) ' \ - "1 CONFIG_ICACHE_ASSO1 \ - 2 CONFIG_ICACHE_ASSO2 \ - 3 CONFIG_ICACHE_ASSO3 \ - 4 CONFIG_ICACHE_ASSO4" 1 - choice 'Set size (kbytes/set)' \ - "1 CONFIG_ICACHE_SZ1 \ - 2 CONFIG_ICACHE_SZ2 \ - 4 CONFIG_ICACHE_SZ4 \ - 8 CONFIG_ICACHE_SZ8 \ - 16 CONFIG_ICACHE_SZ16 \ - 32 CONFIG_ICACHE_SZ32 \ - 64 CONFIG_ICACHE_SZ64" 2 - choice 'Line size (bytes/line)' \ - "16 CONFIG_ICACHE_LZ16 \ - 32 CONFIG_ICACHE_LZ32" 16 - if [ "$CONFIG_ICACHE_ASSO1" != "y" ]; then - choice 'Replacement alorithm' \ - "Random CONFIG_ICACHE_ALGORND \ - LRR CONFIG_ICACHE_ALGOLRR \ - LRU CONFIG_ICACHE_ALGOLRU" Random - bool 'Cache locking ' CONFIG_ICACHE_LOCK - fi - comment 'Data cache' - choice 'Associativity (sets)' \ - "1 CONFIG_DCACHE_ASSO1 \ - 2 CONFIG_DCACHE_ASSO2 \ - 3 CONFIG_DCACHE_ASSO3 \ - 4 CONFIG_DCACHE_ASSO4" 1 - choice 'Set size (kbytes/set)' \ - "1 CONFIG_DCACHE_SZ1 \ - 2 CONFIG_DCACHE_SZ2 \ - 4 CONFIG_DCACHE_SZ4 \ - 8 CONFIG_DCACHE_SZ8 \ - 16 CONFIG_DCACHE_SZ16 \ - 32 CONFIG_DCACHE_SZ32 \ - 64 CONFIG_DCACHE_SZ64" 2 - choice 'Line size (bytes/line)' \ - "16 CONFIG_DCACHE_LZ16 \ - 32 CONFIG_DCACHE_LZ32" 16 - if [ "$CONFIG_DCACHE_ASSO1" != "y" ]; then - choice 'Replacement alorithm' \ - "Random CONFIG_DCACHE_ALGORND \ - LRR CONFIG_DCACHE_ALGOLRR \ - LRU CONFIG_DCACHE_ALGOLRU" Random - bool 'Cache locking ' CONFIG_DCACHE_LOCK - fi - if [ "$CONFIG_SYN_ATC25" = "y" -o "$CONFIG_SYN_VIRTEX" = "y" -o "$CONFIG_SYN_VIRTEX2" = "y" \ - -o "$CONFIG_SYN_ATC18" = "y" -o "$CONFIG_SYN_TSMC025" = "y" ]; then - if [ "$CONFIG_SYN_INFER_RAM" != "y" -a "$CONFIG_MMU_ENABLE" != "y" ]; then - bool 'AHB snooping ' CONFIG_DCACHE_SNOOP - fi - fi - if [ "$CONFIG_DCACHE_SNOOP" = "y" ]; then - choice 'Snoop implementation' \ - "Slow CONFIG_DCACHE_SNOOP_SLOW \ - Fast CONFIG_DCACHE_SNOOP_FAST" Slow - fi - if [ "$CONFIG_DCACHE_ASSO1" != "y" ]; then - bool 'Fast read-data generation ' CONFIG_DCACHE_RFAST - fi - if [ "$CONFIG_DCACHE_ASSO1" != "y" ]; then - bool 'Fast write-data generation ' CONFIG_DCACHE_WFAST - fi - if [ "$CONFIG_MMU_ENABLE" != "y" ]; then - bool 'Enable local data RAM ' CONFIG_DCACHE_LRAM - fi - if [ "$CONFIG_DCACHE_LRAM" = "y" ]; then - choice 'Local data RAM size (kbytes)' \ - "1 CONFIG_DCACHE_LRAM_SZ1 \ - 2 CONFIG_DCACHE_LRAM_SZ2 \ - 4 CONFIG_DCACHE_LRAM_SZ4 \ - 8 CONFIG_DCACHE_LRAM_SZ8 \ - 16 CONFIG_DCACHE_LRAM_SZ16 \ - 32 CONFIG_DCACHE_LRAM_SZ32 \ - 64 CONFIG_DCACHE_LRAM_SZ64" 2 - hex ' Local RAM start address (8 MSB) ' CONFIG_DCACHE_LRSTART 0x8f - fi -endmenu - mainmenu_option next_comment - comment 'MMU' - bool 'Enable MMU ' CONFIG_MMU_ENABLE - if [ "$CONFIG_MMU_ENABLE" = "y" ]; then - choice 'MMU type ' \ - "combined CONFIG_MMU_COMBINED \ - split CONFIG_MMU_SPLIT" combined - choice 'TLB replacement sheme ' \ - "LRU CONFIG_MMU_REPARRAY \ - Increment CONFIG_MMU_REPINCREMENT" increment - choice 'Instruction (or combined) TLB entries' \ - "2 CONFIG_MMU_I2 \ - 4 CONFIG_MMU_I4 \ - 8 CONFIG_MMU_I8 \ - 16 CONFIG_MMU_I16 \ - 32 CONFIG_MMU_I32" 8 - if [ "$CONFIG_MMU_SPLIT" = "y" ]; then - choice 'Data TLB entries' \ - "2 CONFIG_MMU_D2 \ - 4 CONFIG_MMU_D4 \ - 8 CONFIG_MMU_D8 \ - 16 CONFIG_MMU_D16 \ - 32 CONFIG_MMU_D32" 8 - fi - bool 'Enable Diagnostic Access ' CONFIG_MMU_DIAG - fi - endmenu - -mainmenu_option next_comment -comment 'Debug support unit ' -bool 'Debug support unit ' CONFIG_DSU_ENABLE - if [ "$CONFIG_DSU_ENABLE" = "y" ]; then - bool 'Trace buffer' CONFIG_DSU_TRACEBUF - if [ "$CONFIG_DSU_TRACEBUF" = "y" ]; then - bool 'Mixed instruction/AHB tracing' CONFIG_DSU_MIXED_TRACE - choice 'Trace buffer lines' \ - "64 CONFIG_DSU_TRACESZ64 \ - 128 CONFIG_DSU_TRACESZ128 \ - 256 CONFIG_DSU_TRACESZ256 \ - 512 CONFIG_DSU_TRACESZ512 \ - 1024 CONFIG_DSU_TRACESZ1024" 128 - fi - fi -endmenu -endmenu -mainmenu_option next_comment -comment 'AMBA configuration' - int 'Default AHB master' CONFIG_AHB_DEFMST 0 - bool 'AHB split-transaction support ' CONFIG_AHB_SPLIT -endmenu - -mainmenu_option next_comment -comment 'Memory controller' -bool '8-bit PROM/SRAM bus support ' CONFIG_MCTRL_8BIT -bool '16-bit PROM/SRAM bus support ' CONFIG_MCTRL_16BIT -bool 'RAM write protection ' CONFIG_PERI_WPROT -bool 'Write strobe timing feedback ' CONFIG_MCTRL_WFB -bool '5th SRAM chip-select ' CONFIG_MCTRL_5CS -bool 'SDRAM controller ' CONFIG_MCTRL_SDRAM - if [ "$CONFIG_MCTRL_SDRAM" = "y" ]; then - bool 'Inverted SDRAM clock' CONFIG_MCTRL_SDRAM_INVCLK - bool 'Separate address and data buses' CONFIG_MCTRL_SDRAM_SEPBUS - fi -endmenu - -mainmenu_option next_comment -comment 'Peripherals ' - bool 'LEON configuration register ' CONFIG_PERI_LCONF - bool 'Secondary interrupt controller ' CONFIG_PERI_IRQ2 - if [ "$CONFIG_PERI_IRQ2" = "y" ]; then - string 'Sec. interrupt controller configuration ' CONFIG_PERI_IRQ2_CFG "irq2none" - fi - bool 'Watchdog ' CONFIG_PERI_WDOG - bool 'AHB status register ' CONFIG_PERI_AHBSTAT - bool 'On-chip AHB RAM ' CONFIG_AHBRAM_ENABLE - if [ "$CONFIG_AHBRAM_ENABLE" = "y" ]; then - choice 'AHB RAM size (Kbyte)' \ - "1 CONFIG_AHBRAM_SZ1 \ - 2 CONFIG_AHBRAM_SZ2 \ - 4 CONFIG_AHBRAM_SZ4 \ - 8 CONFIG_AHBRAM_SZ8 \ - 16 CONFIG_AHBRAM_SZ16 \ - 32 CONFIG_AHBRAM_SZ32 \ - 64 CONFIG_AHBRAM_SZ64" 4 - fi -mainmenu_option next_comment -comment 'Ethernet interface ' - bool 'Enable Ethernet interface ' CONFIG_ETH_ENABLE - if [ "$CONFIG_ETH_ENABLE" = "y" ]; then - int 'TX FIFO depth' CONFIG_ETH_TXFIFO 8 - int 'RX FIFO depth' CONFIG_ETH_RXFIFO 8 - int 'AHB burst length' CONFIG_ETH_BURST 4 - fi -endmenu - -mainmenu_option next_comment -comment 'PCI interface ' - bool 'Enable PCI interface ' CONFIG_PCI_ENABLE - if [ "$CONFIG_PCI_ENABLE" = "y" ]; then - choice 'PCI core' \ - "Simple-target CONFIG_PCI_SIMPLE_TARGET" Simple-target - hex 'PCI vendor ID' CONFIG_PCI_VENDORID 16E3 - hex 'PCI device ID' CONFIG_PCI_DEVICEID 0210 - hex 'PCI revision ID' CONFIG_PCI_REVID 1 - if [ "$CONFIG_PCI_FAST_TARGET" = "y" -o "$CONFIG_PCI_MASTER_TARGET" = "y" ]; then - choice 'PCI FIFO depth' \ - "8 CONFIG_PCI_FIFO8 \ - 16 CONFIG_PCI_FIFO16 \ - 32 CONFIG_PCI_FIFO32 \ - 64 CONFIG_PCI_FIFO64 \ - 128 CONFIG_PCI_FIFO128" 8 - fi - if [ "$CONFIG_PCI_TRACE" = "y" ]; then - choice 'PCI trace buffer depth' \ - "256 CONFIG_PCI_TRACE256 \ - 512 CONFIG_PCI_TRACE512 \ - 1024 CONFIG_PCI_TRACE1024 \ - 2048 CONFIG_PCI_TRACE2048 \ - 4096 CONFIG_PCI_TRACE4096" 256 - fi - bool 'PCI reset affects complete processor' CONFIG_PCI_RESETALL - bool 'PCI arbiter ' CONFIG_PCI_ARBEN - fi -endmenu - -endmenu - -mainmenu_option next_comment -comment 'Boot options' - choice 'Boot selection ' \ - "Memory CONFIG_BOOT_EXTPROM \ - Internal-PROM CONFIG_BOOT_INTPROM \ - Both CONFIG_BOOT_MIXPROM" Memory - if [ "$CONFIG_BOOT_EXTPROM" != "y" ]; then - int 'RAM read waitstates' CONFIG_BOOT_RWS 0 - int 'RAM write waitstates' CONFIG_BOOT_WWS 0 - int 'System clock frequency' CONFIG_BOOT_SYSCLK 25000000 - int 'UART baud rate' CONFIG_BOOT_BAUDRATE 38400 - bool 'Use external baud rate setting (PIO[7:0]) ' CONFIG_BOOT_EXTBAUD - int 'Internal boot PROM address bits' CONFIG_BOOT_PROMABITS 11 - fi -endmenu -mainmenu_option next_comment -comment 'VHDL Debugging ' - bool 'Accelerated UART tracing ' CONFIG_DEBUG_UART - bool 'Integer unit register writes ' CONFIG_DEBUG_IURF - dep_bool 'Floating-point unit register writes ' CONFIG_DEBUG_FPURF $CONFIG_FPU_ENABLE - bool 'Continue on reset trap ' CONFIG_DEBUG_NOHALT - bool '32-bit program counters ' CONFIG_DEBUG_PC32 - if [ "$CONFIG_FT_ENABLE" = "y" ]; then - if [ "$CONFIG_FT_RF_ENABLE" = "y" ]; then - bool 'Inject register-file errors ' CONFIG_DEBUG_RFERR - fi - if [ "$CONFIG_FT_CACHEMEM_ENABLE" = "y" ]; then - bool 'Inject cache memory errors ' CONFIG_DEBUG_CACHEMEMERR - fi - fi -endmenu diff --git a/grlib-original/bin/tkconfig/defconfig b/grlib-original/bin/tkconfig/defconfig deleted file mode 100644 index e44183259..000000000 --- a/grlib-original/bin/tkconfig/defconfig +++ /dev/null @@ -1,150 +0,0 @@ -# -# Automatically generated make config: don't edit -# -CONFIG_PERI_LCONF=y - -# -# Synthesis -# -CONFIG_SYN_GENERIC=y -# CONFIG_SYN_ATC35 is not set -# CONFIG_SYN_ATC25 is not set -# CONFIG_SYN_ATC18 is not set -# CONFIG_SYN_FS90 is not set -# CONFIG_SYN_UMC018 is not set -# CONFIG_SYN_TSMC025 is not set -# CONFIG_SYN_PROASIC is not set -# CONFIG_SYN_AXCEL is not set -# CONFIG_SYN_VIRTEX is not set -# CONFIG_SYN_VIRTEX2 is not set -CONFIG_SYN_INFER_MULT=y -CONFIG_SYN_RFTYPE=y - -# -# Clock generation -# -# CONFIG_PCI_SYSCLK is not set - -# -# Processor -# - -# -# Integer unit -# -CONFIG_IU_NWINDOWS=8 -# CONFIG_IU_V8MULDIV is not set -CONFIG_IU_LDELAY=1 -CONFIG_IU_FASTJUMP=y -CONFIG_IU_ICCHOLD=y -CONFIG_IU_FASTDECODE=y -CONFIG_IU_WATCHPOINTS=0 - -# -# Floating-point unit -# -# CONFIG_FPU_ENABLE is not set - -# -# Co-processor -# -# CONFIG_CP_ENABLE is not set - -# -# Cache system -# - -# -# Instruction cache -# -CONFIG_ICACHE_ASSO1=y -# CONFIG_ICACHE_ASSO2 is not set -# CONFIG_ICACHE_ASSO3 is not set -# CONFIG_ICACHE_ASSO4 is not set -# CONFIG_ICACHE_SZ1 is not set -# CONFIG_ICACHE_SZ2 is not set -CONFIG_ICACHE_SZ4=y -# CONFIG_ICACHE_SZ8 is not set -# CONFIG_ICACHE_SZ16 is not set -# CONFIG_ICACHE_SZ32 is not set -# CONFIG_ICACHE_SZ64 is not set -# CONFIG_ICACHE_LZ16 is not set -CONFIG_ICACHE_LZ32=y - -# -# Data cache -# -CONFIG_DCACHE_ASSO1=y -# CONFIG_DCACHE_ASSO2 is not set -# CONFIG_DCACHE_ASSO3 is not set -# CONFIG_DCACHE_ASSO4 is not set -# CONFIG_DCACHE_SZ1 is not set -# CONFIG_DCACHE_SZ2 is not set -CONFIG_DCACHE_SZ4=y -# CONFIG_DCACHE_SZ8 is not set -# CONFIG_DCACHE_SZ16 is not set -# CONFIG_DCACHE_SZ32 is not set -# CONFIG_DCACHE_SZ64 is not set -# CONFIG_DCACHE_LZ16 is not set -CONFIG_DCACHE_LZ32=y -# CONFIG_DCACHE_LRAM is not set - -# -# MMU -# -# CONFIG_MMU_ENABLE is not set - -# -# Debug support unit -# -# CONFIG_DSU_ENABLE is not set - -# -# AMBA configuration -# -CONFIG_AHB_DEFMST=0 -# CONFIG_AHB_SPLIT is not set - -# -# Memory controller -# -# CONFIG_MCTRL_8BIT is not set -# CONFIG_MCTRL_16BIT is not set -# CONFIG_PERI_WPROT is not set -# CONFIG_MCTRL_WFB is not set -# CONFIG_MCTRL_5CS is not set -# CONFIG_MCTRL_SDRAM is not set - -# -# Peripherals -# -CONFIG_PERI_LCONF=y -# CONFIG_PERI_IRQ2 is not set -# CONFIG_PERI_WDOG is not set -# CONFIG_PERI_AHBSTAT is not set -# CONFIG_AHBRAM_ENABLE is not set - -# -# Ethernet interface -# -# CONFIG_ETH_ENABLE is not set - -# -# PCI interface -# -# CONFIG_PCI_ENABLE is not set - -# -# Boot options -# -CONFIG_BOOT_EXTPROM=y -# CONFIG_BOOT_INTPROM is not set -# CONFIG_BOOT_MIXPROM is not set - -# -# VHDL Debugging -# -# CONFIG_DEBUG_UART is not set -# CONFIG_DEBUG_IURF is not set -# CONFIG_DEBUG_NOHALT is not set -# CONFIG_DEBUG_PC32 is not set diff --git a/grlib-original/bin/tkconfig/header.tk b/grlib-original/bin/tkconfig/header.tk deleted file mode 100644 index 4e81ccc4a..000000000 --- a/grlib-original/bin/tkconfig/header.tk +++ /dev/null @@ -1,645 +0,0 @@ -# FILE: header.tk -# This file is boilerplate TCL/TK function definitions for 'make xconfig'. -# -# CHANGES -# ======= -# -# 8 January 1999, Michael Elizabeth Chastain, -# - Remove unused do_cmd function (part of the 2.0 sound support). -# - Arrange buttons in three columns for better screen fitting. -# - Add CONSTANT_Y, CONSTANT_M, CONSTANT_N for commands like: -# dep_tristate 'foo' CONFIG_FOO m -# -# 23 January 1999, Michael Elizabeth Chastain, -# - Shut vfix the hell up. -# -# 24 January 1999, Michael Elizabeth Chastain, -# - Improve the exit message (Jeff Ronne). - -# -# This is a handy replacement for ".widget cget" that requires neither tk4 -# nor additional source code uglification. -# -proc cget { w option } { - return "[lindex [$w configure $option] 4]" -} - -# -# Function to compensate for broken config.in scripts like the sound driver, -# which make dependencies on variables that are never even conditionally -# defined. -# -proc vfix { var } { - global $var - if [ catch {eval concat $$var} ] { - set $var 4 - } -} - -# -# Constant values used by certain dep_tristate commands. -# -set CONSTANT_Y 1 -set CONSTANT_M 2 -set CONSTANT_N 0 -set CONSTANT_E 4 - -# -# Create a "reference" object to steal colors from. -# -button .ref - -# -# On monochrome displays, -disabledforeground is blank by default; that's -# bad. Fill it with -foreground instead. -# -if { [cget .ref -disabledforeground] == "" } { - .ref configure -disabledforeground [cget .ref -foreground] -} - - -# -# Define some macros we will need to parse the config.in file. -# - -proc mainmenu_name { text } { - wm title . "$text" -} - -proc menu_option { w menu_num text } { - global menus_per_column - global processed_top_level - set processed_top_level [expr $processed_top_level + 1] - if { $processed_top_level <= $menus_per_column } then { - set myframe left - } elseif { $processed_top_level <= [expr 2 * $menus_per_column] } then { - set myframe middle - } else { - set myframe right - } - button .f0.x$menu_num -anchor w -text "$text" \ - -command "$w .$w \"$text\"" - pack .f0.x$menu_num -pady 0 -side top -fill x -in .f0.$myframe -} - -proc load_configfile { w title func } { - catch {destroy $w} - toplevel $w -class Dialog - global loadfile - frame $w.x - label $w.bm -bitmap questhead - pack $w.bm -pady 10 -side top -padx 10 - label $w.x.l -text "Enter filename:" -relief raised - entry $w.x.x -width 35 -relief sunken -borderwidth 2 \ - -textvariable loadfile - pack $w.x.l $w.x.x -anchor w -side left - pack $w.x -side top -pady 10 - wm title $w "$title" - - set oldFocus [focus] - frame $w.f - button $w.f.back -text "OK" -width 20 \ - -command "destroy $w; focus $oldFocus;$func .fileio" - button $w.f.canc -text "Cancel" \ - -width 20 -command "destroy $w; focus $oldFocus" - pack $w.f.back $w.f.canc -side left -pady 10 -padx 45 - pack $w.f -pady 10 -side bottom -padx 10 -anchor w - focus $w - global winx; global winy - set winx [expr [winfo x .]+30]; set winy [expr [winfo y .]+30] - wm geometry $w +$winx+$winy -} - -bind all {maybe_exit .maybe} - -proc maybe_exit { w } { - catch {destroy $w} - toplevel $w -class Dialog - label $w.bm -bitmap questhead - pack $w.bm -pady 10 -side top -padx 10 - message $w.m -width 400 -aspect 300 \ - -text "Changes will be lost. Are you sure?" -relief flat - pack $w.m -pady 10 -side top -padx 10 - wm title $w "Are you sure?" - - set oldFocus [focus] - frame $w.f - button $w.f.back -text "OK" -width 20 \ - -command "exit 1" - button $w.f.canc -text "Cancel" \ - -width 20 -command "destroy $w; focus $oldFocus" - pack $w.f.back $w.f.canc -side left -pady 10 -padx 45 - pack $w.f -pady 10 -side bottom -padx 10 -anchor w - bind $w "exit 1" - bind $w "destroy $w; focus $oldFocus" - focus $w - global winx; global winy - set winx [expr [winfo x .]+30]; set winy [expr [winfo y .]+30] - wm geometry $w +$winx+$winy -} - -proc read_config_file { w } { - global loadfile - if { [string length $loadfile] != 0 && [file readable $loadfile] == 1 } then { - read_config $loadfile - } else { - catch {destroy $w} - toplevel $w -class Dialog - message $w.m -width 400 -aspect 300 -text \ - "Unable to read file $loadfile" \ - -relief raised - label $w.bm -bitmap error - pack $w.bm $w.m -pady 10 -side top -padx 10 - wm title $w "Xconfig Internal Error" - - set oldFocus [focus] - frame $w.f - button $w.f.back -text "Bummer" \ - -width 10 -command "destroy $w; focus $oldFocus" - pack $w.f.back -side bottom -pady 10 -anchor s - pack $w.f -pady 10 -side top -padx 10 -anchor s - focus $w - global winx; global winy - set winx [expr [winfo x .]+30]; set winy [expr [winfo y .]+30] - wm geometry $w +$winx+$winy - } -} - -proc write_config_file { w } { - global loadfile - if { [string length $loadfile] != 0 - && ([file writable $loadfile] == 1 || ([file exists $loadfile] == 0 && [file writable [file dirname $loadfile]] == 1)) } then { - writeconfig $loadfile .null - } else { - catch {destroy $w} - toplevel $w -class Dialog - message $w.m -width 400 -aspect 300 -text \ - "Unable to write file $loadfile" \ - -relief raised - label $w.bm -bitmap error - pack $w.bm $w.m -pady 10 -side top -padx 10 - wm title $w "Xconfig Internal Error" - - set oldFocus [focus] - frame $w.f - button $w.f.back -text "OK" \ - -width 10 -command "destroy $w; focus $oldFocus" - pack $w.f.back -side bottom -pady 10 -anchor s - pack $w.f -pady 10 -side top -padx 10 -anchor s - focus $w - global winx; global winy - set winx [expr [winfo x .]+30]; set winy [expr [winfo y .]+30] - wm geometry $w +$winx+$winy - } -} - -proc read_config { filename } { - set file1 [open $filename r] - clear_choices - while { [gets $file1 line] >= 0} { - if [regexp {([0-9A-Za-z_]+)=([ynm])} $line foo var value] { - if { $value == "y" } then { set cmd "global $var; set $var 1" } - if { $value == "n" } then { set cmd "global $var; set $var 0" } - if { $value == "m" } then { set cmd "global $var; set $var 2" } - eval $cmd - } - if [regexp {# ([0-9A-Za-z_]+) is not set} $line foo var] { - set cmd "global $var; set $var 0" - eval $cmd - } - if [regexp {([0-9A-Za-z_]+)=([0-9A-Fa-f]+)} $line foo var value] { - set cmd "global $var; set $var $value" - eval $cmd - } - if [regexp {([0-9A-Za-z_]+)="([^"]*)"} $line foo var value] { - set cmd "global $var; set $var \"$value\"" - eval $cmd - } - } - close $file1 - update_choices - update_mainmenu -} -proc write_comment { file1 file2 text } { - puts $file1 "" - puts $file1 "#" - puts $file1 "# $text" - puts $file1 "#" - puts $file2 "/*" - puts $file2 " * $text" - puts $file2 " */" -} - -proc effective_dep { deplist } { - global CONFIG_MODULES - set depend 1 - foreach i $deplist { - if {$i == 0} then {set depend 0} - if {$i == 2 && $depend == 1} then {set depend 2} - } - if {$depend == 2 && $CONFIG_MODULES == 0} then {set depend 0} - return $depend -} - -proc sync_tristate { var dep } { - global CONFIG_MODULES - if {$dep == 0 && ($var == 1 || $var == 2)} then { - set var 0 - } elseif {$dep == 2 && $var == 1} then { - set var 2 - } elseif {$var == 2 && $CONFIG_MODULES == 0} then { - if {$dep == 1} then {set var 1} else {set var 0} - } - return $var -} - -proc sync_bool { var dep modset } { - set var [sync_tristate $var $dep] - if {$dep == 2 && $var == 2} then { - set var $modset - } - return $var -} - -proc write_tristate { file1 file2 varname variable deplist modset } { - set variable [sync_tristate $variable [effective_dep $deplist]] - if { $variable == 2 } \ - then { set variable $modset } - if { $variable == 1 } \ - then { puts $file1 "$varname=y"; \ - puts $file2 "#define $varname 1" } \ - elseif { $variable == 2 } \ - then { puts $file1 "$varname=m"; \ - puts $file2 "#undef $varname"; \ - puts $file2 "#define ${varname}_MODULE 1" } \ - elseif { $variable == 0 } \ - then { puts $file1 "# $varname is not set"; \ - puts $file2 "#undef $varname"} \ - else { \ - puts stdout "ERROR - Attempting to write value for unconfigured variable ($varname)." \ - } -} - -proc write_int { file1 file2 varname variable dep } { - if { $dep == 0 } \ - then { puts $file1 "# $varname is not set"; \ - puts $file2 "#undef $varname"} \ - else { - puts $file1 "$varname=$variable"; \ - puts $file2 "#define $varname ($variable)"; \ - } -} - -proc write_hex { file1 file2 varname variable dep } { - if { $dep == 0 } \ - then { puts $file1 "# $varname is not set"; \ - puts $file2 "#undef $varname"} \ - else { - puts $file1 "$varname=$variable"; \ - puts -nonewline $file2 "#define $varname "; \ - puts $file2 [exec echo $variable | sed s/^0\[xX\]//]; \ - } -} - -proc write_string { file1 file2 varname variable dep } { - if { $dep == 0 } \ - then { puts $file1 "# $varname is not set"; \ - puts $file2 "#undef $varname"} \ - else { - puts $file1 "$varname=\"$variable\""; \ - puts $file2 "#define $varname \"$variable\""; \ - } -} - -proc option_name {w mnum line text helpidx} { - button $w.x$line.l -text "$text" -relief groove -anchor w - $w.x$line.l configure -activefore [cget $w.x$line.l -fg] \ - -activeback [cget $w.x$line.l -bg] - button $w.x$line.help -text "Help" -relief raised \ - -command "dohelp .dohelp $helpidx .menu$mnum" - pack $w.x$line.help -side right -fill y - pack $w.x$line.l -side right -fill both -expand on -} - -proc toggle_switch2 {w mnum line text variable} { - frame $w.x$line -relief sunken - radiobutton $w.x$line.y -text "y" -variable $variable -value 1 \ - -relief groove -width 2 -command "update_active" -# radiobutton $w.x$line.m -text "-" -variable $variable -value 2 \ -# -relief groove -width 2 -command "update_active" - radiobutton $w.x$line.n -text "n" -variable $variable -value 0 \ - -relief groove -width 2 -command "update_active" - - option_name $w $mnum $line $text $variable - - pack $w.x$line.n $w.x$line.y -side right -fill y -} - -proc toggle_switch3 {w mnum line text variable} { - frame $w.x$line -relief sunken - radiobutton $w.x$line.y -text "y" -variable $variable -value 1 \ - -relief groove -width 2 -command "update_active" - radiobutton $w.x$line.m -text "m" -variable $variable -value 2 \ - -relief groove -width 2 -command "update_active" - radiobutton $w.x$line.n -text "n" -variable $variable -value 0 \ - -relief groove -width 2 -command "update_active" - - option_name $w $mnum $line $text $variable - - global CONFIG_MODULES - if {($CONFIG_MODULES == 0)} then { - $w.x$line.m configure -state disabled - } - pack $w.x$line.n $w.x$line.m $w.x$line.y -side right -fill y -} - -proc bool {w mnum line text variable} { - toggle_switch2 $w $mnum $line $text $variable -# $w.x$line.m configure -state disabled - pack $w.x$line -anchor w -fill both -expand on -} - -proc tristate {w mnum line text variable } { - toggle_switch3 $w $mnum $line $text $variable - pack $w.x$line -anchor w -fill both -expand on -} - -proc dep_tristate {w mnum line text variable } { - tristate $w $mnum $line $text $variable -} - -proc dep_bool {w mnum line text variable } { - bool $w $mnum $line $text $variable -} - -proc int { w mnum line text variable } { - frame $w.x$line - entry $w.x$line.x -width 11 -relief sunken -borderwidth 2 \ - -textvariable $variable - option_name $w $mnum $line $text $variable - pack $w.x$line.x -anchor w -side right -fill y - pack $w.x$line -anchor w -fill both -expand on -} - -proc hex { w mnum line text variable } { - int $w $mnum $line $text $variable -} - -proc istring { w mnum line text variable } { - frame $w.x$line - entry $w.x$line.x -width 18 -relief sunken -borderwidth 2 \ - -textvariable $variable - option_name $w $mnum $line $text $variable - pack $w.x$line.x -anchor w -side right -fill y - pack $w.x$line -anchor w -fill both -expand on -} - -proc minimenu { w mnum line text variable helpidx } { - frame $w.x$line - menubutton $w.x$line.x -textvariable $variable -menu \ - $w.x$line.x.menu -relief raised \ - -anchor w - option_name $w $mnum $line $text $helpidx - pack $w.x$line.x -anchor w -side right -fill y - pack $w.x$line -anchor w -fill both -expand on -} - -proc menusplit {w m n} { - if { $n > 2 } then { - update idletasks - set menuoptsize [expr [$m yposition 2] - [$m yposition 1]] - set maxsize [winfo screenheight $w] - set splitpoint [expr $maxsize * 4 / 5 / $menuoptsize - 1] - for {set i [expr $splitpoint + 1]} {$i <= $n} {incr i $splitpoint} { - $m entryconfigure $i -columnbreak 1 - } - } -} - -proc menutitle {text menu w} { - wm title $w "$text" -} - -proc submenu { w mnum line text subnum } { - frame $w.x$line - button $w.x$line.l -text "" -width 9 -relief groove - $w.x$line.l configure -activefore [cget $w.x$line.l -fg] \ - -activeback [cget $w.x$line.l -bg] -state disabled - button $w.x$line.m -text "$text" -relief raised -anchor w \ - -command "catch {destroy .menu$subnum}; menu$subnum .menu$subnum \"$text\"" - pack $w.x$line.l -side left -fill both - pack $w.x$line.m -anchor w -side right -fill both -expand on - pack $w.x$line -anchor w -fill both -expand on -} - -proc comment {w mnum line text } { - frame $w.x$line - button $w.x$line.l -text "" -width 15 -relief groove - $w.x$line.l configure -activefore [cget $w.x$line.l -fg] \ - -activeback [cget $w.x$line.l -bg] -state disabled - button $w.x$line.m -text "$text" -relief groove -anchor w - $w.x$line.m configure -activefore [cget $w.x$line.m -fg] \ - -activeback [cget $w.x$line.m -bg] - pack $w.x$line.l -side left -fill both - pack $w.x$line.m -anchor w -side right -fill both -expand on - pack $w.x$line -anchor w -fill both -expand on -} - -proc readhelp {tag fn} { - set message "" - set b 0 - if { [file readable $fn] == 1} then { - set fhandle [open $fn r] - while {[gets $fhandle inline] >= 0} { - if { $b == 0 } { - if { [regexp $tag $inline ] } { - set b 1 - set message "$inline:\n" - } - } else { - if { [regexp {^[^ \t]} $inline]} { - break - } - set message "$message\n$inline" - } - } - close $fhandle - } - return $message -} - -proc dohelp {w var parent} { - catch {destroy $w} - toplevel $w -class Dialog - - set filefound 0 - set found 0 - set lineno 0 - - if { [file readable config.help] == 1} then { - set filefound 1 - # First escape sed regexp special characters in var: - set var [exec echo "$var" | sed s/\[\]\[\/.^$*\]/\\\\&/g] - # Now pick out right help text: - set message [readhelp $var config.help] - set found [expr [string length "$message"] > 0] - } - - frame $w.f1 - pack $w.f1 -fill both -expand on - - # Do the OK button - # - set oldFocus [focus] - frame $w.f2 - button $w.f2.ok -text "OK" \ - -width 10 -command "destroy $w; catch {focus $oldFocus}" - pack $w.f2.ok -side bottom -pady 6 -anchor n - pack $w.f2 -side bottom -padx 10 -anchor s - - scrollbar $w.f1.vscroll -command "$w.f1.canvas yview" - pack $w.f1.vscroll -side right -fill y - - canvas $w.f1.canvas -relief flat -borderwidth 0 \ - -yscrollcommand "$w.f1.vscroll set" - frame $w.f1.f - pack $w.f1.canvas -side right -fill y -expand on - - if { $found == 0 } then { - if { $filefound == 0 } then { - message $w.f1.f.m -width 750 -aspect 300 -relief flat -text \ - "No help available - unable to open file config.help." - } else { - message $w.f1.f.m -width 400 -aspect 300 -relief flat -text \ - "No help available for $var" - } - label $w.f1.bm -bitmap error - wm title $w "RTFM" - } else { - text $w.f1.f.m -width 73 -relief flat -wrap word - $w.f1.f.m insert 0.0 $message - $w.f1.f.m conf -state disabled -height [$w.f1.f.m index end] - - label $w.f1.bm -bitmap info - wm title $w "Configuration help" - } - pack $w.f1.f.m -side left - pack $w.f1.bm $w.f1.f -side left -padx 10 - - focus $w - set winx [expr [winfo x $parent]+20] - set winy [expr [winfo y $parent]+20] - wm geometry $w +$winx+$winy - set sizok [expr [winfo reqheight $w.f2.ok] + 12] - set maxy [expr [winfo screenheight .] * 3 / 4] - set canvtotal [winfo reqheight $w.f1.f.m] - if [expr $sizok + $canvtotal < $maxy] { - set sizy $canvtotal - } else { - set sizy [expr $maxy - $sizok] - } - $w.f1.canvas configure -height $sizy -width [winfo reqwidth $w.f1.f.m] \ - -scrollregion "0 0 [winfo reqwidth $w.f1.f.m] \ - [winfo reqheight $w.f1.f.m]" - $w.f1.canvas create window 0 0 -anchor nw -window $w.f1.f - update idletasks - - set maxy [winfo screenheight .] - if [expr $sizok + $canvtotal < $maxy] { - set sizy [expr $sizok + $canvtotal] - } else { - set sizy $maxy - } - wm maxsize $w [winfo width $w] $sizy -} - -bind all { catch {exec cp -f .config .config.old}; \ - writeconfig .config config.h; wrapup .wrap } - -proc wrapup {w } { - catch {destroy $w} - toplevel $w -class Dialog - - global CONFIG_MODVERSIONS; vfix CONFIG_MODVERSIONS - message $w.m -width 460 -aspect 300 -relief raised -text \ - "End of design configuration. " - label $w.bm -bitmap info - pack $w.bm $w.m -pady 10 -side top -padx 10 - wm title $w "LEON build instructions" - - set oldFocus [focus] - frame $w.f - button $w.f.back -text "OK" \ - -width 10 -command "exit 2" - pack $w.f.back -side bottom -pady 10 -anchor s - pack $w.f -pady 10 -side top -padx 10 -anchor s - focus $w - bind $w "exit 2" - global winx; global winy - set winx [expr [winfo x .]+30]; set winy [expr [winfo y .]+30] - wm geometry $w +$winx+$winy - -} - -proc unregister_active {num} { - global active_menus - set index [lsearch -exact $active_menus $num] - if {$index != -1} then {set active_menus [lreplace $active_menus $index $index]} -} - -proc update_active {} { - global active_menus total_menus - set max 0 - if {[llength $active_menus] > 0} then { - set max [lindex $active_menus end] - update_define [toplevel_menu [lindex $active_menus 0]] $max 0 - } - foreach i $active_menus { - if {[winfo exists .menu$i] == 0} then { - unregister_active $i - } else { - update_menu$i - } - } - update_define [expr $max + 1] $total_menus 1 - update_mainmenu -} - -proc configure_entry {w option items} { - foreach i $items { - $w.$i configure -state $option - } -} - -proc validate_int {name val default} { - if {([exec echo $val | sed s/^-//g | tr -d \[:digit:\] ] != "")} then { - global $name; set $name $default - } -} - -proc validate_hex {name val default} { - if {([exec echo $val | tr -d \[:xdigit:\] ] != "")} then { - global $name; set $name $default - } -} - -proc update_define {first last allow_update} { - for {set i $first} {$i <= $last} {incr i} { - update_define_menu$i - if {$allow_update == 1} then update - } -} - -# -# Next set up the particulars for the top level menu, and define a few -# buttons which we will stick down at the bottom. -# - -frame .f0 -frame .f0.left -frame .f0.middle -frame .f0.right - -set active_menus [list] -set processed_top_level 0 -set ARCH sparc diff --git a/grlib-original/bin/tkconfig/mkdevice.c b/grlib-original/bin/tkconfig/mkdevice.c deleted file mode 100644 index 73e7e8434..000000000 --- a/grlib-original/bin/tkconfig/mkdevice.c +++ /dev/null @@ -1,931 +0,0 @@ -/* mkdevice.c, a utility to generate LEON device.vhd from a config file. - Written by Jiri Gaisler - Copyright Cobham Gaisler, all rights reserved. -*/ - -#include -#include -#include - - -#define VAL(x) strtoul(x,(char **)NULL,0) - -FILE *fp; - -char false[] = "false"; -char true[] = "true"; - -/* Synthesis options */ - -char CONFIG_CFG_NAME[16] = "config"; -char CFG_SYN_TARGET_TECH[128] = "gen"; -char *CONFIG_SYN_INFER_PADS = false; -char *CONFIG_SYN_INFER_PCI_PADS = false; -char *CONFIG_SYN_INFER_RAM = false; -char *CONFIG_SYN_INFER_ROM = false; -char *CONFIG_SYN_INFER_REGF = false; -char *CONFIG_SYN_INFER_MULT = false; -int CONFIG_SYN_RFTYPE = 1; -char CONFIG_TARGET_CLK[128] = "gen"; -int CONFIG_PLL_CLK_MUL = 1; -int CONFIG_PLL_CLK_DIV = 1; -char *CONFIG_PCI_CLKDLL = false; -char *CONFIG_PCI_SYSCLK = false; - -/* IU options */ - -int CONFIG_IU_NWINDOWS = 8; -char CFG_IU_MUL_TYPE[16] = "none"; -char CFG_IU_DIVIDER[16] = "none"; -char *CONFIG_IU_MUL_MAC = false; -char *CONFIG_IU_MULPIPE = false; -char *CONFIG_IU_FASTJUMP = false; -char *CONFIG_IU_ICCHOLD = false; -char *CONFIG_IU_FASTDECODE = false; -char *CONFIG_IU_RFPOW = false; -int CONFIG_IU_LDELAY = 1; -int CONFIG_IU_WATCHPOINTS = 0; - -/* FPU config */ - -int CONFIG_FPU_ENABLE = 0; -char *CFG_FPU_CORE = "meiko"; -char *CFG_FPU_IF = "none"; -int CONFIG_FPU_REGS = 32; -int CONFIG_FPU_VER = 0; - -/* CP config */ - -char CONFIG_CP_CFG[128] = "cp_none"; - -/* cache configuration */ - -int CFG_ICACHE_SZ = 2; -int CFG_ICACHE_LSZ = 16; -int CFG_ICACHE_ASSO = 1; -char *CFG_ICACHE_ALGO = "rnd"; -int CFG_ICACHE_LOCK = 0; -int CFG_DCACHE_SZ = 1; -int CFG_DCACHE_LSZ = 16; -char *CFG_DCACHE_SNOOP = "none"; -int CFG_DCACHE_ASSO = 1; -char *CFG_DCACHE_ALGO = "rnd"; -int CFG_DCACHE_LOCK = 0; -char *CFG_DCACHE_RFAST = false; -char *CFG_DCACHE_WFAST = false; -char *CFG_DCACHE_LRAM = false; -int CFG_DCACHE_LRSZ = 1; -int CFG_DCACHE_LRSTART = 0x8f; - -/* MMU config */ - -int CFG_MMU_ENABLE = 0; -char *CFG_MMU_TYPE = "combinedtlb"; -char *CFG_MMU_REP = "replruarray"; -int CFG_MMU_I = 8; -int CFG_MMU_D = 8; -char *CFG_MMU_DIAG = false; - -/* Memory controller config */ - -char *CONFIG_MCTRL_8BIT = false; -char *CONFIG_MCTRL_16BIT = false; -char *CONFIG_MCTRL_5CS = false; -char *CONFIG_MCTRL_WFB = false; -char *CONFIG_MCTRL_SDRAM = false; -char *CONFIG_MCTRL_SDRAM_INVCLK = false; -char *CONFIG_MCTRL_SDRAM_SEPBUS = false; - -/* Peripherals */ -char *CONFIG_PERI_LCONF = false; -char *CONFIG_PERI_AHBSTAT = false; -char *CONFIG_PERI_WPROT = false; -char *CONFIG_PERI_WDOG = false; -char *CONFIG_PERI_IRQ2 = false; - -/* AHB */ - -int CONFIG_AHB_DEFMST = 0; -char *CONFIG_AHB_SPLIT = false; -char *CONFIG_AHBRAM_ENABLE = false; -int CFG_AHBRAM_SZ = 4; - -/* Debug */ -char *CONFIG_DEBUG_UART = false; -char *CONFIG_DEBUG_IURF = false; -char *CONFIG_DEBUG_FPURF = false; -char *CONFIG_DEBUG_NOHALT = false; -int CFG_DEBUG_PCLOW = 2; -char *CONFIG_DEBUG_RFERR = false; -char *CONFIG_DEBUG_CACHEMEMERR = false; - -/* DSU */ -char *CONFIG_DSU_ENABLE = false; -char *CONFIG_DSU_TRACEBUF = false; -char *CONFIG_DSU_MIXED_TRACE = false; -char *CONFIG_SYN_TRACE_DPRAM = false; -int CFG_DSU_TRACE_SZ = 64; - -/* Boot */ -char *CFG_BOOT_SOURCE = "memory"; -int CONFIG_BOOT_RWS = 0; -int CONFIG_BOOT_WWS = 0; -int CONFIG_BOOT_SYSCLK = 25000000; -int CONFIG_BOOT_BAUDRATE = 19200; -char *CONFIG_BOOT_EXTBAUD = false; -int CONFIG_BOOT_PROMABITS = 11; - -/* Ethernet */ -char *CONFIG_ETH_ENABLE = false; -int CONFIG_ETH_TXFIFO = 8; -int CONFIG_ETH_RXFIFO = 8; -int CONFIG_ETH_BURST = 4; - -/* PCI */ -char *CFG_PCI_CORE = "none"; -char *CONFIG_PCI_ENABLE = false; -int CONFIG_PCI_VENDORID = 0; -int CONFIG_PCI_DEVICEID = 0; -int CONFIG_PCI_SUBSYSID = 0; -int CONFIG_PCI_REVID = 0; -int CONFIG_PCI_CLASSCODE = 0; -int CFG_PCI_FIFO = 8; -int CFG_PCI_TDEPTH = 256; -char *CONFIG_PCI_TRACE = false; -char *CONFIG_PCI_PMEPADS = false; -char *CONFIG_PCI_P66PAD = false; -char *CONFIG_PCI_RESETALL = false; -char *CONFIG_PCI_ARBEN = false; -int pciahbmst = 0; - -/* FT */ - -int CONFIG_FT_ENABLE = 0; -char *CONFIG_FT_RF_ENABLE = false; -char *CONFIG_FT_RF_PARITY = false; -char *CONFIG_FT_RF_EDAC = false; -int CONFIG_FT_RF_PARBITS = 0; -char *CONFIG_FT_RF_WRFAST = false; -char *CONFIG_FT_TMR_REG = false; -char *CONFIG_FT_TMR_CLK = false; -char *CONFIG_FT_MC = false; -char *CONFIG_FT_MEMEDAC = false; -char *CONFIG_FT_CACHEMEM_ENABLE = false; -int CONFIG_FT_CACHEMEM_PARBITS = 0; -char *CONFIG_FT_CACHEMEM_APAR = false; - - -int dsuen, pcien, ahbram, ethen; -char tmps[32]; -int ahbmst = 1; - -int log2(int x) -{ - int i; - - x--; - for (i=0; x!=0; i++) x >>= 1; - return(i); -} - -main() -{ - - char lbuf[1024], *value; - - fp = fopen("device.vhd", "w+"); - if (!fp) { - printf("could not open file device.vhd\n"); - exit(1); - } - while (!feof(stdin)) - { - lbuf[0] = 0; - fgets (lbuf, 1023, stdin); - if (strncmp(lbuf, "CONFIG", 6) == 0) { - value = strchr(lbuf,'='); - value[0] = 0; - value++; - while ((strlen (value) > 0) && - ((value[strlen (value) - 1] == '\n') - || (value[strlen (value) - 1] == '\r') - || (value[strlen (value) - 1] == '"') - )) value[strlen (value) - 1] = 0; - if ((strlen (value) > 0) && (value[0] == '"')) { - value++; - } - - /* synthesis options */ - else if (strcmp("CONFIG_SYN_GENERIC", lbuf) == 0) - strcpy(CFG_SYN_TARGET_TECH, "gen"); - else if (strcmp("CONFIG_SYN_ATC35", lbuf) == 0) - strcpy(CFG_SYN_TARGET_TECH, "atc35"); - else if (strcmp("CONFIG_SYN_ATC25", lbuf) == 0) - strcpy(CFG_SYN_TARGET_TECH, "atc25"); - else if (strcmp("CONFIG_SYN_ATC18", lbuf) == 0) - strcpy(CFG_SYN_TARGET_TECH, "atc18"); - else if (strcmp("CONFIG_SYN_FS90", lbuf) == 0) - strcpy(CFG_SYN_TARGET_TECH, "fs90"); - else if (strcmp("CONFIG_SYN_UMC018", lbuf) == 0) - strcpy(CFG_SYN_TARGET_TECH, "umc18"); - else if (strcmp("CONFIG_SYN_TSMC025", lbuf) == 0) - strcpy(CFG_SYN_TARGET_TECH, "tsmc25"); - else if (strcmp("CONFIG_SYN_PROASIC", lbuf) == 0) - strcpy(CFG_SYN_TARGET_TECH, "proasic"); - else if (strcmp("CONFIG_SYN_AXCEL", lbuf) == 0) - strcpy(CFG_SYN_TARGET_TECH, "axcel"); - else if (strcmp("CONFIG_SYN_VIRTEX", lbuf) == 0) - strcpy(CFG_SYN_TARGET_TECH, "virtex"); - else if (strcmp("CONFIG_SYN_VIRTEX2", lbuf) == 0) - strcpy(CFG_SYN_TARGET_TECH, "virtex2"); - else if (strcmp("CONFIG_SYN_INFER_PADS", lbuf) == 0) - CONFIG_SYN_INFER_PADS = true; - else if (strcmp("CONFIG_SYN_INFER_PCI_PADS", lbuf) == 0) - CONFIG_SYN_INFER_PCI_PADS = true; - else if (strcmp("CONFIG_SYN_INFER_RAM", lbuf) == 0) - CONFIG_SYN_INFER_RAM = true; - else if (strcmp("CONFIG_SYN_INFER_ROM", lbuf) == 0) - CONFIG_SYN_INFER_ROM = true; - else if (strcmp("CONFIG_SYN_INFER_REGF", lbuf) == 0) - CONFIG_SYN_INFER_REGF = true; - else if (strcmp("CONFIG_SYN_INFER_MULT", lbuf) == 0) - CONFIG_SYN_INFER_MULT = true; - else if (strcmp("CONFIG_SYN_RFTYPE", lbuf) == 0) - CONFIG_SYN_RFTYPE = 2; - else if (strcmp("CONFIG_SYN_TRACE_DPRAM", lbuf) == 0) - CONFIG_SYN_TRACE_DPRAM = true; - else if (strcmp("CONFIG_CLK_VIRTEX", lbuf) == 0) - strcpy(CONFIG_TARGET_CLK, "virtex"); - else if (strcmp("CONFIG_AXCEL_HCLKBUF", lbuf) == 0) - strcpy(CONFIG_TARGET_CLK, "axcel"); - else if (strcmp("CONFIG_CLKDLL_1_2", lbuf) == 0) { - CONFIG_PLL_CLK_MUL = 1; CONFIG_PLL_CLK_DIV = 2; - } else if (strcmp("CONFIG_CLKDLL_1_1", lbuf) == 0) { - CONFIG_PLL_CLK_MUL = 1; CONFIG_PLL_CLK_DIV = 1; - } else if (strcmp("CONFIG_CLKDLL_2_1", lbuf) == 0) { - CONFIG_PLL_CLK_MUL = 2; CONFIG_PLL_CLK_DIV = 1; - } else if (strcmp("CONFIG_CLK_VIRTEX2", lbuf) == 0) - strcpy(CONFIG_TARGET_CLK, "virtex2"); - else if (strcmp("CONFIG_DCM_2_3", lbuf) == 0) { - CONFIG_PLL_CLK_MUL = 2; CONFIG_PLL_CLK_DIV = 3; - } else if (strcmp("CONFIG_DCM_3_4", lbuf) == 0) { - CONFIG_PLL_CLK_MUL = 3; CONFIG_PLL_CLK_DIV = 4; - } else if (strcmp("CONFIG_DCM_4_5", lbuf) == 0) { - CONFIG_PLL_CLK_MUL = 4; CONFIG_PLL_CLK_DIV = 5; - } else if (strcmp("CONFIG_DCM_1_1", lbuf) == 0) { - CONFIG_PLL_CLK_MUL = 2; CONFIG_PLL_CLK_DIV = 2; - } else if (strcmp("CONFIG_DCM_5_4", lbuf) == 0) { - CONFIG_PLL_CLK_MUL = 5; CONFIG_PLL_CLK_DIV = 4; - } else if (strcmp("CONFIG_DCM_4_3", lbuf) == 0) { - CONFIG_PLL_CLK_MUL = 4; CONFIG_PLL_CLK_DIV = 3; - } else if (strcmp("CONFIG_DCM_3_2", lbuf) == 0) { - CONFIG_PLL_CLK_MUL = 3; CONFIG_PLL_CLK_DIV = 2; - } else if (strcmp("CONFIG_DCM_5_3", lbuf) == 0) { - CONFIG_PLL_CLK_MUL = 5; CONFIG_PLL_CLK_DIV = 3; - } else if (strcmp("CONFIG_DCM_2_1", lbuf) == 0) { - CONFIG_PLL_CLK_MUL = 2; CONFIG_PLL_CLK_DIV = 1; - } else if (strcmp("CONFIG_DCM_3_1", lbuf) == 0) { - CONFIG_PLL_CLK_MUL = 3; CONFIG_PLL_CLK_DIV = 1; - } else if (strcmp("CONFIG_DCM_4_1", lbuf) == 0) { - CONFIG_PLL_CLK_MUL = 4; CONFIG_PLL_CLK_DIV = 1; - } else if (strcmp("CONFIG_PCI_DLL", lbuf) == 0) - CONFIG_PCI_CLKDLL = true; - else if (strcmp("CONFIG_PCI_SYSCLK", lbuf) == 0) - CONFIG_PCI_SYSCLK = true; - /* IU options */ - else if (strcmp("CONFIG_IU_NWINDOWS", lbuf) == 0) { - CONFIG_IU_NWINDOWS = VAL(value); - if ((CONFIG_IU_NWINDOWS > 32) || (CONFIG_IU_NWINDOWS < 1)) - CONFIG_IU_NWINDOWS = 8; - } else if (strcmp("CONFIG_IU_V8MULDIV", lbuf) == 0) - strcpy(CFG_IU_DIVIDER, "radix2"); - else if (strcmp("CONFIG_IU_MUL_LATENCY_1", lbuf) == 0) - strcpy(CFG_IU_MUL_TYPE, "m32x32"); - else if (strcmp("CONFIG_IU_MUL_LATENCY_2", lbuf) == 0) - strcpy(CFG_IU_MUL_TYPE, "m32x16"); - else if (strcmp("CONFIG_IU_MUL_LATENCY_4", lbuf) == 0) - strcpy(CFG_IU_MUL_TYPE, "m16x16"); - else if (strcmp("CONFIG_IU_MUL_LATENCY_5", lbuf) == 0) { - strcpy(CFG_IU_MUL_TYPE, "m16x16"); - CONFIG_IU_MULPIPE = true; - } - else if (strcmp("CONFIG_IU_MUL_LATENCY_35", lbuf) == 0) - strcpy(CFG_IU_MUL_TYPE, "iterative"); - else if (strcmp("CONFIG_IU_MUL_MAC", lbuf) == 0) { - strcpy(CFG_IU_MUL_TYPE, "m16x16"); - CONFIG_IU_MUL_MAC = true; - } - else if (strcmp("CONFIG_IU_FASTJUMP", lbuf) == 0) - CONFIG_IU_FASTJUMP = true; - else if (strcmp("CONFIG_IU_FASTDECODE", lbuf) == 0) - CONFIG_IU_FASTDECODE = true; - else if (strcmp("CONFIG_IU_RFPOW", lbuf) == 0) - CONFIG_IU_RFPOW = true; - else if (strcmp("CONFIG_IU_ICCHOLD", lbuf) == 0) - CONFIG_IU_ICCHOLD = true; - else if (strcmp("CONFIG_IU_LDELAY", lbuf) == 0) { - CONFIG_IU_LDELAY = VAL(value); - if ((CONFIG_IU_LDELAY > 2) || (CONFIG_IU_LDELAY < 1)) - CONFIG_IU_LDELAY = 2; - } else if (strcmp("CONFIG_IU_WATCHPOINTS", lbuf) == 0) { - CONFIG_IU_WATCHPOINTS = VAL(value); - if ((CONFIG_IU_WATCHPOINTS > 4) || (CONFIG_IU_WATCHPOINTS < 0)) - CONFIG_IU_WATCHPOINTS = 0; - /* FPU config */ - } else if (strcmp("CONFIG_FPU_ENABLE", lbuf) == 0) - CONFIG_FPU_ENABLE = 1; - else if (strcmp("CONFIG_FPU_GRFPU", lbuf) == 0) { - CFG_FPU_CORE = "grfpu"; CFG_FPU_IF = "parallel"; - CONFIG_FPU_REGS = 0; - } else if (strcmp("CONFIG_FPU_MEIKO", lbuf) == 0) { - CFG_FPU_CORE = "meiko"; CFG_FPU_IF = "serial"; - } else if (strcmp("CONFIG_FPU_LTH", lbuf) == 0) { - CFG_FPU_CORE = "lth"; CFG_FPU_IF = "serial"; - } else if (strcmp("CONFIG_FPU_VER", lbuf) == 0) - CONFIG_FPU_VER = VAL(value) & 0x07; - /* CP config */ - else if (strcmp("CONFIG_CP_ENABLE", lbuf) == 0) {} - else if (strcmp("CONFIG_CP_CFG", lbuf) == 0) - strcpy(CONFIG_CP_CFG, value); - /* cache config */ - else if (strcmp("CONFIG_ICACHE_ASSO1", lbuf) == 0) - CFG_ICACHE_ASSO = 1; - else if (strcmp("CONFIG_ICACHE_ASSO2", lbuf) == 0) - CFG_ICACHE_ASSO = 2; - else if (strcmp("CONFIG_ICACHE_ASSO3", lbuf) == 0) - CFG_ICACHE_ASSO = 3; - else if (strcmp("CONFIG_ICACHE_ASSO4", lbuf) == 0) - CFG_ICACHE_ASSO = 4; - else if (strcmp("CONFIG_ICACHE_ALGORND", lbuf) == 0) - CFG_ICACHE_ALGO = "rnd"; - else if (strcmp("CONFIG_ICACHE_ALGOLRR", lbuf) == 0) - CFG_ICACHE_ALGO = "lrr"; - else if (strcmp("CONFIG_ICACHE_ALGOLRU", lbuf) == 0) - CFG_ICACHE_ALGO = "lru"; - else if (strcmp("CONFIG_ICACHE_LOCK", lbuf) == 0) - CFG_ICACHE_LOCK = 1; - else if (strcmp("CONFIG_ICACHE_SZ1", lbuf) == 0) - CFG_ICACHE_SZ = 1; - else if (strcmp("CONFIG_ICACHE_SZ2", lbuf) == 0) - CFG_ICACHE_SZ = 2; - else if (strcmp("CONFIG_ICACHE_SZ4", lbuf) == 0) - CFG_ICACHE_SZ = 4; - else if (strcmp("CONFIG_ICACHE_SZ8", lbuf) == 0) - CFG_ICACHE_SZ = 8; - else if (strcmp("CONFIG_ICACHE_SZ16", lbuf) == 0) - CFG_ICACHE_SZ = 16; - else if (strcmp("CONFIG_ICACHE_SZ32", lbuf) == 0) - CFG_ICACHE_SZ = 32; - else if (strcmp("CONFIG_ICACHE_SZ64", lbuf) == 0) - CFG_ICACHE_SZ = 64; - else if (strcmp("CONFIG_ICACHE_LZ16", lbuf) == 0) - CFG_ICACHE_LSZ = 16; - else if (strcmp("CONFIG_ICACHE_LZ32", lbuf) == 0) - CFG_ICACHE_LSZ = 32; - else if (strcmp("CONFIG_DCACHE_SZ1", lbuf) == 0) - CFG_DCACHE_SZ = 1; - else if (strcmp("CONFIG_DCACHE_SZ2", lbuf) == 0) - CFG_DCACHE_SZ = 2; - else if (strcmp("CONFIG_DCACHE_SZ4", lbuf) == 0) - CFG_DCACHE_SZ = 4; - else if (strcmp("CONFIG_DCACHE_SZ8", lbuf) == 0) - CFG_DCACHE_SZ = 8; - else if (strcmp("CONFIG_DCACHE_SZ16", lbuf) == 0) - CFG_DCACHE_SZ = 16; - else if (strcmp("CONFIG_DCACHE_SZ32", lbuf) == 0) - CFG_DCACHE_SZ = 32; - else if (strcmp("CONFIG_DCACHE_SZ64", lbuf) == 0) - CFG_DCACHE_SZ = 64; - else if (strcmp("CONFIG_DCACHE_LZ16", lbuf) == 0) - CFG_DCACHE_LSZ = 16; - else if (strcmp("CONFIG_DCACHE_LZ32", lbuf) == 0) - CFG_DCACHE_LSZ = 32; - else if (strcmp("CONFIG_DCACHE_SNOOP_SLOW", lbuf) == 0) - CFG_DCACHE_SNOOP = "slow"; - else if (strcmp("CONFIG_DCACHE_SNOOP_FAST", lbuf) == 0) - CFG_DCACHE_SNOOP = "fast"; - else if (strcmp("CONFIG_DCACHE_SNOOP", lbuf) == 0) {} - else if (strcmp("CONFIG_DCACHE_ASSO1", lbuf) == 0) - CFG_DCACHE_ASSO = 1; - else if (strcmp("CONFIG_DCACHE_ASSO2", lbuf) == 0) - CFG_DCACHE_ASSO = 2; - else if (strcmp("CONFIG_DCACHE_ASSO3", lbuf) == 0) - CFG_DCACHE_ASSO = 3; - else if (strcmp("CONFIG_DCACHE_ASSO4", lbuf) == 0) - CFG_DCACHE_ASSO = 4; - else if (strcmp("CONFIG_DCACHE_ALGORND", lbuf) == 0) - CFG_DCACHE_ALGO = "rnd"; - else if (strcmp("CONFIG_DCACHE_ALGOLRR", lbuf) == 0) - CFG_DCACHE_ALGO = "lrr"; - else if (strcmp("CONFIG_DCACHE_ALGOLRU", lbuf) == 0) - CFG_DCACHE_ALGO = "lru"; - else if (strcmp("CONFIG_DCACHE_LOCK", lbuf) == 0) - CFG_DCACHE_LOCK = 1; - else if (strcmp("CONFIG_DCACHE_RFAST", lbuf) == 0) - CFG_DCACHE_RFAST = true; - else if (strcmp("CONFIG_DCACHE_WFAST", lbuf) == 0) - CFG_DCACHE_WFAST = true; - else if (strcmp("CONFIG_DCACHE_LRAM", lbuf) == 0) - CFG_DCACHE_LRAM = true; - else if (strcmp("CONFIG_DCACHE_LRAM_SZ1", lbuf) == 0) - CFG_DCACHE_LRSZ = 1; - else if (strcmp("CONFIG_DCACHE_LRAM_SZ2", lbuf) == 0) - CFG_DCACHE_LRSZ = 2; - else if (strcmp("CONFIG_DCACHE_LRAM_SZ4", lbuf) == 0) - CFG_DCACHE_LRSZ = 4; - else if (strcmp("CONFIG_DCACHE_LRAM_SZ8", lbuf) == 0) - CFG_DCACHE_LRSZ = 8; - else if (strcmp("CONFIG_DCACHE_LRAM_SZ16", lbuf) == 0) - CFG_DCACHE_LRSZ = 16; - else if (strcmp("CONFIG_DCACHE_LRAM_SZ32", lbuf) == 0) - CFG_DCACHE_LRSZ = 32; - else if (strcmp("CONFIG_DCACHE_LRAM_SZ64", lbuf) == 0) - CFG_DCACHE_LRSZ = 64; - else if (strcmp("CONFIG_DCACHE_LRSTART", lbuf) == 0) { - strcpy(tmps, "0x"); strcat(tmps, value); - CFG_DCACHE_LRSTART = VAL(tmps) & 0x0ff; - } else if (strcmp("CONFIG_MMU_ENABLE", lbuf) == 0) - CFG_MMU_ENABLE = 1; - else if (strcmp("CONFIG_MMU_DIAG", lbuf) == 0) - CFG_MMU_DIAG = true; - else if (strcmp("CONFIG_MMU_SPLIT", lbuf) == 0) - CFG_MMU_TYPE = "splittlb"; - else if (strcmp("CONFIG_MMU_COMBINED", lbuf) == 0) - CFG_MMU_TYPE = "combinedtlb"; - else if (strcmp("CONFIG_MMU_REPARRAY", lbuf) == 0) - CFG_MMU_REP = "replruarray"; - else if (strcmp("CONFIG_MMU_REPINCREMENT", lbuf) == 0) - CFG_MMU_REP = "repincrement"; - else if (strcmp("CONFIG_MMU_I2", lbuf) == 0) - CFG_MMU_I = 2; - else if (strcmp("CONFIG_MMU_I4", lbuf) == 0) - CFG_MMU_I = 4; - else if (strcmp("CONFIG_MMU_I8", lbuf) == 0) - CFG_MMU_I = 8; - else if (strcmp("CONFIG_MMU_I16", lbuf) == 0) - CFG_MMU_I = 16; - else if (strcmp("CONFIG_MMU_I32", lbuf) == 0) - CFG_MMU_I = 32; - else if (strcmp("CONFIG_MMU_D1", lbuf) == 0) - CFG_MMU_D = 1; - else if (strcmp("CONFIG_MMU_D2", lbuf) == 0) - CFG_MMU_D = 2; - else if (strcmp("CONFIG_MMU_D4", lbuf) == 0) - CFG_MMU_D = 4; - else if (strcmp("CONFIG_MMU_D8", lbuf) == 0) - CFG_MMU_D = 8; - else if (strcmp("CONFIG_MMU_D16", lbuf) == 0) - CFG_MMU_D = 16; - else if (strcmp("CONFIG_MMU_D32", lbuf) == 0) - CFG_MMU_D = 32; - - /* CP config */ - else if (strcmp("CONFIG_CP_ENABLE", lbuf) == 0) {} - /* Memory controller */ - else if (strcmp("CONFIG_MCTRL_8BIT", lbuf) == 0) - CONFIG_MCTRL_8BIT = true; - else if (strcmp("CONFIG_MCTRL_16BIT", lbuf) == 0) - CONFIG_MCTRL_16BIT = true; - else if (strcmp("CONFIG_MCTRL_5CS", lbuf) == 0) - CONFIG_MCTRL_5CS = true; - else if (strcmp("CONFIG_MCTRL_WFB", lbuf) == 0) - CONFIG_MCTRL_WFB = true; - else if (strcmp("CONFIG_MCTRL_SDRAM", lbuf) == 0) - CONFIG_MCTRL_SDRAM = true; - else if (strcmp("CONFIG_MCTRL_SDRAM_INVCLK", lbuf) == 0) - CONFIG_MCTRL_SDRAM_INVCLK = true; - else if (strcmp("CONFIG_MCTRL_SDRAM_SEPBUS", lbuf) == 0) - CONFIG_MCTRL_SDRAM_SEPBUS = true; - /* Peripherals */ - else if (strcmp("CONFIG_PERI_LCONF", lbuf) == 0) - CONFIG_PERI_LCONF = true; - else if (strcmp("CONFIG_PERI_AHBSTAT", lbuf) == 0) - CONFIG_PERI_AHBSTAT = true; - else if (strcmp("CONFIG_PERI_WPROT", lbuf) == 0) - CONFIG_PERI_WPROT = true; - else if (strcmp("CONFIG_PERI_WDOG", lbuf) == 0) - CONFIG_PERI_WDOG = true; - else if (strcmp("CONFIG_PERI_IRQ2", lbuf) == 0) - CONFIG_PERI_IRQ2 = true; - /* AHB */ - else if (strcmp("CONFIG_AHB_DEFMST", lbuf) == 0) - CONFIG_AHB_DEFMST = VAL(value); - else if (strcmp("CONFIG_AHB_SPLIT", lbuf) == 0) - CONFIG_AHB_SPLIT = true; - else if (strcmp("CONFIG_AHBRAM_ENABLE", lbuf) == 0) - CONFIG_AHBRAM_ENABLE = true; - else if (strcmp("CONFIG_AHBRAM_SZ1", lbuf) == 0) - CFG_AHBRAM_SZ = 1; - else if (strcmp("CONFIG_AHBRAM_SZ2", lbuf) == 0) - CFG_AHBRAM_SZ = 2; - else if (strcmp("CONFIG_AHBRAM_SZ4", lbuf) == 0) - CFG_AHBRAM_SZ = 3; - else if (strcmp("CONFIG_AHBRAM_SZ8", lbuf) == 0) - CFG_AHBRAM_SZ = 4; - else if (strcmp("CONFIG_AHBRAM_SZ16", lbuf) == 0) - CFG_AHBRAM_SZ = 5; - else if (strcmp("CONFIG_AHBRAM_SZ32", lbuf) == 0) - CFG_AHBRAM_SZ = 6; - else if (strcmp("CONFIG_AHBRAM_SZ64", lbuf) == 0) - CFG_AHBRAM_SZ = 7; - /* Debug */ - else if (strcmp("CONFIG_DEBUG_UART", lbuf) == 0) - CONFIG_DEBUG_UART = true; - else if (strcmp("CONFIG_DEBUG_IURF", lbuf) == 0) - CONFIG_DEBUG_IURF = true; - else if (strcmp("CONFIG_DEBUG_FPURF", lbuf) == 0) - CONFIG_DEBUG_FPURF = true; - else if (strcmp("CONFIG_DEBUG_NOHALT", lbuf) == 0) - CONFIG_DEBUG_NOHALT = true; - else if (strcmp("CONFIG_DEBUG_PC32", lbuf) == 0) - CFG_DEBUG_PCLOW = 0; - else if (strcmp("CONFIG_DEBUG_RFERR", lbuf) == 0) - CONFIG_DEBUG_RFERR = true; - else if (strcmp("CONFIG_DEBUG_CACHEMEMERR", lbuf) == 0) - CONFIG_DEBUG_CACHEMEMERR = true; - /* DSU */ - else if (strcmp("CONFIG_DSU_ENABLE", lbuf) == 0) - {CONFIG_DSU_ENABLE = true; ahbmst ++;} - else if (strcmp("CONFIG_DSU_TRACEBUF", lbuf) == 0) - CONFIG_DSU_TRACEBUF = true; - else if (strcmp("CONFIG_DSU_MIXED_TRACE", lbuf) == 0) - CONFIG_DSU_MIXED_TRACE = true; - else if (strcmp("CONFIG_DSU_TRACESZ64", lbuf) == 0) - CFG_DSU_TRACE_SZ = 64; - else if (strcmp("CONFIG_DSU_TRACESZ128", lbuf) == 0) - CFG_DSU_TRACE_SZ = 128; - else if (strcmp("CONFIG_DSU_TRACESZ256", lbuf) == 0) - CFG_DSU_TRACE_SZ = 256; - else if (strcmp("CONFIG_DSU_TRACESZ512", lbuf) == 0) - CFG_DSU_TRACE_SZ = 512; - else if (strcmp("CONFIG_DSU_TRACESZ1024", lbuf) == 0) - CFG_DSU_TRACE_SZ = 1024; - /* Boot */ - else if (strcmp("CONFIG_BOOT_EXTPROM", lbuf) == 0) - CFG_BOOT_SOURCE = "memory"; - else if (strcmp("CONFIG_BOOT_INTPROM", lbuf) == 0) - CFG_BOOT_SOURCE = "prom"; - else if (strcmp("CONFIG_BOOT_MIXPROM", lbuf) == 0) - CFG_BOOT_SOURCE = "dual"; - else if (strcmp("CONFIG_BOOT_RWS", lbuf) == 0) - CONFIG_BOOT_RWS = VAL(value) & 0x3; - else if (strcmp("CONFIG_BOOT_WWS", lbuf) == 0) - CONFIG_BOOT_WWS = VAL(value) & 0x3; - else if (strcmp("CONFIG_BOOT_SYSCLK", lbuf) == 0) - CONFIG_BOOT_SYSCLK = VAL(value); - else if (strcmp("CONFIG_BOOT_BAUDRATE", lbuf) == 0) - CONFIG_BOOT_BAUDRATE = VAL(value) & 0x3fffff; - else if (strcmp("CONFIG_BOOT_EXTBAUD", lbuf) == 0) - CONFIG_BOOT_EXTBAUD = true; - else if (strcmp("CONFIG_BOOT_PROMABITS", lbuf) == 0) - CONFIG_BOOT_PROMABITS = VAL(value) & 0x3f; - /* Ethernet */ - else if (strcmp("CONFIG_ETH_ENABLE", lbuf) == 0) - { CONFIG_ETH_ENABLE = true; ahbmst++;} - else if (strcmp("CONFIG_ETH_TXFIFO", lbuf) == 0) - { CONFIG_ETH_TXFIFO = VAL(value) & 0x0ffff; } - else if (strcmp("CONFIG_ETH_RXFIFO", lbuf) == 0) - { CONFIG_ETH_RXFIFO = VAL(value) & 0x0ffff; } - else if (strcmp("CONFIG_ETH_BURST", lbuf) == 0) - { CONFIG_ETH_BURST = VAL(value) & 0x0ffff; } - /* PCI */ - else if (strcmp("CONFIG_PCI_ENABLE", lbuf) == 0) - CONFIG_PCI_ENABLE = true; - else if (strcmp("CONFIG_PCI_SIMPLE_TARGET", lbuf) == 0) - { - CFG_PCI_CORE = "simple_target"; ahbmst++; pciahbmst = 1; - } - else if (strcmp("CONFIG_PCI_FAST_TARGET", lbuf) == 0) - { - CFG_PCI_CORE = "fast_target"; ahbmst++; pciahbmst = 1; - } - else if (strcmp("CONFIG_PCI_MASTER_TARGET", lbuf) == 0) - { - CFG_PCI_CORE = "master_target"; ahbmst++; pciahbmst = 1; - } - else if (strcmp("CONFIG_PCI_VENDORID", lbuf) == 0) - { - strcpy(tmps, "0x"); strcat(tmps, value); - CONFIG_PCI_VENDORID = VAL(tmps) & 0x0ffff; - } - else if (strcmp("CONFIG_PCI_DEVICEID", lbuf) == 0) - { - strcpy(tmps, "0x"); strcat(tmps, value); - CONFIG_PCI_DEVICEID = VAL(tmps) & 0x0ffff; - } - else if (strcmp("CONFIG_PCI_SUBSYSID", lbuf) == 0) - { - strcpy(tmps, "0x"); strcat(tmps, value); - CONFIG_PCI_SUBSYSID = VAL(tmps) & 0x0ffff; - } - else if (strcmp("CONFIG_PCI_REVID", lbuf) == 0) - { - strcpy(tmps, "0x"); strcat(tmps, value); - CONFIG_PCI_REVID = VAL(tmps) & 0x0ff; - } - else if (strcmp("CONFIG_PCI_CLASSCODE", lbuf) == 0) - { - strcpy(tmps, "0x"); strcat(tmps, value); - CONFIG_PCI_CLASSCODE = VAL(tmps) & 0x0ffffff; - } - else if (strcmp("CONFIG_PCI_TRACE256", lbuf) == 0) - CFG_PCI_TDEPTH = 8; - else if (strcmp("CONFIG_PCI_TRACE512", lbuf) == 0) - CFG_PCI_TDEPTH = 9; - else if (strcmp("CONFIG_PCI_TRACE1024", lbuf) == 0) - CFG_PCI_TDEPTH = 10; - else if (strcmp("CONFIG_PCI_TRACE2048", lbuf) == 0) - CFG_PCI_TDEPTH = 11; - else if (strcmp("CONFIG_PCI_TRACE4096", lbuf) == 0) - CFG_PCI_TDEPTH = 12; - else if (strcmp("CONFIG_PCI_TRACE", lbuf) == 0) - CONFIG_PCI_TRACE = true; - else if (strcmp("CONFIG_PCI_FIFO2", lbuf) == 0) - CFG_PCI_FIFO = 1; - else if (strcmp("CONFIG_PCI_FIFO4", lbuf) == 0) - CFG_PCI_FIFO = 2; - else if (strcmp("CONFIG_PCI_FIFO8", lbuf) == 0) - CFG_PCI_FIFO = 3; - else if (strcmp("CONFIG_PCI_FIFO16", lbuf) == 0) - CFG_PCI_FIFO = 4; - else if (strcmp("CONFIG_PCI_FIFO32", lbuf) == 0) - CFG_PCI_FIFO = 5; - else if (strcmp("CONFIG_PCI_FIFO64", lbuf) == 0) - CFG_PCI_FIFO = 6; - else if (strcmp("CONFIG_PCI_FIFO128", lbuf) == 0) - CFG_PCI_FIFO = 7; - else if (strcmp("CONFIG_PCI_PMEPADS", lbuf) == 0) - CONFIG_PCI_PMEPADS = true; - else if (strcmp("CONFIG_PCI_P66PAD", lbuf) == 0) - CONFIG_PCI_P66PAD = true; - else if (strcmp("CONFIG_PCI_RESETALL", lbuf) == 0) - CONFIG_PCI_RESETALL = true; - else if (strcmp("CONFIG_PCI_ARBEN", lbuf) == 0) - CONFIG_PCI_ARBEN = true; - /* FT */ - else if (strcmp("CONFIG_FT_ENABLE", lbuf) == 0) - CONFIG_FT_ENABLE = 1; - else if (strcmp("CONFIG_FT_RF_ENABLE", lbuf) == 0) - CONFIG_FT_RF_ENABLE = true; - else if (strcmp("CONFIG_FT_RF_PARITY", lbuf) == 0) - CONFIG_FT_RF_PARITY = true; - else if (strcmp("CONFIG_FT_RF_EDAC", lbuf) == 0) - CONFIG_FT_RF_PARBITS = 7; - else if (strcmp("CONFIG_FT_RF_PARBITS", lbuf) == 0) - CONFIG_FT_RF_PARBITS = abs(VAL(value) % 3) ; - else if (strcmp("CONFIG_FT_RF_WRFAST", lbuf) == 0) - CONFIG_FT_RF_WRFAST = true; - else if (strcmp("CONFIG_FT_TMR_REG", lbuf) == 0) - CONFIG_FT_TMR_REG = true; - else if (strcmp("CONFIG_FT_TMR_CLK", lbuf) == 0) - CONFIG_FT_TMR_CLK = true; - else if (strcmp("CONFIG_FT_MC", lbuf) == 0) - CONFIG_FT_MC = true; - else if (strcmp("CONFIG_FT_MEMEDAC", lbuf) == 0) - CONFIG_FT_MEMEDAC = true; - else if (strcmp("CONFIG_FT_CACHEMEM_ENABLE", lbuf) == 0) - CONFIG_FT_CACHEMEM_ENABLE = true; - else if (strcmp("CONFIG_FT_CACHEMEM_PARBITS", lbuf) == 0) - CONFIG_FT_CACHEMEM_PARBITS = abs(VAL(value) % 3) ; - else if (strcmp("CONFIG_FT_CACHEMEM_APAR", lbuf) == 0) - CONFIG_FT_CACHEMEM_APAR = true; - else if (strcmp("CONFIG_FT_CACHEMEM_ENABLE", lbuf) == 0) {} - else - fprintf(stderr, "unknown config option: %s = %s\n", lbuf, value); - - } - } - - fprintf(fp, "\n\ -----------------------------------------------------------------------------\n\ --- This file is a part of the LEON VHDL model\n\ --- Copyright (C) 1999 European Space Agency (ESA)\n\ ---\n\ --- This library is free software; you can redistribute it and/or\n\ --- modify it under the terms of the GNU Lesser General Public\n\ --- License as published by the Free Software Foundation; either\n\ --- version 2 of the License, or (at your option) any later version.\n\ ---\n\ --- See the file COPYING.LGPL for the full details of the license.\n\ -\n\ -\n\ ------------------------------------------------------------------------------\n\ --- Entity: device\n\ --- File: device.vhd\n\ --- Author: Jiri Gaisler - Gaisler Research\n\ --- Description: package to select current device configuration\n\ -------------------------------------------------------------------------------\n\ -\n\ -library IEEE;\n\ -use IEEE.std_logic_1164.all;\n\ -use work.target.all;\n\ -\n\ -package device is\n\ -\n\ ------------------------------------------------------------------------------\n\ --- Automatically generated by tkonfig/mkdevice\n\ ------------------------------------------------------------------------------\n\ -"); - - if (CONFIG_AHBRAM_ENABLE == true) ahbram = 4; else ahbram = 0; - if (CONFIG_DSU_ENABLE == true) dsuen = 2; else dsuen = 7; - if (CONFIG_PCI_ENABLE == true) pcien = 3; else pcien = 7; - if (CONFIG_ETH_ENABLE == true) ethen = 5; else ethen = 7; - - fprintf(fp, "\n\ - constant syn_%s : syn_config_type := ( \n\ - targettech => %s , infer_pads => %s, infer_pci => %s,\n\ - infer_ram => %s, infer_regf => %s, infer_rom => %s,\n\ - infer_mult => %s, rftype => %d, targetclk => %s,\n\ - clk_mul => %d, clk_div => %d, pci_dll => %s, pci_sysclk => %s );\n\ -", CONFIG_CFG_NAME, CFG_SYN_TARGET_TECH, CONFIG_SYN_INFER_PADS, CONFIG_SYN_INFER_PCI_PADS, \ - CONFIG_SYN_INFER_RAM, CONFIG_SYN_INFER_REGF, CONFIG_SYN_INFER_ROM,\ - CONFIG_SYN_INFER_MULT, CONFIG_SYN_RFTYPE, CONFIG_TARGET_CLK, - CONFIG_PLL_CLK_MUL, CONFIG_PLL_CLK_DIV, CONFIG_PCI_CLKDLL, - CONFIG_PCI_SYSCLK); - - fprintf(fp, "\n\ - constant iu_%s : iu_config_type := (\n\ - nwindows => %d, multiplier => %s, mulpipe => %s, \n\ - divider => %s, mac => %s, fpuen => %d, cpen => false, \n\ - fastjump => %s, icchold => %s, lddelay => %d, fastdecode => %s, \n\ - rflowpow => %s, watchpoints => %d);\n\ -", CONFIG_CFG_NAME, CONFIG_IU_NWINDOWS, CFG_IU_MUL_TYPE, CONFIG_IU_MULPIPE, - CFG_IU_DIVIDER, CONFIG_IU_MUL_MAC, CONFIG_FPU_ENABLE, CONFIG_IU_FASTJUMP, - CONFIG_IU_ICCHOLD, CONFIG_IU_LDELAY, CONFIG_IU_FASTDECODE, CONFIG_IU_RFPOW, - CONFIG_IU_WATCHPOINTS); - - fprintf(fp, "\n\ - constant fpu_%s : fpu_config_type := \n\ - (core => %s, interface => %s, fregs => %d, version => %d);\n\ -", CONFIG_CFG_NAME, CFG_FPU_CORE, CFG_FPU_IF, CONFIG_FPU_ENABLE*CONFIG_FPU_REGS, - CONFIG_FPU_VER); - - /* - if ((CFG_ICACHE_SZ > 4) && (CFG_MMU_TYPE != false)) { - CFG_ICACHE_SZ = 4; - printf("Warning: maximum iset size 4 kbyte when MMU enabled (fixed)\n"); - } - if ((CFG_DCACHE_SZ > 4) && (CFG_MMU_TYPE != false)) { - CFG_DCACHE_SZ = 4; - printf("Warning: maximum dset size 4 kbyte when MMU enabled (fixed)\n"); - } - */ - - if ((strcmp(CFG_ICACHE_ALGO,"lrr") == 0) && (CFG_ICACHE_ASSO > 2)) - CFG_ICACHE_ALGO = "rnd"; - if ((strcmp(CFG_DCACHE_ALGO,"lrr") == 0) && (CFG_DCACHE_ASSO > 2)) - CFG_DCACHE_ALGO = "rnd"; - - fprintf(fp, "\n\ - constant cache_%s : cache_config_type := (\n\ - isets => %d, isetsize => %d, ilinesize => %d, ireplace => %s, ilock => %d,\n\ - dsets => %d, dsetsize => %d, dlinesize => %d, dreplace => %s, dlock => %d,\n\ - dsnoop => %s, drfast => %s, dwfast => %s, dlram => %s, \n\ - dlramsize => %d, dlramaddr => 16#%02X#);\n\ -", CONFIG_CFG_NAME, - CFG_ICACHE_ASSO, CFG_ICACHE_SZ, CFG_ICACHE_LSZ/4, CFG_ICACHE_ALGO, CFG_ICACHE_LOCK, - CFG_DCACHE_ASSO, CFG_DCACHE_SZ, CFG_DCACHE_LSZ/4, CFG_DCACHE_ALGO, CFG_DCACHE_LOCK, - CFG_DCACHE_SNOOP, CFG_DCACHE_RFAST, CFG_DCACHE_WFAST, CFG_DCACHE_LRAM, - CFG_DCACHE_LRSZ, CFG_DCACHE_LRSTART); - - fprintf (fp, "\n\ - constant mmu_%s : mmu_config_type := (\n\ - enable => %d, itlbnum => %d, dtlbnum => %d, tlb_type => %s, \n\ - tlb_rep => %s, tlb_diag => %s );\n\ -", CONFIG_CFG_NAME, CFG_MMU_ENABLE, CFG_MMU_I, CFG_MMU_D, - CFG_MMU_TYPE, CFG_MMU_REP, CFG_MMU_DIAG); - - fprintf(fp, "\n\ - constant ahbrange_config : ahbslv_addr_type := \n\ - (0,0,0,0,0,0,%d,0,1,%d,%d,%d,%d,%d,%d,%d);\n\ -", ahbram, dsuen, pcien, ethen, pcien, pcien, pcien, pcien); - - fprintf(fp, "\n\ - constant ahb_%s : ahb_config_type := ( masters => %d, defmst => %d,\n\ - split => %s, testmod => false);\n\ -", CONFIG_CFG_NAME, ahbmst, CONFIG_AHB_DEFMST % ahbmst, CONFIG_AHB_SPLIT); - - fprintf(fp, "\n\ - constant mctrl_%s : mctrl_config_type := (\n\ - bus8en => %s, bus16en => %s, wendfb => %s, ramsel5 => %s,\n\ - sdramen => %s, sdinvclk => %s, sdsepbus => %s);\n\ -", CONFIG_CFG_NAME, CONFIG_MCTRL_8BIT, CONFIG_MCTRL_16BIT, CONFIG_MCTRL_WFB, - CONFIG_MCTRL_5CS, - CONFIG_MCTRL_SDRAM, CONFIG_MCTRL_SDRAM_INVCLK, CONFIG_MCTRL_SDRAM_SEPBUS); - - fprintf(fp, "\n\ - constant peri_%s : peri_config_type := (\n\ - cfgreg => %s, ahbstat => %s, wprot => %s, wdog => %s, \n\ - irq2en => %s, ahbram => %s, ahbrambits => %d, ethen => %s );\n\ -", CONFIG_CFG_NAME, CONFIG_PERI_LCONF, CONFIG_PERI_AHBSTAT, CONFIG_PERI_WPROT, - CONFIG_PERI_WDOG, CONFIG_PERI_IRQ2, CONFIG_AHBRAM_ENABLE, 7 + CFG_AHBRAM_SZ, - CONFIG_ETH_ENABLE); - - fprintf(fp, "\n\ - constant debug_%s : debug_config_type := ( enable => true, uart => %s, \n\ - iureg => %s, fpureg => %s, nohalt => %s, pclow => %d,\n\ - dsuenable => %s, dsutrace => %s, dsumixed => %s,\n\ - dsudpram => %s, tracelines => %d);\n\ -", CONFIG_CFG_NAME, CONFIG_DEBUG_UART, CONFIG_DEBUG_IURF, CONFIG_DEBUG_FPURF, - CONFIG_DEBUG_NOHALT, CFG_DEBUG_PCLOW, CONFIG_DSU_ENABLE, CONFIG_DSU_TRACEBUF, - CONFIG_DSU_MIXED_TRACE, CONFIG_SYN_TRACE_DPRAM, CFG_DSU_TRACE_SZ); - - fprintf(fp, "\n\ - constant boot_%s : boot_config_type := (boot => %s, ramrws => %d,\n\ - ramwws => %d, sysclk => %d, baud => %d, extbaud => %s,\n\ - pabits => %d);\n\ -", CONFIG_CFG_NAME, CFG_BOOT_SOURCE, CONFIG_BOOT_RWS, CONFIG_BOOT_WWS, - CONFIG_BOOT_SYSCLK, CONFIG_BOOT_BAUDRATE, CONFIG_BOOT_EXTBAUD, - CONFIG_BOOT_PROMABITS); - - fprintf(fp, "\n\ - constant pci_%s : pci_config_type := (\n\ - pcicore => %s , ahbmasters => %d, fifodepth => %d,\n\ - arbiter => %s, fixpri => false, prilevels => 4, pcimasters => 4,\n\ - vendorid => 16#%04X#, deviceid => 16#%04X#, subsysid => 16#%04X#,\n\ - revisionid => 16#%02X#, classcode =>16#%06X#, pmepads => %s,\n\ - p66pad => %s, pcirstall => %s, trace => %s, tracedepth => %d);\n\ -", CONFIG_CFG_NAME, CFG_PCI_CORE, pciahbmst, CFG_PCI_FIFO, CONFIG_PCI_ARBEN, - CONFIG_PCI_VENDORID, CONFIG_PCI_DEVICEID, CONFIG_PCI_SUBSYSID, - CONFIG_PCI_REVID, CONFIG_PCI_CLASSCODE, CONFIG_PCI_PMEPADS, - CONFIG_PCI_P66PAD, CONFIG_PCI_RESETALL, CONFIG_PCI_TRACE, CFG_PCI_TDEPTH); - - fprintf(fp, "\n\ - constant irq2cfg : irq2type := irq2none;\n\ -"); - - if (CONFIG_FT_ENABLE) - fprintf(fp, "\n\ - constant ft_%s : ft_config_type := ( rfpbits => %d, tmrreg => %s,\n\ - tmrclk => %s, mscheck => %s, memedac => %s, \n\ - rfwropt => %s, cparbits => %d, caddrpar => %s, regferr => %s,\n\ - cacheerr => %s);\n\ -", CONFIG_CFG_NAME, CONFIG_FT_RF_PARBITS, CONFIG_FT_TMR_REG, CONFIG_FT_TMR_CLK, - CONFIG_FT_MC, CONFIG_FT_MEMEDAC, CONFIG_FT_RF_WRFAST, - CONFIG_FT_CACHEMEM_PARBITS, CONFIG_FT_CACHEMEM_APAR, CONFIG_DEBUG_RFERR, - CONFIG_DEBUG_CACHEMEMERR); - - fprintf(fp, "\n\ -\n\ ------------------------------------------------------------------------------\n\ --- end of automatic configuration\n\ ------------------------------------------------------------------------------\n\ -\n\ -end;\n\ -"); - close(fp); - fp = fopen("device.v", "w+"); - if (!fp) { - printf("could not open file device.v\n"); - exit(1); - } - fprintf(fp, "\n\ -`define HEADER_VENDOR_ID 16'h%04X\n\ -`define HEADER_DEVICE_ID 16'h%04X\n\ -`define HEADER_REVISION_ID 8'h%02X\n\ -", CONFIG_PCI_VENDORID, CONFIG_PCI_DEVICEID, CONFIG_PCI_REVID); - - if ((CONFIG_SYN_INFER_RAM == false) && (!((strcmp(CFG_SYN_TARGET_TECH, "virtex")) && - (strcmp(CFG_SYN_TARGET_TECH, "virtex2"))))) { - fprintf(fp, "\n\ -`define FPGA\n\ -`define XILINX\n\ -`define WBW_ADDR_LENGTH 7\n\ -`define WBR_ADDR_LENGTH 7\n\ -`define PCIW_ADDR_LENGTH 7\n\ -`define PCIR_ADDR_LENGTH 7\n\ -`define PCI_FIFO_RAM_ADDR_LENGTH 8 \n\ -`define WB_FIFO_RAM_ADDR_LENGTH 8 \n\ -"); - } else - fprintf(fp, "\n\ -`define WB_RAM_DONT_SHARE\n\ -`define PCI_RAM_DONT_SHARE\n\ -`define WBW_ADDR_LENGTH %d\n\ -`define WBR_ADDR_LENGTH %d\n\ -`define PCIW_ADDR_LENGTH %d\n\ -`define PCIR_ADDR_LENGTH %d\n\ -`define PCI_FIFO_RAM_ADDR_LENGTH %d \n\ -`define WB_FIFO_RAM_ADDR_LENGTH %d \n\ -", CFG_PCI_FIFO, CFG_PCI_FIFO, CFG_PCI_FIFO, CFG_PCI_FIFO, - CFG_PCI_FIFO, CFG_PCI_FIFO); - - fprintf(fp, "\n\ -`define ETH_WISHBONE_B3\n\ -\n\ -`define ETH_TX_FIFO_CNT_WIDTH %d\n\ -`define ETH_TX_FIFO_DEPTH %d\n\ -\n\ -`define ETH_RX_FIFO_CNT_WIDTH %d\n\ -`define ETH_RX_FIFO_DEPTH %d\n\ -\n\ -`define ETH_BURST_CNT_WIDTH %d\n\ -`define ETH_BURST_LENGTH %d\n", - log2(CONFIG_ETH_TXFIFO)+1, CONFIG_ETH_TXFIFO, - log2(CONFIG_ETH_RXFIFO)+1, CONFIG_ETH_RXFIFO, - log2(CONFIG_ETH_BURST)+1, CONFIG_ETH_BURST); - - close(fp); - return(0); -} diff --git a/grlib-original/bin/tkconfig/tail.tk b/grlib-original/bin/tkconfig/tail.tk deleted file mode 100644 index e4ba5cfa0..000000000 --- a/grlib-original/bin/tkconfig/tail.tk +++ /dev/null @@ -1,97 +0,0 @@ -# FILE: tail.tk -# This file is boilerplate TCL/TK function definitions for 'make xconfig'. -# -# CHANGES -# ======= -# -# 8 January 1998, Michael Elizabeth Chastain, -# Arrange buttons in three columns for better screen fitting. -# - -# -# Read the user's settings from .config. These will override whatever is -# in config.in. Don't do this if the user specified a -D to force -# the defaults. -# - -set defaults defconfig - -if { [file readable .config] == 1} then { - if { $argc > 0 } then { - if { [lindex $argv 0] != "-D" } then { - read_config .config - if { [lindex $argv 0] == "-regen" } then { - catch {exec cp -f .config .config.old}; - writeconfig .config config.h - exit 2 - } - } - else - { - read_config $defaults - } - } else { - read_config .config - } -} else { - read_config $defaults -} - -update_define 1 $total_menus 0 -update_mainmenu - -button .f0.right.save -anchor w -text "Save and Exit" -underline 0\ - -command { catch {exec cp -f .config .config.old}; \ - writeconfig .config config.h; wrapup .wrap } - -button .f0.right.quit -anchor w -text "Quit Without Saving" -underline 0\ - -command { maybe_exit .maybe } - -button .f0.right.load -anchor w -text "Load Configuration from File" \ - -command { load_configfile .load "Load Configuration from file" read_config_file -} - -button .f0.right.store -anchor w -text "Store Configuration to File" \ - -command { load_configfile .load "Store Configuration to file" write_config_file } - -# -# Now pack everything. -# - -pack .f0.right.store .f0.right.load .f0.right.quit .f0.right.save \ - -padx 0 -pady 0 -side bottom -fill x -pack .f0.left .f0.middle .f0.right -side left -padx 5 -pady 0 -fill y -pack .f0 -padx 5 -pady 5 - -update idletasks -set winy [expr 10 + [winfo reqheight .f0]] -set scry [lindex [wm maxsize .] 1] -set winx [expr 10 + [winfo reqwidth .f0]] -set scrx [lindex [wm maxsize .] 0] -if {$winx < $scrx} then {set maxx -1} else {set maxx $winx} -if {$winy < $scry} then {set maxy -1} else {set maxy $winy} -.f0 configure -width $winx -height $winy -wm maxsize . $maxx $maxy - -# -# If we cannot write our config files, disable the write button. -# -if { [file exists .config] == 1 } then { - if { [file writable .config] == 0 } then { - .f0.right.save configure -state disabled - } - } else { - if { [file writable .] == 0 } then { - .f0.right.save configure -state disabled - } - } - -#if { [file exists include/linux/autoconf.h] == 1 } then { -# if { [file writable include/linux/autoconf.h] == 0 } then { -# .f0.right.save configure -state disabled -# } -# } else { -# if { [file writable include/linux/] == 0 } then { -# .f0.right.save configure -state disabled -# } -# } diff --git a/grlib-original/bin/tkconfig/tkcond.c b/grlib-original/bin/tkconfig/tkcond.c deleted file mode 100644 index 0ce501127..000000000 --- a/grlib-original/bin/tkconfig/tkcond.c +++ /dev/null @@ -1,602 +0,0 @@ -/* - * tkcond.c - * - * Eric Youngdale was the original author of xconfig. - * Michael Elizabeth Chastain (mec@shout.net) is the current maintainer. - * - * This file takes the tokenized statement list and transforms 'if ...' - * statements. For each simple statement, I find all of the 'if' statements - * that enclose it, and attach the aggregate conditionals of those 'if' - * statements to the cond list of the simple statement. - * - * 14 January 1999, Michael Elizabeth Chastain, - * - Steam-clean this file. I tested this by generating kconfig.tk for - * every architecture and comparing it character-for-character against - * the output of the old tkparse. - * - * 07 July 1999, Andrzej M. Krzysztofowicz - * - kvariables removed; all variables are stored in a single table now - * - some elimination of options non-valid for current architecture - * implemented. - * - negation (!) eliminated from conditions - * - * TO DO: - * - xconfig is at the end of its life cycle. Contact if - * you are interested in working on the replacement. - */ - -#include -#include -#include - -#include "tkparse.h" - - - -/* - * Mark variables which are defined anywhere. - */ -static void mark_variables( struct kconfig * scfg ) -{ - struct kconfig * cfg; - int i; - - for ( i = 1; i <= max_varnum; i++ ) - vartable[i].defined = 0; - for ( cfg = scfg; cfg != NULL; cfg = cfg->next ) - { - if ( cfg->token == token_bool - || cfg->token == token_choice_item - || cfg->token == token_define_bool - || cfg->token == token_define_hex - || cfg->token == token_define_int - || cfg->token == token_define_string - || cfg->token == token_define_tristate - || cfg->token == token_dep_bool - || cfg->token == token_dep_mbool - || cfg->token == token_dep_tristate - || cfg->token == token_hex - || cfg->token == token_int - || cfg->token == token_string - || cfg->token == token_tristate - || cfg->token == token_unset ) - { - if ( cfg->nameindex > 0 ) /* paranoid */ - { - vartable[cfg->nameindex].defined = 1; - } - } - } -} - - - -static void free_cond( struct condition *cond ) -{ - struct condition *tmp, *tmp1; - for ( tmp = cond; tmp; tmp = tmp1 ) - { - tmp1 = tmp->next; - free( (void*)tmp ); - } -} - - - -/* - * Remove the bang operator from a condition to avoid priority problems. - * "!" has different priorities as "test" command argument and in - * a tk script. - */ -static struct condition * remove_bang( struct condition * condition ) -{ - struct condition * conda, * condb, * prev = NULL; - - for ( conda = condition; conda; conda = conda->next ) - { - if ( conda->op == op_bang && conda->next && - ( condb = conda->next->next ) ) - { - if ( condb->op == op_eq || condb->op == op_neq ) - { - condb->op = (condb->op == op_eq) ? op_neq : op_eq; - conda->op = op_nuked; - if ( prev ) - { - prev->next = conda->next; - } - else - { - condition = conda->next; - } - conda->next = NULL; - free_cond( conda ); - conda = condb; - } - } - prev = conda; - } - return condition; -} - - - -/* - * Make a new condition chain by joining the current condition stack with - * the "&&" operator for glue. - */ -static struct condition * join_condition_stack( struct condition * conditions [], - int depth ) -{ - struct condition * cond_list; - struct condition * cond_last; - int i, is_first = 1; - - cond_list = cond_last = NULL; - - for ( i = 0; i < depth; i++ ) - { - if ( conditions[i]->op == op_false ) - { - struct condition * cnew; - - /* It is always false condition */ - cnew = malloc( sizeof(*cnew) ); - memset( cnew, 0, sizeof(*cnew) ); - cnew->op = op_false; - cond_list = cond_last = cnew; - goto join_done; - } - } - for ( i = 0; i < depth; i++ ) - { - struct condition * cond; - struct condition * cnew; - int add_paren; - - /* omit always true conditions */ - if ( conditions[i]->op == op_true ) - continue; - - /* if i have another condition, add an '&&' operator */ - if ( !is_first ) - { - cnew = malloc( sizeof(*cnew) ); - memset( cnew, 0, sizeof(*cnew) ); - cnew->op = op_and; - cond_last->next = cnew; - cond_last = cnew; - } - - if ( conditions[i]->op != op_lparen ) - { - /* add a '(' */ - add_paren = 1; - cnew = malloc( sizeof(*cnew) ); - memset( cnew, 0, sizeof(*cnew) ); - cnew->op = op_lparen; - if ( cond_last == NULL ) - { cond_list = cond_last = cnew; } - else - { cond_last->next = cnew; cond_last = cnew; } - } - else - { - add_paren = 0; - } - - /* duplicate the chain */ - for ( cond = conditions [i]; cond != NULL; cond = cond->next ) - { - cnew = malloc( sizeof(*cnew) ); - cnew->next = NULL; - cnew->op = cond->op; - cnew->str = cond->str ? strdup( cond->str ) : NULL; - cnew->nameindex = cond->nameindex; - if ( cond_last == NULL ) - { cond_list = cond_last = cnew; } - else - { cond_last->next = cnew; cond_last = cnew; } - } - - if ( add_paren ) - { - /* add a ')' */ - cnew = malloc( sizeof(*cnew) ); - memset( cnew, 0, sizeof(*cnew) ); - cnew->op = op_rparen; - cond_last->next = cnew; - cond_last = cnew; - } - is_first = 0; - } - - /* - * Remove duplicate conditions. - */ - { - struct condition *cond1, *cond1b, *cond1c, *cond1d, *cond1e, *cond1f; - - for ( cond1 = cond_list; cond1 != NULL; cond1 = cond1->next ) - { - if ( cond1->op == op_lparen ) - { - cond1b = cond1 ->next; if ( cond1b == NULL ) break; - cond1c = cond1b->next; if ( cond1c == NULL ) break; - cond1d = cond1c->next; if ( cond1d == NULL ) break; - cond1e = cond1d->next; if ( cond1e == NULL ) break; - cond1f = cond1e->next; if ( cond1f == NULL ) break; - - if ( cond1b->op == op_variable - && ( cond1c->op == op_eq || cond1c->op == op_neq ) - && cond1d->op == op_constant - && cond1e->op == op_rparen ) - { - struct condition *cond2, *cond2b, *cond2c, *cond2d, *cond2e, *cond2f; - - for ( cond2 = cond1f->next; cond2 != NULL; cond2 = cond2->next ) - { - if ( cond2->op == op_lparen ) - { - cond2b = cond2 ->next; if ( cond2b == NULL ) break; - cond2c = cond2b->next; if ( cond2c == NULL ) break; - cond2d = cond2c->next; if ( cond2d == NULL ) break; - cond2e = cond2d->next; if ( cond2e == NULL ) break; - cond2f = cond2e->next; - - /* look for match */ - if ( cond2b->op == op_variable - && cond2b->nameindex == cond1b->nameindex - && cond2c->op == cond1c->op - && cond2d->op == op_constant - && strcmp( cond2d->str, cond1d->str ) == 0 - && cond2e->op == op_rparen ) - { - /* one of these must be followed by && */ - if ( cond1f->op == op_and - || ( cond2f != NULL && cond2f->op == op_and ) ) - { - /* nuke the first duplicate */ - cond1 ->op = op_nuked; - cond1b->op = op_nuked; - cond1c->op = op_nuked; - cond1d->op = op_nuked; - cond1e->op = op_nuked; - if ( cond1f->op == op_and ) - cond1f->op = op_nuked; - else - cond2f->op = op_nuked; - } - } - } - } - } - } - } - } - -join_done: - return cond_list; -} - - -static char arch_sparc[] = "sparc"; -static char * current_arch = arch_sparc; - -/* - * Eliminating conditions with ARCH = . - */ -static struct condition *eliminate_other_arch( struct condition *list ) -{ - struct condition *cond1a = list, *cond1b = NULL, *cond1c = NULL, *cond1d = NULL; - if ( current_arch == NULL ) - current_arch = getenv( "ARCH" ); - if ( current_arch == NULL ) - { - fprintf( stderr, "error: ARCH undefined\n" ); - exit( 1 ); - } - if ( cond1a->op == op_variable - && ! strcmp( vartable[cond1a->nameindex].name, "ARCH" ) ) - { - cond1b = cond1a->next; if ( cond1b == NULL ) goto done; - cond1c = cond1b->next; if ( cond1c == NULL ) goto done; - cond1d = cond1c->next; - if ( cond1c->op == op_constant && cond1d == NULL ) - { - if ( (cond1b->op == op_eq && strcmp( cond1c->str, current_arch )) - || (cond1b->op == op_neq && ! strcmp( cond1c->str, current_arch )) ) - { - /* This is for another architecture */ - cond1a->op = op_false; - cond1a->next = NULL; - free_cond( cond1b ); - return cond1a; - } - else if ( (cond1b->op == op_neq && strcmp( cond1c->str, current_arch )) - || (cond1b->op == op_eq && ! strcmp( cond1c->str, current_arch )) ) - { - /* This is for current architecture */ - cond1a->op = op_true; - cond1a->next = NULL; - free_cond( cond1b ); - return cond1a; - } - } - else if ( cond1c->op == op_constant && cond1d->op == op_or ) - { - if ( (cond1b->op == op_eq && strcmp( cond1c->str, current_arch )) - || (cond1b->op == op_neq && ! strcmp( cond1c->str, current_arch )) ) - { - /* This is for another architecture */ - cond1b = cond1d->next; - cond1d->next = NULL; - free_cond( cond1a ); - return eliminate_other_arch( cond1b ); - } - else if ( (cond1b->op == op_neq && strcmp( cond1c->str, current_arch )) - || (cond1b->op == op_eq && ! strcmp( cond1c->str, current_arch )) ) - { - /* This is for current architecture */ - cond1a->op = op_true; - cond1a->next = NULL; - free_cond( cond1b ); - return cond1a; - } - } - else if ( cond1c->op == op_constant && cond1d->op == op_and ) - { - if ( (cond1b->op == op_eq && strcmp( cond1c->str, current_arch )) - || (cond1b->op == op_neq && ! strcmp( cond1c->str, current_arch )) ) - { - /* This is for another architecture */ - int l_par = 0; - - for ( cond1c = cond1d->next; cond1c; cond1c = cond1c->next ) - { - if ( cond1c->op == op_lparen ) - l_par++; - else if ( cond1c->op == op_rparen ) - l_par--; - else if ( cond1c->op == op_or && l_par == 0 ) - /* Expression too complex - don't touch */ - return cond1a; - else if ( l_par < 0 ) - { - fprintf( stderr, "incorrect condition: programming error ?\n" ); - exit( 1 ); - } - } - cond1a->op = op_false; - cond1a->next = NULL; - free_cond( cond1b ); - return cond1a; - } - else if ( (cond1b->op == op_neq && strcmp( cond1c->str, current_arch )) - || (cond1b->op == op_eq && ! strcmp( cond1c->str, current_arch )) ) - { - /* This is for current architecture */ - cond1b = cond1d->next; - cond1d->next = NULL; - free_cond( cond1a ); - return eliminate_other_arch( cond1b ); - } - } - } - if ( cond1a->op == op_variable && ! vartable[cond1a->nameindex].defined ) - { - cond1b = cond1a->next; if ( cond1b == NULL ) goto done; - cond1c = cond1b->next; if ( cond1c == NULL ) goto done; - cond1d = cond1c->next; - - if ( cond1c->op == op_constant - && ( cond1d == NULL || cond1d->op == op_and ) ) /*???*/ - { - if ( cond1b->op == op_eq && strcmp( cond1c->str, "" ) ) - { - cond1a->op = op_false; - cond1a->next = NULL; - free_cond( cond1b ); - return cond1a; - } - } - else if ( cond1c->op == op_constant && cond1d->op == op_or ) - { - if ( cond1b->op == op_eq && strcmp( cond1c->str, "" ) ) - { - cond1b = cond1d->next; - cond1d->next = NULL; - free_cond( cond1a ); - return eliminate_other_arch( cond1b ); - } - } - } -done: - return list; -} - - - -/* - * This is the main transformation function. - */ -void fix_conditionals( struct kconfig * scfg ) -{ - struct kconfig * cfg; - - /* - * Transform op_variable to op_kvariable. - */ - mark_variables( scfg ); - - /* - * Walk the statement list, maintaining a stack of current conditions. - * token_if push its condition onto the stack. - * token_else invert the condition on the top of the stack. - * token_endif pop the stack. - * - * For a simple statement, create a condition chain by joining together - * all of the conditions on the stack. - */ - { - struct condition * cond_stack [32]; - int depth = 0; - struct kconfig * prev = NULL; - - for ( cfg = scfg; cfg != NULL; cfg = cfg->next ) - { - int good = 1; - switch ( cfg->token ) - { - default: - break; - - case token_if: - cond_stack [depth++] = - remove_bang( eliminate_other_arch( cfg->cond ) ); - cfg->cond = NULL; - break; - - case token_else: - { - /* - * Invert the condition chain. - * - * Be careful to transfrom op_or to op_and1, not op_and. - * I will need this later in the code that removes - * duplicate conditions. - */ - struct condition * cond; - - for ( cond = cond_stack [depth-1]; - cond != NULL; - cond = cond->next ) - { - switch( cond->op ) - { - default: break; - case op_and: cond->op = op_or; break; - case op_or: cond->op = op_and1; break; - case op_neq: cond->op = op_eq; break; - case op_eq: cond->op = op_neq; break; - case op_true: cond->op = op_false;break; - case op_false:cond->op = op_true; break; - } - } - } - break; - - case token_fi: - --depth; - break; - - case token_bool: - case token_choice_item: - case token_choice_header: - case token_comment: - case token_define_bool: - case token_define_hex: - case token_define_int: - case token_define_string: - case token_define_tristate: - case token_endmenu: - case token_hex: - case token_int: - case token_mainmenu_option: - case token_string: - case token_tristate: - case token_unset: - cfg->cond = join_condition_stack( cond_stack, depth ); - if ( cfg->cond && cfg->cond->op == op_false ) - { - good = 0; - if ( prev ) - prev->next = cfg->next; - else - scfg = cfg->next; - } - break; - - case token_dep_bool: - case token_dep_mbool: - case token_dep_tristate: - /* - * Same as the other simple statements, plus an additional - * condition for the dependency. - */ - if ( cfg->cond ) - { - cond_stack [depth] = eliminate_other_arch( cfg->cond ); - cfg->cond = join_condition_stack( cond_stack, depth+1 ); - } - else - { - cfg->cond = join_condition_stack( cond_stack, depth ); - } - if ( cfg->cond && cfg->cond->op == op_false ) - { - good = 0; - if ( prev ) - prev->next = cfg->next; - else - scfg = cfg->next; - } - break; - } - if ( good ) - prev = cfg; - } - } -} - - - -#if 0 -void dump_condition( struct condition *list ) -{ - struct condition *tmp; - for ( tmp = list; tmp; tmp = tmp->next ) - { - switch (tmp->op) - { - default: - break; - case op_variable: - printf( " %s", vartable[tmp->nameindex].name ); - break; - case op_constant: - printf( " %s", tmp->str ); - break; - case op_eq: - printf( " =" ); - break; - case op_bang: - printf( " !" ); - break; - case op_neq: - printf( " !=" ); - break; - case op_and: - case op_and1: - printf( " -a" ); - break; - case op_or: - printf( " -o" ); - break; - case op_true: - printf( " TRUE" ); - break; - case op_false: - printf( " FALSE" ); - break; - case op_lparen: - printf( " (" ); - break; - case op_rparen: - printf( " )" ); - break; - } - } - printf( "\n" ); -} -#endif diff --git a/grlib-original/bin/tkconfig/tkgen.c b/grlib-original/bin/tkconfig/tkgen.c deleted file mode 100644 index 3b3a4f4f4..000000000 --- a/grlib-original/bin/tkconfig/tkgen.c +++ /dev/null @@ -1,1521 +0,0 @@ -/* Generate tk script based upon config.in - * - * Version 1.0 - * Eric Youngdale - * 10/95 - * - * 1996 01 04 - * Avery Pennarun - Aesthetic improvements. - * - * 1996 01 24 - * Avery Pennarun - Bugfixes and more aesthetics. - * - * 1996 03 08 - * Avery Pennarun - The int and hex config.in commands work right. - * - Choice buttons are more user-friendly. - * - Disabling a text entry line greys it out properly. - * - dep_tristate now works like in Configure. (not pretty) - * - No warnings in gcc -Wall. (Fixed some "interesting" bugs.) - * - Faster/prettier "Help" lookups. - * - * 1996 03 15 - * Avery Pennarun - Added new sed script from Axel Boldt to make help even - * faster. (Actually awk is downright slow on some machines.) - * - Fixed a bug I introduced into Choice dependencies. Thanks - * to Robert Krawitz for pointing this out. - * - * 1996 03 16 - * Avery Pennarun - basic "do_make" support added to let sound config work. - * - * 1996 03 25 - * Axel Boldt - Help now works on "choice" buttons. - * - * 1996 04 06 - * Avery Pennarun - Improved sound config stuff. (I think it actually works - * now!) - * - Window-resize-limits don't use ugly /usr/lib/tk4.0 hack. - * - int/hex work with tk3 again. (The "cget" error.) - * - Next/Prev buttons switch between menus. I can't take - * much credit for this; the code was already there, but - * ifdef'd out for some reason. It flickers a lot, but - * I suspect there's no "easy" fix for that. - * - Labels no longer highlight as you move the mouse over - * them (although you can still press them... oh well.) - * - Got rid of the last of the literal color settings, to - * help out people with mono X-Windows systems. - * (Apparently there still are some out there!) - * - Tabstops seem sensible now. - * - * 1996 04 14 - * Avery Pennarun - Reduced flicker when creating windows, even with "update - * idletasks" hack. - * - * 1997 12 08 - * Michael Chastain - Remove sound driver special cases. - * - * 1997 11 15 - * Michael Chastain - For choice buttons, write values for all options, - * not just the single chosen one. This is compatible - * with 'make config' and 'make oldconfig', and is - * needed so smart-config dependencies work if the - * user switches from one configuration method to - * another. - * - * 1998 03 09 - * Axel Boldt - Smaller layout of main menu - it's still too big for 800x600. - * - Display help in text window to allow for cut and paste. - * - Allow for empty lines in help texts. - * - update_define should not set all variables unconditionally to - * 0: they may have been set to 1 elsewhere. CONFIG_NETLINK is - * an example. - * - * 1999 01 04 - * Michael Elizabeth Chastain - * - Call clear_globalflags when writing out update_mainmenu. - * This fixes the missing global/vfix lines for ARCH=alpha on 2.2.0-pre4. - * - * 8 January 1999, Michael Elizabeth Chastain - * - Emit menus_per_column - * - * 14 January 1999, Michael Elizabeth Chastain - * - Steam-clean this file. I tested this by generating kconfig.tk for every - * architecture and comparing it character-for-character against the output - * of the old tkparse. - * - Fix flattening of nested menus. The old code simply assigned items to - * the most recent token_mainmenu_option, without paying attention to scope. - * For example: "menu-1 bool-a menu-2 bool-b endmenu bool-c bool-d endmenu". - * The old code would put bool-a in menu-1, bool-b in menu-2, and bool-c - * and bool-d in *menu-2*. This hosed the nested submenus in - * drives/net/Config.in and other places. - * - Fix menu line wraparound at 128 menus (some fool used a 'char' for - * a counter). - * - * 23 January 1999, Michael Elizabeth Chastain - * - Remove bug-compatible code. - * - * 07 July 1999, Andrzej M. Krzysztofowicz - * Some bugfixes, including - * - disabling "m" options when CONFIG_MODULES is set to "n" as well as "y" - * option in dep_tristate when dependency is set to "m", - * - deactivating choices which should not be available, - * - basic validation for int and hex introduced if the entered one is not - * valid, - * - updates of all opened menus instead of the active only. I was afraid - * that it would slow down updates, but I don't even see any speed difference - * on my machine. If it slows you can still work with only a single menu - * opened, - * - fixed error when focussing non-existent window (especially Help windows), - * Higher level submenus implemented. - */ - -#include -#include -#include -#include -#include "tkparse.h" - - -/* - * Total number of menus. - */ -static int tot_menu_num = 0; - -/* - * Pointers to mainmenu_option and endmenu of each menu. - */ -struct kconfig * menu_first [100]; -struct kconfig * menu_last [100]; - -/* - * Generate portion of wish script for the beginning of a submenu. - * The guts get filled in with the various options. - */ -static void start_proc( char * label, int menu_num, int toplevel ) -{ - if ( toplevel ) - printf( "menu_option menu%d %d \"%s\"\n", menu_num, menu_num, label ); - printf( "proc menu%d {w title} {\n", menu_num ); - printf( "\tset oldFocus [focus]\n" ); - if ( menu_first[menu_num]->menu_number != 0 ) - printf( "\tcatch {focus .menu%d}\n", - menu_first[menu_num]->menu_number ); - printf( "\tcatch {destroy $w; unregister_active %d}\n", menu_num ); - printf( "\ttoplevel $w -class Dialog\n" ); - printf( "\twm withdraw $w\n" ); - printf( "\tglobal active_menus\n" ); - printf( "\tset active_menus [lsort -integer [linsert $active_menus end %d]]\n", menu_num ); - printf( "\tmessage $w.m -width 400 -aspect 300 -text \\\n" ); - printf( "\t\t\"%s\" -relief raised\n", label ); - printf( "\tpack $w.m -pady 10 -side top -padx 10\n" ); - printf( "\twm title $w \"%s\" \n\n", label ); - - printf( "\tbind $w \"catch {focus $oldFocus}; destroy $w; unregister_active %d; break\"\n", menu_num); - - printf("\tset nextscript "); - printf("\"catch {focus $oldFocus}; " ); - /* - * We are checking which windows should be destroyed and which are - * common parents with the next one. Remember that menu_num field - * in mainmenu_option record reports number of its *parent* menu. - */ - if ( menu_num < tot_menu_num - && menu_first[menu_num + 1]->menu_number != menu_num ) - { - int to_destr; - - printf( "destroy $w; unregister_active %d; ", menu_num ); - to_destr = menu_first[menu_num]->menu_number; - while ( to_destr > 0 && menu_first[menu_num + 1]->menu_number != to_destr ) - { - printf( "catch {destroy .menu%d}; unregister_active %d; ", - to_destr, to_destr ); - to_destr = menu_first[to_destr]->menu_number; - } - } - printf( "menu%d .menu%d \\\"$title\\\"\"\n", - menu_num+1, menu_num+1 ); - - /* - * Attach the "Prev", "Next" and "OK" buttons at the end of the window. - */ - printf( "\tframe $w.f\n" ); - if ( toplevel ) - printf( "\tbutton $w.f.back -text \"Main Menu\" \\\n" ); - else - printf( "\tbutton $w.f.back -text \"OK\" \\\n" ); - printf( "\t\t-width 15 -command \"catch {focus $oldFocus}; destroy $w; unregister_active %d\"\n", - menu_num ); - printf( "\tbutton $w.f.next -text \"Next\" -underline 0\\\n" ); - printf( "\t\t-width 15 -command $nextscript\n"); - - if ( menu_num == tot_menu_num ) { - printf( "\t$w.f.next configure -state disabled\n" ); - /* - * this is a bit hackish but Alt-n must be rebound - * otherwise if the user press Alt-n on the last menu - * it will give him/her the next menu of one of the - * previous options - */ - printf( "\tbind all \"puts \\\"no more menus\\\" \"\n"); - } - else - { - /* - * I should be binding to $w not all - but if I do nehat I get the error "unknown path" - */ - printf( "\tbind all $nextscript\n"); - } - printf( "\tbutton $w.f.prev -text \"Prev\" -underline 0\\\n" ); - printf( "\t\t-width 15 -command \"catch {focus $oldFocus}; destroy $w; unregister_active %d; menu%d .menu%d \\\"$title\\\"\"\n", - menu_num, menu_num-1, menu_num-1 ); - if ( menu_num == 1 ) { - printf( "\t$w.f.prev configure -state disabled\n" ); - } - else - { - printf( "\tbind $w \"catch {focus $oldFocus}; destroy $w; unregister_active %d; menu%d .menu%d \\\"$title\\\";break\"\n", - menu_num, menu_num-1, menu_num-1 ); - } - printf( "\tpack $w.f.back $w.f.next $w.f.prev -side left -expand on\n" ); - printf( "\tpack $w.f -pady 10 -side bottom -anchor w -fill x\n" ); - - /* - * Lines between canvas and other areas of the window. - */ - printf( "\tframe $w.topline -relief ridge -borderwidth 2 -height 2\n" ); - printf( "\tpack $w.topline -side top -fill x\n\n" ); - printf( "\tframe $w.botline -relief ridge -borderwidth 2 -height 2\n" ); - printf( "\tpack $w.botline -side bottom -fill x\n\n" ); - - /* - * The "config" frame contains the canvas and a scrollbar. - */ - printf( "\tframe $w.config\n" ); - printf( "\tpack $w.config -fill y -expand on\n\n" ); - printf( "\tscrollbar $w.config.vscroll -command \"$w.config.canvas yview\"\n" ); - printf( "\tpack $w.config.vscroll -side right -fill y\n\n" ); - - /* - * The scrollable canvas itself, where the real work (and mess) gets done. - */ - printf( "\tcanvas $w.config.canvas -height 1\\\n" ); - printf( "\t\t-relief flat -borderwidth 0 -yscrollcommand \"$w.config.vscroll set\" \\\n" ); - printf( "\t\t-width [expr [winfo screenwidth .] * 1 / 2] \n" ); - printf( "\tframe $w.config.f\n" ); - printf( "\tbind $w \"$w.config.canvas yview scroll 1 unit;break;\"\n"); - printf( "\tbind $w \"$w.config.canvas yview scroll -1 unit;break;\"\n"); - printf( "\tbind $w \"$w.config.canvas yview scroll 1 page;break;\"\n"); - printf( "\tbind $w \"$w.config.canvas yview scroll -1 page;break;\"\n"); - printf( "\tbind $w \"$w.config.canvas yview moveto 0;break;\"\n"); - printf( "\tbind $w \"$w.config.canvas yview moveto 1 ;break;\"\n"); - printf( "\tpack $w.config.canvas -side right -fill y\n" ); - printf("\n\n"); -} - - - -/* - * Each proc we create needs a global declaration for any global variables we - * use. To minimize the size of the file, we set a flag each time we output - * a global declaration so we know whether we need to insert one for a - * given function or not. - */ -static void clear_globalflags(void) -{ - int i; - for ( i = 1; i <= max_varnum; i++ ) - vartable[i].global_written = 0; -} - - - -/* - * Output a "global" line for a given variable. Also include the - * call to "vfix". (If vfix is not needed, then it's fine to just printf - * a "global" line). - */ -void global( const char *var ) -{ - printf( "\tglobal %s\n", var ); -} - - - -/* - * This function walks the chain of conditions that we got from cond.c - * and creates a TCL conditional to enable/disable a given widget. - */ -void generate_if( struct kconfig * cfg, struct condition * ocond, - int menu_num, int line_num ) -{ - struct condition * cond; - struct dependency * tmp; - struct kconfig * cfg1; - - if ( line_num >= -1 ) - { - if ( cfg->token == token_define_bool || cfg->token == token_define_hex - || cfg->token == token_define_int || cfg->token == token_define_string - || cfg->token == token_define_tristate || cfg->token == token_unset ) - return; - if ( cfg->token == token_comment && line_num == -1 ) - return; - } - else - { - if ( cfg->token == token_string || cfg->token == token_mainmenu_option ) - return; - } - - /* - * First write any global declarations we need for this conditional. - */ - for ( cond = ocond; cond != NULL; cond = cond->next ) - { - switch ( cond->op ) - { - default: - break; - - case op_variable: - if ( ! vartable[cond->nameindex].global_written ) - { - vartable[cond->nameindex].global_written = 1; - global( vartable[cond->nameindex].name ); - } - break; - } - } - - /* - * Now write this option. - */ - if ( cfg->nameindex > 0 && ! vartable[cfg->nameindex].global_written ) - { - vartable[cfg->nameindex].global_written = 1; - global( vartable[cfg->nameindex].name ); - } - - /* - * Generate the body of the conditional. - */ - printf( "\tif {" ); - for ( cond = ocond; cond != NULL; cond = cond->next ) - { - switch ( cond->op ) - { - default: - break; - - case op_bang: printf( " ! " ); break; - case op_eq: printf( " == " ); break; - case op_neq: printf( " != " ); break; - case op_and: printf( " && " ); break; - case op_and1: printf( " && " ); break; - case op_or: printf( " || " ); break; - case op_lparen: printf( "(" ); break; - case op_rparen: printf( ")" ); break; - - case op_variable: - printf( "$%s", vartable[cond->nameindex].name ); - break; - - case op_constant: - if ( strcmp( cond->str, "y" ) == 0 ) printf( "1" ); - else if ( strcmp( cond->str, "n" ) == 0 ) printf( "0" ); - else if ( strcmp( cond->str, "m" ) == 0 ) printf( "2" ); - else if ( strcmp( cond->str, "" ) == 0 ) printf( "4" ); - else - printf( "\"%s\"", cond->str ); - break; - } - } - printf( "} then {" ); - - /* - * Generate a procedure call to write the value. - * This code depends on procedures in header.tk. - */ - if ( line_num >= -1 ) - { - int modtoyes = 0; - - switch ( cfg->token ) - { - default: - printf( " }\n" ); - break; - - case token_dep_mbool: - modtoyes = 1; - case token_dep_bool: - printf( "\n" ); - for ( tmp = cfg->depend; tmp; tmp = tmp->next ) - if ( ! vartable[get_varnum( tmp->name )].global_written ) - { - global( tmp->name ); - } - printf( "\tset tmpvar_dep [effective_dep [list" ); - for ( tmp = cfg->depend; tmp; tmp = tmp->next ) - printf( " $%s", tmp->name ); - printf( "]];set %s [sync_bool $%s $tmpvar_dep %d];", - vartable[cfg->nameindex].name, vartable[cfg->nameindex].name, - modtoyes ); - printf( "if {$tmpvar_dep != 1" ); - if (modtoyes) - printf( " && $tmpvar_dep != 2" ); - printf( "} then {configure_entry .menu%d.config.f.x%d disabled {y};", - menu_num, line_num ); - printf( "} else {" ); - printf( "configure_entry .menu%d.config.f.x%d normal {y};", - menu_num, line_num ); - printf( "}; " ); - case token_bool: - if ( cfg->token == token_bool ) - printf( "\n\t" ); - printf( "configure_entry .menu%d.config.f.x%d normal {n l", - menu_num, line_num ); - if ( cfg->token == token_bool ) - printf( " y" ); - printf( "}" ); - printf( "} else {"); - printf( "configure_entry .menu%d.config.f.x%d disabled {y n l}}\n", - menu_num, line_num ); - break; - - case token_choice_header: - printf( "configure_entry .menu%d.config.f.x%d normal {x l}", - menu_num, line_num ); - printf( "} else {" ); - printf( "configure_entry .menu%d.config.f.x%d disabled {x l}", - menu_num, line_num ); - printf( "}\n" ); - break; - - case token_choice_item: - fprintf( stderr, "Internal error on token_choice_item\n" ); - exit( 1 ); - - case token_dep_tristate: - printf( "\n" ); - for ( tmp = cfg->depend; tmp; tmp = tmp->next ) - if ( ! vartable[get_varnum( tmp->name )].global_written ) - { - global( tmp->name ); - } - printf( "\tset tmpvar_dep [effective_dep [list" ); - for ( tmp = cfg->depend; tmp; tmp = tmp->next ) - printf( " $%s", tmp->name ); - printf( "]];set %s [sync_tristate $%s $tmpvar_dep];", - vartable[cfg->nameindex].name, vartable[cfg->nameindex].name ); - printf( "\tif {$tmpvar_dep != 1} then {" ); - printf( "configure_entry .menu%d.config.f.x%d disabled {y}", - menu_num, line_num ); - printf( "} else {" ); - printf( "configure_entry .menu%d.config.f.x%d normal {y}", - menu_num, line_num ); - printf( "}; " ); - printf( "if {$tmpvar_dep == 0} then {" ); - printf( "configure_entry .menu%d.config.f.x%d disabled {m}", - menu_num, line_num ); - printf( "} else {" ); - printf( "configure_entry .menu%d.config.f.x%d normal {m}", - menu_num, line_num ); - printf( "}; " ); - case token_tristate: - if ( cfg->token == token_tristate ) - { - printf( "\n\tconfigure_entry .menu%d.config.f.x%d normal {y}; ", - menu_num, line_num ); - } - printf( "if {($CONFIG_MODULES == 1)} then {" ); - printf( "configure_entry .menu%d.config.f.x%d normal {m}} else {", - menu_num, line_num ); - printf( "configure_entry .menu%d.config.f.x%d disabled {m}}; ", - menu_num, line_num ); - printf( "configure_entry .menu%d.config.f.x%d normal {n l}", - menu_num, line_num ); - - /* - * Or in a bit to the variable - this causes all of the radiobuttons - * to be deselected (i.e. not be red). - */ - printf( "} else {" ); - printf( "configure_entry .menu%d.config.f.x%d disabled {y n m l}}\n", - menu_num, line_num ); - break; - - case token_hex: - case token_int: - case token_string: - printf( ".menu%d.config.f.x%d.x configure -state normal -foreground [ cget .ref -foreground ]; ", - menu_num, line_num ); - printf( ".menu%d.config.f.x%d.l configure -state normal; ", - menu_num, line_num ); - printf( "} else {" ); - printf( ".menu%d.config.f.x%d.x configure -state disabled -foreground [ cget .ref -disabledforeground ]; ", - menu_num, line_num ); - printf( ".menu%d.config.f.x%d.l configure -state disabled}\n", - menu_num, line_num ); - break; - - case token_comment: - case token_mainmenu_option: - if ( line_num >= 0 ) - { - printf( "configure_entry .menu%d.config.f.x%d normal {m}", - menu_num, line_num ); - printf( "} else {" ); - printf( "configure_entry .menu%d.config.f.x%d disabled {m}}\n", - menu_num, line_num ); - } - else - printf( ".f0.x%d configure -state normal } else { .f0.x%d configure -state disabled }\n", - menu_num, menu_num ); - break; - } - } - else - { - int modtoyes = 0; - - switch ( cfg->token ) - { - default: - printf( " }\n" ); - break; - - case token_dep_mbool: - modtoyes = 1; - case token_dep_bool: - printf( "\n" ); - for ( tmp = cfg->depend; tmp; tmp = tmp->next ) - if ( ! vartable[get_varnum( tmp->name )].global_written ) - { - global( tmp->name ); - } - printf( "\tset tmpvar_dep [effective_dep [list" ); - for ( tmp = cfg->depend; tmp; tmp = tmp->next ) - printf( " $%s", tmp->name ); - printf( "]];set %s [sync_bool $%s $tmpvar_dep %d];", - vartable[cfg->nameindex].name, vartable[cfg->nameindex].name, - modtoyes ); - case token_bool: - if ( cfg->token == token_bool ) - printf( "\n\t" ); - printf( "set %s [expr $%s&15]", - vartable[cfg->nameindex].name, vartable[cfg->nameindex].name ); - printf( "} else {"); - printf( "set %s [expr $%s|16]}\n", - vartable[cfg->nameindex].name, vartable[cfg->nameindex].name ); - break; - - case token_choice_header: - printf( "} else {" ); - for ( cfg1 = cfg->next; - cfg1 != NULL && cfg1->token == token_choice_item; - cfg1 = cfg1->next ) - printf( "set %s 4;", vartable[cfg1->nameindex].name ); - printf( "}\n" ); - break; - - case token_choice_item: - fprintf( stderr, "Internal error on token_choice_item\n" ); - exit( 1 ); - - case token_define_bool: - case token_define_tristate: - if ( ! vartable[get_varnum( cfg->value )].global_written ) - { - global( cfg->value ); - } - printf( "set %s $%s }\n", - vartable[cfg->nameindex].name, cfg->value ); - break; - - case token_define_hex: - case token_define_int: - printf( "set %s %s }\n", - vartable[cfg->nameindex].name, cfg->value ); - break; - - case token_define_string: - printf( "set %s \"%s\" }\n", - vartable[cfg->nameindex].name, cfg->value ); - break; - - case token_dep_tristate: - printf( "\n" ); - for ( tmp = cfg->depend; tmp; tmp = tmp->next ) - if ( ! vartable[get_varnum( tmp->name )].global_written ) - { - global( tmp->name ); - } - printf( "\tset tmpvar_dep [effective_dep [list" ); - for ( tmp = cfg->depend; tmp; tmp = tmp->next ) - printf( " $%s", tmp->name ); - printf( "]]; set %s [sync_tristate $%s $tmpvar_dep]; ", - vartable[cfg->nameindex].name, vartable[cfg->nameindex].name ); - case token_tristate: - if ( cfg->token == token_tristate ) - printf( "if {($CONFIG_MODULES == 0) && ($%s == 2)} then {set %s 1}; ", - vartable[cfg->nameindex].name, - vartable[cfg->nameindex].name ); - /* - * Or in a bit to the variable - this causes all of the radiobuttons - * to be deselected (i.e. not be red). - */ - printf( "set %s [expr $%s&15]", - vartable[cfg->nameindex].name, vartable[cfg->nameindex].name ); - printf( "} else {" ); - - /* - * Clear the disable bit to enable the correct radiobutton. - */ - printf( "set %s [expr $%s|16]}\n", - vartable[cfg->nameindex].name, vartable[cfg->nameindex].name ); - break; - - case token_hex: - case token_int: - if ( cfg->value && *cfg->value == '$' ) - { - int index = get_varnum( cfg->value+1 ); - printf( "\n" ); - if ( ! vartable[index].global_written ) - { - global( vartable[index].name ); - } - printf( "\t" ); - } - if ( cfg->token == token_hex ) - printf( "validate_hex " ); - else if ( cfg->token == token_int ) - printf( "validate_int " ); - printf( "%s \"$%s\" %s}\n", - vartable[cfg->nameindex].name, vartable[cfg->nameindex].name, - cfg->value ); - break; - - case token_unset: - printf( "set %s 4}\n", vartable[cfg->nameindex].name ); - break; - } - } -} - - -/* - * Generate a line that writes a variable to the output file. - */ -void generate_writeconfig( struct kconfig * cfg ) -{ - struct condition * cond; - struct dependency * tmp; - int depmod = 2; - - /* - * Generate global declaration for this symbol. - */ - if ( cfg->token != token_comment ) - { - if ( cfg->nameindex > 0 && ! vartable[cfg->nameindex].global_written ) - { - vartable[cfg->nameindex].global_written = 1; - global( vartable[cfg->nameindex].name ); - } - if ( cfg->token == token_define_tristate || cfg->token == token_define_bool ) - { - if ( ! vartable[get_varnum( cfg->value )].global_written ) - { - vartable[get_varnum( cfg->value )].global_written = 1; - global( cfg->value ); - } - } - else if ( cfg->nameindex <= 0 && cfg->token == token_choice_header ) - { - printf( "\tglobal tmpvar_%d\n", -(cfg->nameindex) ); - } - } - - /* - * Generate global declarations for the condition chain. - */ - for ( cond = cfg->cond; cond != NULL; cond = cond->next ) - { - switch( cond->op ) - { - default: - break; - - case op_variable: - if ( ! vartable[cond->nameindex].global_written ) - { - vartable[cond->nameindex].global_written = 1; - global( vartable[cond->nameindex].name ); - } - break; - } - } - - /* - * Generate indentation. - */ - printf( "\t" ); - - /* - * Generate the conditional. - */ - if ( cfg->cond != NULL ) - { - printf( "if {" ); - for ( cond = cfg->cond; cond != NULL; cond = cond->next ) - { - switch ( cond->op ) - { - default: break; - case op_bang: printf( " ! " ); break; - case op_eq: printf( " == " ); break; - case op_neq: printf( " != " ); break; - case op_and: printf( " && " ); break; - case op_and1: printf( " && " ); break; - case op_or: printf( " || " ); break; - case op_lparen: printf( "(" ); break; - case op_rparen: printf( ")" ); break; - - case op_variable: - printf( "$%s", vartable[cond->nameindex].name ); - break; - - case op_constant: - if ( strcmp( cond->str, "n" ) == 0 ) printf( "0" ); - else if ( strcmp( cond->str, "y" ) == 0 ) printf( "1" ); - else if ( strcmp( cond->str, "m" ) == 0 ) printf( "2" ); - else if ( strcmp( cond->str, "" ) == 0 ) printf( "4" ); - else - printf( "\"%s\"", cond->str ); - break; - } - } - printf( "} then {" ); - } - - /* - * Generate a procedure call to write the value. - * This code depends on the write_* procedures in header.tk. - */ - switch ( cfg->token ) - { - default: - if ( cfg->cond != NULL ) - printf( " }" ); - printf( "\n" ); - break; - - case token_bool: - case token_tristate: - printf( "write_tristate $cfg $autocfg %s $%s [list $notmod] 2", - vartable[cfg->nameindex].name, vartable[cfg->nameindex].name ); - if ( cfg->cond != NULL ) - printf( " }" ); - printf( "\n" ); - break; - - case token_choice_header: - /* - * This is funky code -- it fails if there were any conditionals. - * Fortunately all the conditionals got stripped off somewhere - * else. - */ - { - struct kconfig * cfg1; - for ( cfg1 = cfg->next; - cfg1 != NULL && cfg1->token == token_choice_item; - cfg1 = cfg1->next ) - { - printf("\n\tif { $tmpvar_%d == \"%s\" } then { write_tristate $cfg $autocfg %s 1 [list $notmod] 2 } else { write_tristate $cfg $autocfg %s 0 [list $notmod] 2 }", - -(cfg->nameindex), cfg1->label, - vartable[cfg1->nameindex].name, - vartable[cfg1->nameindex].name ); - } - } - if ( cfg->cond != NULL ) - printf( "}" ); - printf( "\n" ); - break; - - case token_choice_item: - fprintf( stderr, "Internal error on token_choice_item\n" ); - exit( 1 ); - - case token_comment: - printf( "write_comment $cfg $autocfg \"%s\"", - cfg->label ); - if ( cfg->cond != NULL ) - printf( "}" ); - printf( "\n" ); - break; - - case token_define_bool: - case token_define_tristate: - if ( cfg->cond == NULL ) - { - printf( "write_tristate $cfg $autocfg %s $%s [list $notmod] 2\n", - vartable[cfg->nameindex].name, vartable[cfg->nameindex].name ); - } - else - { - printf( "write_tristate $cfg $autocfg %s $%s [list $notmod] 2 }\n", - vartable[cfg->nameindex].name, cfg->value ); - } - break; - - case token_dep_mbool: - depmod = 1; - case token_dep_bool: - case token_dep_tristate: - printf( "write_tristate $cfg $autocfg %s $%s [list", - vartable[cfg->nameindex].name, vartable[cfg->nameindex].name ); - for ( tmp = cfg->depend; tmp; tmp = tmp->next ) - printf( " $%s", tmp->name ); - printf( "] %d", depmod ); - if ( cfg->cond != NULL ) - printf( " }" ); - printf( "\n" ); - break; - - case token_define_hex: - printf( "write_hex $cfg $autocfg %s %s $notmod", - vartable[cfg->nameindex].name, cfg->value ); - if ( cfg->cond != NULL ) - printf( " }" ); - printf( "\n" ); - break; - - case token_define_int: - printf( "write_int $cfg $autocfg %s %s $notmod", - vartable[cfg->nameindex].name, cfg->value ); - if ( cfg->cond != NULL ) - printf( " }" ); - printf( "\n" ); - break; - - case token_define_string: - printf( "write_string $cfg $autocfg %s \"%s\" $notmod", - vartable[cfg->nameindex].name, cfg->value ); - if ( cfg->cond != NULL ) - printf( " }" ); - printf( "\n" ); - break; - - case token_hex: - printf( "write_hex $cfg $autocfg %s $%s $notmod", - vartable[cfg->nameindex].name, vartable[cfg->nameindex].name ); - if ( cfg->cond != NULL ) - printf( " }" ); - printf( "\n" ); - break; - - case token_int: - printf( "write_int $cfg $autocfg %s $%s $notmod", - vartable[cfg->nameindex].name, vartable[cfg->nameindex].name ); - if ( cfg->cond != NULL ) - printf( " }" ); - printf( "\n" ); - break; - - case token_string: - printf( "write_string $cfg $autocfg %s \"$%s\" $notmod", - vartable[cfg->nameindex].name, vartable[cfg->nameindex].name ); - if ( cfg->cond != NULL ) - printf( " }" ); - printf( "\n" ); - break; - } -} - -static void generate_update_var( struct kconfig * scfg, int menu_num ) -{ - struct kconfig * cfg; - - if ( menu_num>0 ) - { - printf( "proc update_define_menu%d {} {\n", menu_num ); - printf( "\tupdate_define_mainmenu\n" ); - } - else - printf( "proc update_define_mainmenu {} {\n" ); - clear_globalflags(); - global( "CONFIG_MODULES" ); - vartable[ get_varnum( "CONFIG_MODULES" ) ].global_written = 1; - for ( cfg = scfg; cfg != NULL; cfg = cfg->next ) - { - if ( cfg->menu_number == menu_num && (cfg->token == token_define_bool || cfg->token == token_define_tristate - || cfg->token == token_define_hex || cfg->token == token_define_int - || cfg->token == token_define_string || cfg->token == token_unset - || cfg->token == token_tristate) ) - { - if ( ! vartable[cfg->nameindex].global_written ) - { - vartable[cfg->nameindex].global_written = 1; - global( vartable[cfg->nameindex].name ); - } - } - } - - for ( cfg = scfg; cfg != NULL; cfg = cfg->next ) - { - char tmp[20]; - struct kconfig * cfg1; - - if ( cfg->menu_number == menu_num ) - { - switch ( cfg->token ) - { - default: - case token_choice_item: - break; - case token_choice_header: - sprintf( tmp, "tmpvar_%d", -(cfg->nameindex) ); - global( tmp ); - for ( cfg1 = cfg->next; - cfg1 != NULL && cfg1->token == token_choice_item; - cfg1 = cfg1->next ) - { - vartable[cfg1->nameindex].global_written = 1; - global( vartable[cfg1->nameindex].name ); - printf( "\tif {$tmpvar_%d == \"%s\"} then {set %s 1} else {set %s 0}\n", - -(cfg->nameindex), cfg1->label, - vartable[cfg1->nameindex].name, - vartable[cfg1->nameindex].name ); - } - break; - case token_bool: - case token_define_bool: - case token_define_tristate: - case token_define_hex: - case token_define_int: - case token_define_string: - case token_dep_bool: - case token_dep_tristate: - case token_dep_mbool: - case token_int: - case token_hex: - case token_mainmenu_option: - case token_tristate: - case token_unset: - if ( cfg->cond != NULL ) - generate_if( cfg, cfg->cond, menu_num, -2 ); - else switch ( cfg->token ) - { - case token_tristate: - printf( "\n\tif {($CONFIG_MODULES == 0)} then {if {($%s == 2)} then {set %s 1}}\n", - vartable[cfg->nameindex].name, vartable[cfg->nameindex].name ); - break; - case token_define_bool: - case token_define_tristate: - if ( ! vartable[get_varnum( cfg->value )].global_written ) - { - vartable[get_varnum( cfg->value )].global_written = 1; - global( cfg->value ); - } - printf( "\tset %s $%s\n", vartable[cfg->nameindex].name, - cfg->value ); - break; - case token_define_hex: - case token_define_int: - printf( "\tset %s %s\n", vartable[cfg->nameindex].name, - cfg->value ); - break; - case token_define_string: - printf( "\tset %s \"%s\"\n", vartable[cfg->nameindex].name, - cfg->value ); - break; - case token_unset: - printf( "\tset %s 4\n", vartable[cfg->nameindex].name ); - default: - break; - } - } - } - } - printf( "}\n\n\n" ); -} - - -/* - * Generates the end of a menu procedure. - */ -static void end_proc( struct kconfig * scfg, int menu_num ) -{ - struct kconfig * cfg; - int i; - - printf( "\n\n\n" ); - printf( "\tfocus $w\n" ); - printf( "\tupdate_active\n" ); - printf( "\tglobal winx; global winy\n" ); - if ( menu_first[menu_num]->menu_number != 0 ) - { - printf( "\tif {[winfo exists .menu%d] == 0} then ", - menu_first[menu_num]->menu_number ); - printf( "{menu%d .menu%d \"%s\"}\n", - menu_first[menu_num]->menu_number, menu_first[menu_num]->menu_number, - menu_first[menu_first[menu_num]->menu_number]->label ); - printf( "\tset winx [expr [winfo x .menu%d]+30]; set winy [expr [winfo y .menu%d]+30]\n", - menu_first[menu_num]->menu_number, menu_first[menu_num]->menu_number ); - } - else - printf( "\tset winx [expr [winfo x .]+30]; set winy [expr [winfo y .]+30]\n" ); - printf( "\tif {[winfo exists $w]} then {wm geometry $w +$winx+$winy}\n" ); - - /* - * Now that the whole window is in place, we need to wait for an "update" - * so we can tell the canvas what its virtual size should be. - * - * Unfortunately, this causes some ugly screen-flashing because the whole - * window is drawn, and then it is immediately resized. It seems - * unavoidable, though, since "frame" objects won't tell us their size - * until after an update, and "canvas" objects can't automatically pack - * around frames. Sigh. - */ - printf( "\tupdate idletasks\n" ); - printf( "\tif {[winfo exists $w]} then {$w.config.canvas create window 0 0 -anchor nw -window $w.config.f\n\n" ); - printf( "\t$w.config.canvas configure \\\n" ); - printf( "\t\t-width [expr [winfo reqwidth $w.config.f] + 1]\\\n" ); - printf( "\t\t-scrollregion \"-1 -1 [expr [winfo reqwidth $w.config.f] + 1] \\\n" ); - printf( "\t\t\t [expr [winfo reqheight $w.config.f] + 1]\"\n\n" ); - - /* - * If the whole canvas will fit in 3/4 of the screen height, do it; - * otherwise, resize to around 1/2 the screen and let us scroll. - */ - printf( "\tset winy [expr [winfo reqh $w] - [winfo reqh $w.config.canvas]]\n" ); - printf( "\tset scry [expr [winfo screenh $w] / 2]\n" ); - printf( "\tset maxy [expr [winfo screenh $w] * 3 / 4]\n" ); - printf( "\tset canvtotal [expr [winfo reqh $w.config.f] + 2]\n" ); - printf( "\tif [expr $winy + $canvtotal < $maxy] {\n" ); - printf( "\t\t$w.config.canvas configure -height $canvtotal\n" ); - printf( "\t} else {\n" ); - printf( "\t\t$w.config.canvas configure -height [expr $scry - $winy]\n" ); - printf( "\t\t}\n\t}\n" ); - - /* - * Limit the min/max window size. Height can vary, but not width, - * because of the limitations of canvas and our laziness. - */ - printf( "\tupdate idletasks\n" ); - printf( "\tif {[winfo exists $w]} then {\n\twm maxsize $w [winfo width $w] [winfo screenheight $w]\n" ); - printf( "\twm minsize $w [winfo width $w] 100\n\n" ); - printf( "\twm deiconify $w\n" ); - printf( "}\n}\n\n" ); - - /* - * Now we generate the companion procedure for the menu we just - * generated. This procedure contains all of the code to - * disable/enable widgets based upon the settings of the other - * widgets, and will be called first when the window is mapped, - * and each time one of the buttons in the window are clicked. - */ - printf( "proc update_menu%d {} {\n", menu_num ); - - /* - * Clear all of the booleans that are defined in this menu. - */ - clear_globalflags(); - for ( cfg = scfg; cfg != NULL; cfg = cfg->next ) - { - if ( cfg->menu_number == menu_num - && cfg->token != token_mainmenu_option - && cfg->token != token_choice_item ) - { - if ( cfg->cond != NULL ) - { - int i; - if ( (cfg->token == token_tristate || cfg->token == token_dep_tristate) - && ! vartable[i = get_varnum( "CONFIG_MODULES" )].global_written ) - { - global( "CONFIG_MODULES" ); - vartable[i].global_written = 1; - } - generate_if( cfg, cfg->cond, cfg->menu_number, cfg->menu_line ); - } - else - { - if ( cfg->token == token_tristate ) - { - if ( ! vartable[cfg->nameindex].global_written ) - { - vartable[cfg->nameindex].global_written = 1; - printf( "\tglobal %s\n", vartable[cfg->nameindex].name ); - } - if ( ! vartable[i = get_varnum( "CONFIG_MODULES" )].global_written ) - { - global( "CONFIG_MODULES" ); - vartable[i].global_written = 1; - } - printf( "\n\tif {($CONFIG_MODULES == 1)} then {configure_entry .menu%d.config.f.x%d normal {m}} else {configure_entry .menu%d.config.f.x%d disabled {m}}\n", - menu_num, cfg->menu_line, - menu_num, cfg->menu_line ); - } - } - } - else if ( cfg->token == token_mainmenu_option - && cfg->menu_number == menu_num - && cfg->cond != NULL ) - { - generate_if( cfg, cfg->cond, menu_num, cfg->menu_line ); - } - } - printf("}\n\n\n"); - - generate_update_var( scfg, menu_num ); -} - -/* - * This is the top level function for generating the tk script. - */ -void dump_tk_script( struct kconfig * scfg ) -{ - int menu_depth; - int menu_num [64]; - int imenu, i; - int top_level_num = 0; - struct kconfig * cfg; - struct kconfig * cfg1 = NULL; - const char * name = "No Name"; - - /* - * Mark begin and end of each menu so I can omit submenus when walking - * over a parent menu. - */ - tot_menu_num = 0; - menu_depth = 0; - menu_num [0] = 0; - - for ( cfg = scfg; cfg != NULL; cfg = cfg->next ) - { - switch ( cfg->token ) - { - default: - break; - - case token_mainmenu_name: - name = cfg->label; - break; - - case token_mainmenu_option: - if ( ++menu_depth >= 64 ) - { fprintf( stderr, "menus too deep\n" ); exit( 1 ); } - if ( ++tot_menu_num >= 100 ) - { fprintf( stderr, "too many menus\n" ); exit( 1 ); } - menu_num [menu_depth] = tot_menu_num; - menu_first [tot_menu_num] = cfg; - menu_last [tot_menu_num] = cfg; - /* - * Note, that menu_number is set to the number of parent - * (upper level) menu. - */ - cfg->menu_number = menu_num[menu_depth - 1]; - if ( menu_depth == 1 ) - ++top_level_num; - break; - - case token_endmenu: - menu_last [menu_num [menu_depth]] = cfg; - /* flatten menus with proper scoping */ - if ( --menu_depth < 0 ) - { fprintf( stderr, "unmatched endmenu\n" ); exit( 1 ); } - break; - - case token_bool: - case token_choice_header: - case token_choice_item: - case token_comment: - case token_dep_bool: - case token_dep_tristate: - case token_dep_mbool: - case token_hex: - case token_int: - case token_string: - case token_tristate: - cfg->menu_number = menu_num[menu_depth]; - if ( menu_depth == 0 ) - { fprintf( stderr, "statement not in menu\n" ); exit( 1 ); } - break; - - case token_define_bool: - case token_define_hex: - case token_define_int: - case token_define_string: - case token_define_tristate: - case token_unset: - cfg->menu_number = menu_num[menu_depth]; - break; - } - } - - /* - * Generate menus per column setting. - * There are: - * four extra buttons for save/quit/load/store; - * one blank button - * add two to round up for division - */ - printf( "set menus_per_column %d\n", (top_level_num + 4 + 0 + 2) / 3 ); - printf( "set total_menus %d\n\n", tot_menu_num ); - - printf( "proc toplevel_menu {num} {\n" ); - for ( imenu = 1; imenu <= tot_menu_num; ++imenu ) - { - int parent = 1; - - if ( menu_first[imenu]->menu_number == 0 ) - parent = menu_first[imenu]->menu_number; - else - printf( "\tif {$num == %d} then {return %d}\n", - imenu, menu_first[imenu]->menu_number ); - } - printf( "\treturn $num\n}\n\n" ); - - /* - * Generate the menus. - */ - printf( "mainmenu_name \"%s\"\n", name ); - for ( imenu = 1; imenu <= tot_menu_num; ++imenu ) - { - int menu_line = 0; - int nr_submenu = imenu; - int menu_name_omitted = 0; - int opt_count = 0; - - clear_globalflags(); - start_proc( menu_first[imenu]->label, imenu, - !menu_first[imenu]->menu_number ); - - for ( cfg = menu_first[imenu]->next; cfg != NULL && cfg != menu_last[imenu]; cfg = cfg->next ) - { - switch ( cfg->token ) - { - default: - break; - - case token_mainmenu_option: - while ( menu_first[++nr_submenu]->menu_number > imenu ) - ; - cfg->menu_line = menu_line++; - printf( "\tsubmenu $w.config.f %d %d \"%s\" %d\n", - cfg->menu_number, cfg->menu_line, cfg->label, nr_submenu ); - cfg = menu_last[nr_submenu]; - break; - - case token_comment: - if ( !cfg->menu_line && !menu_name_omitted ) - { - cfg->menu_line = -1; - menu_name_omitted = 1; - } - else - { - menu_name_omitted = 1; - cfg->menu_line = menu_line++; - printf( "\tcomment $w.config.f %d %d \"%s\"\n", - cfg->menu_number, cfg->menu_line, cfg->label ); - } - break; - - case token_bool: - cfg->menu_line = menu_line++; - printf( "\tbool $w.config.f %d %d \"%s\" %s\n", - cfg->menu_number, cfg->menu_line, cfg->label, - vartable[cfg->nameindex].name ); - break; - - case token_choice_header: - /* - * I need the first token_choice_item to pick out the right - * help text from Documentation/Configure.help. - */ - cfg->menu_line = menu_line++; - printf( "\tglobal tmpvar_%d\n", -(cfg->nameindex) ); - printf( "\tminimenu $w.config.f %d %d \"%s\" tmpvar_%d %s\n", - cfg->menu_number, cfg->menu_line, cfg->label, - -(cfg->nameindex), vartable[cfg->next->nameindex].name ); - printf( "\tmenu $w.config.f.x%d.x.menu -tearoffcommand \"menutitle \\\"%s\\\"\"\n", - cfg->menu_line, cfg->label ); - cfg1 = cfg; - opt_count = 0; - break; - - case token_choice_item: - /* note: no menu line; uses choice header menu line */ - printf( "\t$w.config.f.x%d.x.menu add radiobutton -label \"%s\" -variable tmpvar_%d -value \"%s\" -command \"update_active\"\n", - cfg1->menu_line, cfg->label, -(cfg1->nameindex), - cfg->label ); - opt_count++; - if ( cfg->next && cfg->next->token != token_choice_item ) { - /* last option in the menu */ - printf( "\tmenusplit $w $w.config.f.x%d.x.menu %d\n", - cfg1->menu_line, opt_count ); - } - break; - - case token_dep_bool: - case token_dep_mbool: - cfg->menu_line = menu_line++; - printf( "\tdep_bool $w.config.f %d %d \"%s\" %s\n", - cfg->menu_number, cfg->menu_line, cfg->label, - vartable[cfg->nameindex].name ); - break; - - case token_dep_tristate: - cfg->menu_line = menu_line++; - printf( "\tdep_tristate $w.config.f %d %d \"%s\" %s\n", - cfg->menu_number, cfg->menu_line, cfg->label, - vartable[cfg->nameindex].name ); - break; - - case token_hex: - cfg->menu_line = menu_line++; - printf( "\thex $w.config.f %d %d \"%s\" %s\n", - cfg->menu_number, cfg->menu_line, cfg->label, - vartable[cfg->nameindex].name ); - break; - - case token_int: - cfg->menu_line = menu_line++; - printf( "\tint $w.config.f %d %d \"%s\" %s\n", - cfg->menu_number, cfg->menu_line, cfg->label, - vartable[cfg->nameindex].name ); - break; - - case token_string: - cfg->menu_line = menu_line++; - printf( "\tistring $w.config.f %d %d \"%s\" %s\n", - cfg->menu_number, cfg->menu_line, cfg->label, - vartable[cfg->nameindex].name ); - break; - - case token_tristate: - cfg->menu_line = menu_line++; - printf( "\ttristate $w.config.f %d %d \"%s\" %s\n", - cfg->menu_number, cfg->menu_line, cfg->label, - vartable[cfg->nameindex].name ); - break; - } - } - - end_proc( scfg, imenu ); - } - - /* - * The top level menu also needs an update function. When we update a - * submenu, we may need to disable one or more of the submenus on - * the top level menu, and this procedure will ensure that things are - * correct. - */ - clear_globalflags(); - printf( "proc update_mainmenu {} {\n" ); - for ( imenu = 1; imenu <= tot_menu_num; imenu++ ) - { - if ( menu_first[imenu]->cond != NULL && menu_first[imenu]->menu_number == 0 ) - generate_if( menu_first[imenu], menu_first[imenu]->cond, imenu, -1 ); - } - printf( "}\n\n\n" ); - - clear_globalflags(); - /* - * Generate code to load the default settings into the variables. - * The script in tail.tk will attempt to load .config, - * which may override these settings, but that's OK. - */ - for ( cfg = scfg; cfg != NULL; cfg = cfg->next ) - { - switch ( cfg->token ) - { - default: - break; - - case token_bool: - case token_choice_item: - case token_dep_bool: - case token_dep_tristate: - case token_dep_mbool: - case token_tristate: - if ( ! vartable[cfg->nameindex].global_written ) - { - printf( "set %s 0\n", vartable[cfg->nameindex].name ); - vartable[cfg->nameindex].global_written = 1; - } - break; - - case token_choice_header: - printf( "set tmpvar_%d \"(not set)\"\n", -(cfg->nameindex) ); - break; - - case token_hex: - case token_int: - if ( ! vartable[cfg->nameindex].global_written ) - { - printf( "set %s %s\n", vartable[cfg->nameindex].name, cfg->value ? cfg->value : "0" ); - vartable[cfg->nameindex].global_written = 1; - } - break; - - case token_string: - if ( ! vartable[cfg->nameindex].global_written ) - { - printf( "set %s \"%s\"\n", vartable[cfg->nameindex].name, cfg->value ); - vartable[cfg->nameindex].global_written = 1; - } - break; - } - } - - /* - * Define to an empty value all other variables (which are never defined) - */ - for ( i = 1; i <= max_varnum; i++ ) - { - if ( ! vartable[i].global_written - && strncmp( vartable[i].name, "CONSTANT_", 9 ) ) - printf( "set %s 4\n", vartable[i].name ); - } - - /* - * Generate a function to write all of the variables to a file. - */ - printf( "proc writeconfig {file1 file2} {\n" ); - printf( "\tset cfg [open $file1 w]\n" ); - printf( "\tset autocfg [open $file2 w]\n" ); - printf( "\tset notmod 1\n" ); - printf( "\tset notset 0\n" ); - printf( "\tputs $cfg \"#\"\n"); - printf( "\tputs $cfg \"# Automatically generated make config: don't edit\"\n"); - printf( "\tputs $cfg \"#\"\n" ); - - printf( "\tputs $autocfg \"/*\"\n" ); - printf( "\tputs $autocfg \" * Automatically generated C config: don't edit\"\n" ); - printf( "\tputs $autocfg \" */\"\n" ); - printf( "\tputs $autocfg \"#define AUTOCONF_INCLUDED\"\n" ); - - clear_globalflags(); - for ( cfg = scfg; cfg != NULL; cfg = cfg->next ) - { - switch ( cfg->token ) - { - default: - break; - - case token_bool: - case token_choice_header: - case token_comment: - case token_define_bool: - case token_define_hex: - case token_define_int: - case token_define_string: - case token_define_tristate: - case token_dep_bool: - case token_dep_tristate: - case token_dep_mbool: - case token_hex: - case token_int: - case token_string: - case token_tristate: - generate_writeconfig( cfg ); - break; - } - } - printf( "\tclose $cfg\n" ); - printf( "\tclose $autocfg\n" ); - printf( "}\n\n\n" ); - - /* - * Generate a simple function that updates the master choice - * variable depending upon what values were loaded from a .config - * file. - */ - printf( "proc clear_choices { } {\n" ); - for ( cfg = scfg; cfg != NULL; cfg = cfg->next ) - { - if ( cfg->token == token_choice_header ) - { - for ( cfg1 = cfg->next; - cfg1 != NULL && cfg1->token == token_choice_item; - cfg1 = cfg1->next ) - { - printf( "\tglobal %s; set %s 0\n", - vartable[cfg1->nameindex].name, - vartable[cfg1->nameindex].name ); - } - } - } - printf( "}\n\n\n" ); - - printf( "proc update_choices { } {\n" ); - for ( cfg = scfg; cfg != NULL; cfg = cfg->next ) - { - if ( cfg->token == token_choice_header ) - { - printf( "\tglobal tmpvar_%d\n", -(cfg->nameindex) ); - printf("\tset tmpvar_%d \"%s\"\n", -(cfg->nameindex), cfg->value); - for ( cfg1 = cfg->next; - cfg1 != NULL && cfg1->token == token_choice_item; - cfg1 = cfg1->next ) - { - printf( "\tglobal %s\n", vartable[cfg1->nameindex].name ); - printf( "\tif { $%s == 1 } then { set tmpvar_%d \"%s\" }\n", - vartable[cfg1->nameindex].name, - -(cfg->nameindex), cfg1->label ); - } - } - } - printf( "}\n\n\n" ); - - generate_update_var( scfg, 0 ); - - /* - * That's it. We are done. The output of this file will have header.tk - * prepended and tail.tk appended to create an executable wish script. - */ -} diff --git a/grlib-original/bin/tkconfig/tkparse.c b/grlib-original/bin/tkconfig/tkparse.c deleted file mode 100644 index f466e8ff1..000000000 --- a/grlib-original/bin/tkconfig/tkparse.c +++ /dev/null @@ -1,887 +0,0 @@ -/* - * tkparse.c - * - * Eric Youngdale was the original author of xconfig. - * Michael Elizabeth Chastain (mec@shout.net) is the current maintainer. - * - * Parse a config.in file and translate it to a wish script. - * This task has three parts: - * - * tkparse.c tokenize the input - * tkcond.c transform 'if ...' statements - * tkgen.c generate output - * - * Change History - * - * 7 January 1999, Michael Elizabeth Chastain, - * - Teach dep_tristate about a few literals, such as: - * dep_tristate 'foo' CONFIG_FOO m - * Also have it print an error message and exit on some parse failures. - * - * 14 January 1999, Michael Elizabeth Chastain, - * - Don't fclose stdin. Thanks to Tony Hoyle for nailing this one. - * - * 14 January 1999, Michael Elizabeth Chastain, - * - Steam-clean this file. I tested this by generating kconfig.tk for - * every architecture and comparing it character-for-character against - * the output of the old tkparse. - * - * 23 January 1999, Michael Elizabeth Chastain, - * - Remove bug-compatible code. - * - * 07 July 1999, Andrzej M. Krzysztofowicz, - * - Submenus implemented, - * - plenty of option updating/displaying fixes, - * - dep_bool, define_hex, define_int, define_string, define_tristate and - * undef implemented, - * - dep_tristate fixed to support multiple dependencies, - * - handling of variables with an empty value implemented, - * - value checking for int and hex fields, - * - more checking during condition parsing; choice variables are treated as - * all others now, - * - * TO DO: - * - xconfig is at the end of its life cycle. Contact if - * you are interested in working on the replacement. - */ - -#include -#include -#include - -#include "tkparse.h" - -static struct kconfig * config_list = NULL; -static struct kconfig * config_last = NULL; -static const char * current_file = ""; -static int lineno = 0; - -static void do_source( const char * ); - -#undef strcmp -int my_strcmp( const char * s1, const char * s2 ) { return strcmp( s1, s2 ); } -#define strcmp my_strcmp - -/* - * Report a syntax error. - */ -static void syntax_error( const char * msg ) -{ - fprintf( stderr, "%s: %d: %s\n", current_file, lineno, msg ); - exit( 1 ); -} - - - -/* - * Find index of a specyfic variable in the symbol table. - * Create a new entry if it does not exist yet. - */ -#define VARTABLE_SIZE 2048 -struct variable vartable[VARTABLE_SIZE]; -int max_varnum = 0; - -int get_varnum( char * name ) -{ - int i; - - for ( i = 1; i <= max_varnum; i++ ) - if ( strcmp( vartable[i].name, name ) == 0 ) - return i; - if (max_varnum > VARTABLE_SIZE-1) - syntax_error( "Too many variables defined." ); - vartable[++max_varnum].name = malloc( strlen( name )+1 ); - strcpy( vartable[max_varnum].name, name ); - return max_varnum; -} - - - -/* - * Get a string. - */ -static const char * get_string( const char * pnt, char ** label ) -{ - const char * word; - - word = pnt; - for ( ; ; ) - { - if ( *pnt == '\0' || *pnt == ' ' || *pnt == '\t' ) - break; - pnt++; - } - - *label = malloc( pnt - word + 1 ); - memcpy( *label, word, pnt - word ); - (*label)[pnt - word] = '\0'; - - if ( *pnt != '\0' ) - pnt++; - return pnt; -} - - - -/* - * Get a quoted string. - * Insert a '\' before any characters that need quoting. - */ -static const char * get_qstring( const char * pnt, char ** label ) -{ - char quote_char; - char newlabel [2048]; - char * pnt1; - - /* advance to the open quote */ - for ( ; ; ) - { - if ( *pnt == '\0' ) - return pnt; - quote_char = *pnt++; - if ( quote_char == '"' || quote_char == '\'' ) - break; - } - - /* copy into an intermediate buffer */ - pnt1 = newlabel; - for ( ; ; ) - { - if ( *pnt == '\0' ) - syntax_error( "unterminated quoted string" ); - if ( *pnt == quote_char && pnt[-1] != '\\' ) - break; - - /* copy the character, quoting if needed */ - if ( *pnt == '"' || *pnt == '\'' || *pnt == '[' || *pnt == ']' ) - *pnt1++ = '\\'; - *pnt1++ = *pnt++; - } - - /* copy the label into a permanent location */ - *pnt1++ = '\0'; - *label = (char *) malloc( pnt1 - newlabel ); - memcpy( *label, newlabel, pnt1 - newlabel ); - - /* skip over last quote and next whitespace */ - pnt++; - while ( *pnt == ' ' || *pnt == '\t' ) - pnt++; - return pnt; -} - - - -/* - * Get a quoted or unquoted string. It is recognized by the first - * non-white character. '"' and '"' are not allowed inside the string. - */ -static const char * get_qnqstring( const char * pnt, char ** label ) -{ - char quote_char; - - while ( *pnt == ' ' || *pnt == '\t' ) - pnt++; - - if ( *pnt == '\0' ) - return pnt; - quote_char = *pnt; - if ( quote_char == '"' || quote_char == '\'' ) - return get_qstring( pnt, label ); - else - return get_string( pnt, label ); -} - - - -/* - * Tokenize an 'if' statement condition. - */ -static struct condition * tokenize_if( const char * pnt ) -{ - struct condition * list; - struct condition * last; - struct condition * prev; - - /* eat the open bracket */ - while ( *pnt == ' ' || *pnt == '\t' ) - pnt++; - if ( *pnt != '[' ) - syntax_error( "bad 'if' condition" ); - pnt++; - - list = last = NULL; - for ( ; ; ) - { - struct condition * cond; - - /* advance to the next token */ - while ( *pnt == ' ' || *pnt == '\t' ) - pnt++; - if ( *pnt == '\0' ) - syntax_error( "unterminated 'if' condition" ); - if ( *pnt == ']' ) - return list; - - /* allocate a new token */ - cond = malloc( sizeof(*cond) ); - memset( cond, 0, sizeof(*cond) ); - if ( last == NULL ) - { list = last = cond; prev = NULL; } - else - { prev = last; last->next = cond; last = cond; } - - /* determine the token value */ - if ( *pnt == '-' && pnt[1] == 'a' ) - { - if ( ! prev || ( prev->op != op_variable && prev->op != op_constant ) ) - syntax_error( "incorrect argument" ); - cond->op = op_and; pnt += 2; continue; - } - - if ( *pnt == '-' && pnt[1] == 'o' ) - { - if ( ! prev || ( prev->op != op_variable && prev->op != op_constant ) ) - syntax_error( "incorrect argument" ); - cond->op = op_or; pnt += 2; continue; - } - - if ( *pnt == '!' && pnt[1] == '=' ) - { - if ( ! prev || ( prev->op != op_variable && prev->op != op_constant ) ) - syntax_error( "incorrect argument" ); - cond->op = op_neq; pnt += 2; continue; - } - - if ( *pnt == '=' ) - { - if ( ! prev || ( prev->op != op_variable && prev->op != op_constant ) ) - syntax_error( "incorrect argument" ); - cond->op = op_eq; pnt += 1; continue; - } - - if ( *pnt == '!' ) - { - if ( prev && ( prev->op != op_and && prev->op != op_or - && prev->op != op_bang ) ) - syntax_error( "incorrect argument" ); - cond->op = op_bang; pnt += 1; continue; - } - - if ( *pnt == '"' ) - { - const char * word; - - if ( prev && ( prev->op == op_variable || prev->op == op_constant ) ) - syntax_error( "incorrect argument" ); - /* advance to the word */ - pnt++; - if ( *pnt == '$' ) - { cond->op = op_variable; pnt++; } - else - { cond->op = op_constant; } - - /* find the end of the word */ - word = pnt; - for ( ; ; ) - { - if ( *pnt == '\0' ) - syntax_error( "unterminated double quote" ); - if ( *pnt == '"' ) - break; - pnt++; - } - - /* store a copy of this word */ - { - char * str = malloc( pnt - word + 1 ); - memcpy( str, word, pnt - word ); - str [pnt - word] = '\0'; - if ( cond->op == op_variable ) - { - cond->nameindex = get_varnum( str ); - free( str ); - } - else /* op_constant */ - { - cond->str = str; - } - } - - pnt++; - continue; - } - - /* unknown token */ - syntax_error( "bad if condition" ); - } -} - - - -/* - * Tokenize a choice list. Choices appear as pairs of strings; - * note that I am parsing *inside* the double quotes. Ugh. - */ -static const char * tokenize_choices( struct kconfig * cfg_choose, - const char * pnt ) -{ - int default_checked = 0; - for ( ; ; ) - { - struct kconfig * cfg; - char * buffer = malloc( 64 ); - - /* skip whitespace */ - while ( *pnt == ' ' || *pnt == '\t' ) - pnt++; - if ( *pnt == '\0' ) - return pnt; - - /* allocate a new kconfig line */ - cfg = malloc( sizeof(*cfg) ); - memset( cfg, 0, sizeof(*cfg) ); - if ( config_last == NULL ) - { config_last = config_list = cfg; } - else - { config_last->next = cfg; config_last = cfg; } - - /* fill out the line */ - cfg->token = token_choice_item; - cfg->cfg_parent = cfg_choose; - pnt = get_string( pnt, &cfg->label ); - if ( ! default_checked && - ! strncmp( cfg->label, cfg_choose->value, strlen( cfg_choose->value ) ) ) - { - default_checked = 1; - free( cfg_choose->value ); - cfg_choose->value = cfg->label; - } - while ( *pnt == ' ' || *pnt == '\t' ) - pnt++; - pnt = get_string( pnt, &buffer ); - cfg->nameindex = get_varnum( buffer ); - } - if ( ! default_checked ) - syntax_error( "bad 'choice' default value" ); - return pnt; -} - - - -/* - * Tokenize one line. - */ -static void tokenize_line( const char * pnt ) -{ - static struct kconfig * last_menuoption = NULL; - enum e_token token; - struct kconfig * cfg; - struct dependency ** dep_ptr; - char * buffer = malloc( 64 ); - - /* skip white space */ - while ( *pnt == ' ' || *pnt == '\t' ) - pnt++; - - /* - * categorize the next token - */ - -#define match_token(t, s) \ - if (strncmp(pnt, s, strlen(s)) == 0) { token = t; pnt += strlen(s); break; } - - token = token_UNKNOWN; - switch ( *pnt ) - { - default: - break; - - case '#': - case '\0': - return; - - case 'b': - match_token( token_bool, "bool" ); - break; - - case 'c': - match_token( token_choice_header, "choice" ); - match_token( token_comment, "comment" ); - break; - - case 'd': - match_token( token_define_bool, "define_bool" ); - match_token( token_define_hex, "define_hex" ); - match_token( token_define_int, "define_int" ); - match_token( token_define_string, "define_string" ); - match_token( token_define_tristate, "define_tristate" ); - match_token( token_dep_bool, "dep_bool" ); - match_token( token_dep_mbool, "dep_mbool" ); - match_token( token_dep_tristate, "dep_tristate" ); - break; - - case 'e': - match_token( token_else, "else" ); - match_token( token_endmenu, "endmenu" ); - break; - - case 'f': - match_token( token_fi, "fi" ); - break; - - case 'h': - match_token( token_hex, "hex" ); - break; - - case 'i': - match_token( token_if, "if" ); - match_token( token_int, "int" ); - break; - - case 'm': - match_token( token_mainmenu_name, "mainmenu_name" ); - match_token( token_mainmenu_option, "mainmenu_option" ); - break; - - case 's': - match_token( token_source, "source" ); - match_token( token_string, "string" ); - break; - - case 't': - match_token( token_then, "then" ); - match_token( token_tristate, "tristate" ); - break; - - case 'u': - match_token( token_unset, "unset" ); - break; - } - -#undef match_token - - if ( token == token_source ) - { - while ( *pnt == ' ' || *pnt == '\t' ) - pnt++; - do_source( pnt ); - return; - } - - if ( token == token_then ) - { - if ( config_last != NULL && config_last->token == token_if ) - return; - syntax_error( "bogus 'then'" ); - } - -#if 0 - if ( token == token_unset ) - { - fprintf( stderr, "Ignoring 'unset' command\n" ); - return; - } -#endif - - if ( token == token_UNKNOWN ) - syntax_error( "unknown command" ); - - /* - * Allocate an item. - */ - cfg = malloc( sizeof(*cfg) ); - memset( cfg, 0, sizeof(*cfg) ); - if ( config_last == NULL ) - { config_last = config_list = cfg; } - else - { config_last->next = cfg; config_last = cfg; } - - /* - * Tokenize the arguments. - */ - while ( *pnt == ' ' || *pnt == '\t' ) - pnt++; - - cfg->token = token; - switch ( token ) - { - default: - syntax_error( "unknown token" ); - - case token_bool: - case token_tristate: - pnt = get_qstring ( pnt, &cfg->label ); - pnt = get_string ( pnt, &buffer ); - cfg->nameindex = get_varnum( buffer ); - break; - - case token_choice_header: - { - static int choose_number = 0; - char * choice_list; - - pnt = get_qstring ( pnt, &cfg->label ); - pnt = get_qstring ( pnt, &choice_list ); - pnt = get_string ( pnt, &cfg->value ); - cfg->nameindex = -(choose_number++); - tokenize_choices( cfg, choice_list ); - free( choice_list ); - } - break; - - case token_comment: - pnt = get_qstring(pnt, &cfg->label); - if ( last_menuoption != NULL ) - { - pnt = get_qstring(pnt, &cfg->label); - if (cfg->label == NULL) - syntax_error( "missing comment text" ); - last_menuoption->label = cfg->label; - last_menuoption = NULL; - } - break; - - case token_define_bool: - case token_define_tristate: - pnt = get_string( pnt, &buffer ); - cfg->nameindex = get_varnum( buffer ); - while ( *pnt == ' ' || *pnt == '\t' ) - pnt++; - if ( ( pnt[0] == 'Y' || pnt[0] == 'M' || pnt[0] == 'N' - || pnt[0] == 'y' || pnt[0] == 'm' || pnt[0] == 'n' ) - && ( pnt[1] == '\0' || pnt[1] == ' ' || pnt[1] == '\t' ) ) - { - if ( *pnt == 'n' || *pnt == 'N' ) cfg->value = strdup( "CONSTANT_N" ); - else if ( *pnt == 'y' || *pnt == 'Y' ) cfg->value = strdup( "CONSTANT_Y" ); - else if ( *pnt == 'm' || *pnt == 'M' ) cfg->value = strdup( "CONSTANT_M" ); - } - else if ( *pnt == '$' ) - { - pnt++; - pnt = get_string( pnt, &cfg->value ); - } - else - { - syntax_error( "unknown define_bool value" ); - } - get_varnum( cfg->value ); - break; - - case token_define_hex: - case token_define_int: - pnt = get_string( pnt, &buffer ); - cfg->nameindex = get_varnum( buffer ); - pnt = get_string( pnt, &cfg->value ); - break; - - case token_define_string: - pnt = get_string( pnt, &buffer ); - cfg->nameindex = get_varnum( buffer ); - pnt = get_qnqstring( pnt, &cfg->value ); - if (cfg->value == NULL) - syntax_error( "missing value" ); - break; - - case token_dep_bool: - case token_dep_mbool: - case token_dep_tristate: - pnt = get_qstring ( pnt, &cfg->label ); - pnt = get_string ( pnt, &buffer ); - cfg->nameindex = get_varnum( buffer ); - - while ( *pnt == ' ' || *pnt == '\t' ) - pnt++; - - dep_ptr = &(cfg->depend); - - do { - *dep_ptr = (struct dependency *) malloc( sizeof( struct dependency ) ); - (*dep_ptr)->next = NULL; - - if ( ( pnt[0] == 'Y' || pnt[0] == 'M' || pnt[0] == 'N' - || pnt[0] == 'y' || pnt[0] == 'm' || pnt[0] == 'n' ) - && ( pnt[1] == '\0' || pnt[1] == ' ' || pnt[1] == '\t' ) ) - { - /* dep_tristate 'foo' CONFIG_FOO m */ - if ( pnt[0] == 'Y' || pnt[0] == 'y' ) - (*dep_ptr)->name = strdup( "CONSTANT_Y" ); - else if ( pnt[0] == 'N' || pnt[0] == 'n' ) - (*dep_ptr)->name = strdup( "CONSTANT_N" ); - else - (*dep_ptr)->name = strdup( "CONSTANT_M" ); - pnt++; - get_varnum( (*dep_ptr)->name ); - } - else if ( *pnt == '$' ) - { - pnt++; - pnt = get_string( pnt, &(*dep_ptr)->name ); - get_varnum( (*dep_ptr)->name ); - } - else - { - syntax_error( "can't handle dep_bool/dep_mbool/dep_tristate condition" ); - } - dep_ptr = &(*dep_ptr)->next; - while ( *pnt == ' ' || *pnt == '\t' ) - pnt++; - } while ( *pnt ); - - /* - * Create a conditional for this object's dependencies. - */ - { - char fake_if [1024]; - struct dependency * dep; - struct condition ** cond_ptr; - int first = 1; - - cond_ptr = &(cfg->cond); - for ( dep = cfg->depend; dep; dep = dep->next ) - { - if ( token == token_dep_tristate - && ! strcmp( dep->name, "CONSTANT_M" ) ) - { - continue; - } - if ( first ) - { - first = 0; - } - else - { - *cond_ptr = malloc( sizeof(struct condition) ); - memset( *cond_ptr, 0, sizeof(struct condition) ); - (*cond_ptr)->op = op_and; - cond_ptr = &(*cond_ptr)->next; - } - *cond_ptr = malloc( sizeof(struct condition) ); - memset( *cond_ptr, 0, sizeof(struct condition) ); - (*cond_ptr)->op = op_lparen; - if ( token == token_dep_bool ) - sprintf( fake_if, "[ \"$%s\" = \"y\" -o \"$%s\" = \"\" ]; then", - dep->name, dep->name ); - else - sprintf( fake_if, "[ \"$%s\" = \"y\" -o \"$%s\" = \"m\" -o \"$%s\" = \"\" ]; then", - dep->name, dep->name, dep->name ); - (*cond_ptr)->next = tokenize_if( fake_if ); - while ( *cond_ptr ) - cond_ptr = &(*cond_ptr)->next; - *cond_ptr = malloc( sizeof(struct condition) ); - memset( *cond_ptr, 0, sizeof(struct condition) ); - (*cond_ptr)->op = op_rparen; - cond_ptr = &(*cond_ptr)->next; - } - } - break; - - case token_else: - case token_endmenu: - case token_fi: - break; - - case token_hex: - case token_int: - pnt = get_qstring ( pnt, &cfg->label ); - pnt = get_string ( pnt, &buffer ); - cfg->nameindex = get_varnum( buffer ); - pnt = get_string ( pnt, &cfg->value ); - break; - - case token_string: - pnt = get_qstring ( pnt, &cfg->label ); - pnt = get_string ( pnt, &buffer ); - cfg->nameindex = get_varnum( buffer ); - pnt = get_qnqstring ( pnt, &cfg->value ); - if (cfg->value == NULL) - syntax_error( "missing initial value" ); - break; - - case token_if: - cfg->cond = tokenize_if( pnt ); - break; - - case token_mainmenu_name: - pnt = get_qstring( pnt, &cfg->label ); - break; - - case token_mainmenu_option: - if ( strncmp( pnt, "next_comment", 12 ) == 0 ) - last_menuoption = cfg; - else - pnt = get_qstring( pnt, &cfg->label ); - break; - - case token_unset: - pnt = get_string( pnt, &buffer ); - cfg->nameindex = get_varnum( buffer ); - while ( *pnt == ' ' || *pnt == '\t' ) - pnt++; - while (*pnt) - { - cfg->next = (struct kconfig *) malloc( sizeof(struct kconfig) ); - memset( cfg->next, 0, sizeof(struct kconfig) ); - cfg = cfg->next; - cfg->token = token_unset; - pnt = get_string( pnt, &buffer ); - cfg->nameindex = get_varnum( buffer ); - while ( *pnt == ' ' || *pnt == '\t' ) - pnt++; - } - break; - } - return; -} - - -static char *genv; -static char *genv_extra; - -/* - * Implement the "source" command. - */ -static void do_source( const char * filename ) -{ - char buffer[2048], buffer2[1024], buffer3[1024]; - FILE * infile, *hfile, *ofile; - const char * old_file; - int old_lineno; - int offset; - static first = 0, first2 = 0, first3 = 0; - - strcpy(buffer, filename); - - /* open the file */ - if ( strcmp( filename, "-" ) == 0 ) - infile = stdin; - else - infile = fopen( filename, "r" ); - - /* if that failed, try second argument as path */ - if (( infile == NULL ) && (genv)) - { - sprintf( buffer, "%s/%s", genv, filename ); - infile = fopen( buffer, "r" ); - } - - /* if that failed, try third argument as path */ - if (( infile == NULL ) && (genv_extra)) - { - sprintf( buffer, "%s/%s", genv_extra, filename ); - infile = fopen( buffer, "r" ); - } - - if ( infile == NULL ) - { - sprintf( buffer, "unable to open %s", buffer ); - syntax_error( buffer ); - } else { - strcpy(buffer2, buffer); - strcpy(buffer3, buffer); - strcat(buffer, ".h"); - hfile = fopen( buffer, "r" ); - if (hfile != NULL) { - if (first) - ofile = fopen( "tkconfig.h", "a" ); - else { - ofile = fopen( "tkconfig.h", "w" ); - first = 1; - } - while (!feof(hfile)) { - offset = fread(buffer, 1, 1024, hfile); - fwrite(buffer, 1, offset, ofile); - } - fclose( hfile ); - fclose( ofile ); - } - strcat(buffer2, ".help"); - hfile = fopen( buffer2, "r" ); - if (hfile != NULL) { - if (first2) - ofile = fopen( "config.help", "a" ); - else { - ofile = fopen( "config.help", "w" ); - first2 = 1; - } - while (!feof(hfile)) { - offset = fread(buffer, 1, 1024, hfile); - fwrite(buffer, 1, offset, ofile); - } - fclose( hfile ); - fclose( ofile ); - } - strcat(buffer3, ".vhd"); - hfile = fopen( buffer3, "r" ); - if (hfile != NULL) { - if (first3) - ofile = fopen( "config.vhd.h", "a" ); - else { - ofile = fopen( "config.vhd.h", "w" ); - first3 = 1; - } - while (!feof(hfile)) { - offset = fread(buffer, 1, 1024, hfile); - fwrite(buffer, 1, offset, ofile); - } - fclose( hfile ); - fclose( ofile ); - } - } - - /* push the new file name and line number */ - old_file = current_file; - old_lineno = lineno; - current_file = filename; - lineno = 0; - - /* read and process lines */ - for ( offset = 0; ; ) - { - char * pnt; - - /* read a line */ - fgets( buffer + offset, sizeof(buffer) - offset, infile ); - if ( feof( infile ) ) - break; - lineno++; - - /* strip the trailing return character */ - pnt = buffer + strlen(buffer) - 1; - if ( *pnt == '\n' ) - *pnt-- = '\0'; - - /* eat \ NL pairs */ - if ( *pnt == '\\' ) - { - offset = pnt - buffer; - continue; - } - - /* tokenize this line */ - tokenize_line( buffer ); - offset = 0; - } - - /* that's all, folks */ - if ( infile != stdin ) - fclose( infile ); - current_file = old_file; - lineno = old_lineno; - return; -} - - - -/* - * Main program. - */ -int main( int argc, char * argv [] ) -{ - if (argc >= 3) genv = argv[2]; - if (argc == 4) genv_extra = argv[3]; - do_source ( argv[1] ); - fix_conditionals ( config_list ); - dump_tk_script ( config_list ); - return 0; -} diff --git a/grlib-original/bin/tkconfig/tkparse.h b/grlib-original/bin/tkconfig/tkparse.h deleted file mode 100644 index 1ca16b185..000000000 --- a/grlib-original/bin/tkconfig/tkparse.h +++ /dev/null @@ -1,127 +0,0 @@ -/* - * tkparse.h - */ - -/* - * Token types (mostly statement types). - */ - -enum e_token -{ - token_UNKNOWN, - token_bool, - token_choice_header, - token_choice_item, - token_comment, - token_define_bool, - token_define_hex, - token_define_int, - token_define_string, - token_define_tristate, - token_dep_bool, - token_dep_mbool, - token_dep_tristate, - token_else, - token_endmenu, - token_fi, - token_hex, - token_if, - token_int, - token_mainmenu_name, - token_mainmenu_option, - token_source, - token_string, - token_then, - token_tristate, - token_unset, -}; - -/* - * Operator types for conditionals. - */ - -enum operator -{ - op_eq, - op_neq, - op_and, - op_and1, - op_or, - op_bang, - op_lparen, - op_rparen, - op_constant, - op_variable, - op_true, - op_false, - op_nuked -}; - -/* - * Conditions come in linked lists. - * Some operators take strings: - * - * op_constant "foo" - * op_variable "$ARCH", "$CONFIG_PMAC", "$CONFIG_EXPERIMENTAL" - * - * Most "$..." constructs refer to a variable which is defined somewhere - * in the script. Note that it is legal to test variables which are never - * defined, such as variables that are meaningful only on other architectures. - */ - -struct condition -{ - struct condition * next; - enum operator op; - const char * str; /* op_constant */ - int nameindex; /* op_variable */ -}; - -/* - * Dependency list for dep_bool, dep_mbool, dep_tristate - */ - -struct dependency -{ - char * name; - struct dependency * next; -}; - -/* - * A statement from a config.in file - */ - -struct kconfig -{ - struct kconfig * next; - enum e_token token; - int nameindex; - char * label; - char * value; - struct condition * cond; - struct dependency * depend; /* token_dep_tristate */ - struct kconfig * cfg_parent; /* token_choice_item */ - - /* used only in tkgen.c */ - int menu_number; - int menu_line; - struct kconfig * menu_next; -}; - -struct variable -{ - char * name; - char defined; - char global_written; -}; - -extern struct variable vartable[]; -extern int max_varnum; - -/* - * Prototypes - */ - -extern void fix_conditionals ( struct kconfig * scfg ); /* tkcond.c */ -extern void dump_tk_script ( struct kconfig * scfg ); /* tkgen.c */ -extern int get_varnum ( char * name ); /* tkparse.c */ diff --git a/grlib-original/bin/top.dc b/grlib-original/bin/top.dc deleted file mode 100644 index fd2bca53e..000000000 --- a/grlib-original/bin/top.dc +++ /dev/null @@ -1,12 +0,0 @@ -catch {sh mkdir synopsys} -set objects synopsys -#set trans_dc_max_depth 1 -#set hdlin_seqmap_sync_search_depth 1 -#set hdlin_nba_rewrite false -set hdlin_ff_always_sync_set_reset true -set hdlin_ff_always_async_set_reset false -#set hdlin_infer_complex_set_reset true -#set hdlin_translate_off_skip_text true -set suppress_errors VHDL-2285 -#set hdlin_use_carry_in true -source compile.dc diff --git a/grlib-original/bin/top.rc b/grlib-original/bin/top.rc deleted file mode 100644 index 208c1789a..000000000 --- a/grlib-original/bin/top.rc +++ /dev/null @@ -1,3 +0,0 @@ -set_attribute input_pragma_keyword "cadence synopsys get2chip g2c fast ambit pragma" -include compile.rc - diff --git a/grlib-original/bin/wish b/grlib-original/bin/wish deleted file mode 100755 index 8bb7aeede..000000000 --- a/grlib-original/bin/wish +++ /dev/null @@ -1 +0,0 @@ -wish84.exe "$@" diff --git a/grlib-original/bin/xgrlib.tcl b/grlib-original/bin/xgrlib.tcl deleted file mode 100755 index 542a0f996..000000000 --- a/grlib-original/bin/xgrlib.tcl +++ /dev/null @@ -1,1194 +0,0 @@ -#!/bin/sh -# the next line restarts using wish\ -exec wish "$0" "$@" - -if {![info exists vTcl(sourcing)]} { - - package require Tk - switch $tcl_platform(platform) { - windows { - option add *Button.padY 0 - } - default { - option add *Scrollbar.width 10 - option add *Scrollbar.highlightThickness 0 - option add *Scrollbar.elementBorderWidth 2 - option add *Scrollbar.borderWidth 2 - } - } - -} - -############################################################################# -# Visual Tcl v1.60 Project -# - - -################################# -# VTCL LIBRARY PROCEDURES -# - -if {![info exists vTcl(sourcing)]} { -############################################################################# -## Library Procedure: Window - -proc ::Window {args} { - ## This procedure may be used free of restrictions. - ## Exception added by Christian Gavin on 08/08/02. - ## Other packages and widget toolkits have different licensing requirements. - ## Please read their license agreements for details. - - global vTcl - foreach {cmd name newname} [lrange $args 0 2] {} - set rest [lrange $args 3 end] - if {$name == "" || $cmd == ""} { return } - if {$newname == ""} { set newname $name } - if {$name == "."} { wm withdraw $name; return } - set exists [winfo exists $newname] - switch $cmd { - show { - if {$exists} { - wm deiconify $newname - } elseif {[info procs vTclWindow$name] != ""} { - eval "vTclWindow$name $newname $rest" - } - if {[winfo exists $newname] && [wm state $newname] == "normal"} { - vTcl:FireEvent $newname <> - } - } - hide { - if {$exists} { - wm withdraw $newname - vTcl:FireEvent $newname <> - return} - } - iconify { if $exists {wm iconify $newname; return} } - destroy { if $exists {destroy $newname; return} } - } -} -############################################################################# -## Library Procedure: vTcl:DefineAlias - -proc ::vTcl:DefineAlias {target alias widgetProc top_or_alias cmdalias} { - ## This procedure may be used free of restrictions. - ## Exception added by Christian Gavin on 08/08/02. - ## Other packages and widget toolkits have different licensing requirements. - ## Please read their license agreements for details. - - global widget - set widget($alias) $target - set widget(rev,$target) $alias - if {$cmdalias} { - interp alias {} $alias {} $widgetProc $target - } - if {$top_or_alias != ""} { - set widget($top_or_alias,$alias) $target - if {$cmdalias} { - interp alias {} $top_or_alias.$alias {} $widgetProc $target - } - } -} -############################################################################# -## Library Procedure: vTcl:DoCmdOption - -proc ::vTcl:DoCmdOption {target cmd} { - ## This procedure may be used free of restrictions. - ## Exception added by Christian Gavin on 08/08/02. - ## Other packages and widget toolkits have different licensing requirements. - ## Please read their license agreements for details. - - ## menus are considered toplevel windows - set parent $target - while {[winfo class $parent] == "Menu"} { - set parent [winfo parent $parent] - } - - regsub -all {\%widget} $cmd $target cmd - regsub -all {\%top} $cmd [winfo toplevel $parent] cmd - - uplevel #0 [list eval $cmd] -} -############################################################################# -## Library Procedure: vTcl:FireEvent - -proc ::vTcl:FireEvent {target event {params {}}} { - ## This procedure may be used free of restrictions. - ## Exception added by Christian Gavin on 08/08/02. - ## Other packages and widget toolkits have different licensing requirements. - ## Please read their license agreements for details. - - ## The window may have disappeared - if {![winfo exists $target]} return - ## Process each binding tag, looking for the event - foreach bindtag [bindtags $target] { - set tag_events [bind $bindtag] - set stop_processing 0 - foreach tag_event $tag_events { - if {$tag_event == $event} { - set bind_code [bind $bindtag $tag_event] - foreach rep "\{%W $target\} $params" { - regsub -all [lindex $rep 0] $bind_code [lindex $rep 1] bind_code - } - set result [catch {uplevel #0 $bind_code} errortext] - if {$result == 3} { - ## break exception, stop processing - set stop_processing 1 - } elseif {$result != 0} { - bgerror $errortext - } - break - } - } - if {$stop_processing} {break} - } -} -############################################################################# -## Library Procedure: vTcl:Toplevel:WidgetProc - -proc ::vTcl:Toplevel:WidgetProc {w args} { - ## This procedure may be used free of restrictions. - ## Exception added by Christian Gavin on 08/08/02. - ## Other packages and widget toolkits have different licensing requirements. - ## Please read their license agreements for details. - - if {[llength $args] == 0} { - ## If no arguments, returns the path the alias points to - return $w - } - set command [lindex $args 0] - set args [lrange $args 1 end] - switch -- [string tolower $command] { - "setvar" { - foreach {varname value} $args {} - if {$value == ""} { - return [set ::${w}::${varname}] - } else { - return [set ::${w}::${varname} $value] - } - } - "hide" - "show" { - Window [string tolower $command] $w - } - "showmodal" { - ## modal dialog ends when window is destroyed - Window show $w; raise $w - grab $w; tkwait window $w; grab release $w - } - "startmodal" { - ## ends when endmodal called - Window show $w; raise $w - set ::${w}::_modal 1 - grab $w; tkwait variable ::${w}::_modal; grab release $w - } - "endmodal" { - ## ends modal dialog started with startmodal, argument is var name - set ::${w}::_modal 0 - Window hide $w - } - default { - uplevel $w $command $args - } - } -} -############################################################################# -## Library Procedure: vTcl:WidgetProc - -proc ::vTcl:WidgetProc {w args} { - ## This procedure may be used free of restrictions. - ## Exception added by Christian Gavin on 08/08/02. - ## Other packages and widget toolkits have different licensing requirements. - ## Please read their license agreements for details. - - if {[llength $args] == 0} { - ## If no arguments, returns the path the alias points to - return $w - } - - set command [lindex $args 0] - set args [lrange $args 1 end] - uplevel $w $command $args -} -############################################################################# -## Library Procedure: vTcl:toplevel - -proc ::vTcl:toplevel {args} { - ## This procedure may be used free of restrictions. - ## Exception added by Christian Gavin on 08/08/02. - ## Other packages and widget toolkits have different licensing requirements. - ## Please read their license agreements for details. - - uplevel #0 eval toplevel $args - set target [lindex $args 0] - namespace eval ::$target {set _modal 0} -} -} - - -if {[info exists vTcl(sourcing)]} { - -proc vTcl:project:info {} { - set base .top60 - namespace eval ::widgets::$base { - set set,origin 1 - set set,size 1 - set runvisible 1 - } - namespace eval ::widgets::$base.m78 { - array set save {-tearoff 1} - namespace eval subOptions { - array set save {-command 1 -label 1 -menu 1} - } - } - set site_3_0 $base.m78 - namespace eval ::widgets::$site_3_0.men79 { - array set save {-tearoff 1} - namespace eval subOptions { - array set save {-accelerator 1 -command 1 -label 1 -menu 1} - } - } - namespace eval ::widgets::$base.cpd86 { - array set save {-borderwidth 1} - } - set site_3_0 $base.cpd86 - namespace eval ::widgets::$site_3_0.01 { - array set save {-borderwidth 1 -height 1 -relief 1 -width 1} - } - set site_4_0 $site_3_0.01 - namespace eval ::widgets::$site_4_0.fra82 { - array set save {-borderwidth 1 -height 1} - } - namespace eval ::widgets::$site_4_0.cpd88 { - array set save {-height 1 -width 1} - } - set site_5_0 $site_4_0.cpd88 - namespace eval ::widgets::$site_5_0.01 { - array set save {-command 1 -orient 1} - } - namespace eval ::widgets::$site_5_0.02 { - array set save {-command 1} - } - namespace eval ::widgets::$site_5_0.03 { - array set save {-font 1 -height 1 -width 1 -xscrollcommand 1 -yscrollcommand 1} - } - namespace eval ::widgets::$site_3_0.02 { - array set save {-borderwidth 1 -text 1} - } - namespace eval ::widgets::$base.but65 { - array set save {-command 1 -foreground 1 -text 1} - } - namespace eval ::widgets::$base.lab61 { - array set save {-foreground 1 -highlightcolor 1 -text 1} - } - set site_3_0 $base.lab61 - namespace eval ::widgets::$site_3_0.but62 { - array set save {-command 1 -foreground 1 -text 1} - } - namespace eval ::widgets::$site_3_0.men63 { - array set save {-menu 1 -padx 1 -pady 1 -relief 1 -text 1 -textvariable 1} - } - namespace eval ::widgets::$site_3_0.men63.m { - array set save {-tearoff 1} - namespace eval subOptions { - array set save {-command 1 -label 1} - } - } - namespace eval ::widgets::$site_3_0.but74 { - array set save {-_tooltip 1 -command 1 -compound 1 -default 1 -foreground 1 -height 1 -text 1} - } - namespace eval ::widgets::$site_3_0.che62 { - array set save {-disabledforeground 1 -text 1 -variable 1} - } - namespace eval ::widgets::$site_3_0.but63 { - array set save {-_tooltip 1 -command 1 -text 1} - } - namespace eval ::widgets::$base.lab67 { - array set save {-foreground 1 -highlightcolor 1 -text 1} - } - set site_3_0 $base.lab67 - namespace eval ::widgets::$site_3_0.men68 { - array set save {-menu 1 -padx 1 -pady 1 -relief 1 -text 1 -textvariable 1} - } - namespace eval ::widgets::$site_3_0.men68.m { - array set save {-tearoff 1} - namespace eval subOptions { - array set save {-command 1 -label 1} - } - } - namespace eval ::widgets::$site_3_0.but69 { - array set save {-command 1 -foreground 1 -text 1} - } - namespace eval ::widgets::$site_3_0.che70 { - array set save {-text 1 -variable 1} - } - namespace eval ::widgets::$site_3_0.but61 { - array set save {-_tooltip 1 -command 1 -text 1} - } - namespace eval ::widgets::$base.lab71 { - array set save {-foreground 1 -highlightcolor 1 -text 1} - } - set site_3_0 $base.lab71 - namespace eval ::widgets::$site_3_0.men72 { - array set save {-menu 1 -padx 1 -pady 1 -relief 1 -text 1 -textvariable 1} - } - namespace eval ::widgets::$site_3_0.men72.m { - array set save {-tearoff 1} - namespace eval subOptions { - array set save {-command 1 -label 1} - } - } - namespace eval ::widgets::$site_3_0.but73 { - array set save {-command 1 -foreground 1 -text 1} - } - namespace eval ::widgets::$site_3_0.che75 { - array set save {-text 1 -variable 1} - } - namespace eval ::widgets::$site_3_0.but60 { - array set save {-_tooltip 1 -command 1 -text 1} - } - namespace eval ::widgets::$base.cpd77 { - array set save {-borderwidth 1 -height 1} - } - set site_3_0 $base.cpd77 - namespace eval ::widgets::$site_3_0.01 { - array set save {-anchor 1 -text 1} - } - namespace eval ::widgets::$site_3_0.02 { - array set save {-cursor 1 -state 1 -textvariable 1} - } - namespace eval ::widgets::$base.cpd78 { - array set save {-borderwidth 1 -height 1} - } - set site_3_0 $base.cpd78 - namespace eval ::widgets::$site_3_0.01 { - array set save {-anchor 1 -text 1} - } - namespace eval ::widgets::$site_3_0.02 { - array set save {-cursor 1 -state 1 -textvariable 1} - } - namespace eval ::widgets::$base.cpd79 { - array set save {-borderwidth 1 -height 1} - } - set site_3_0 $base.cpd79 - namespace eval ::widgets::$site_3_0.01 { - array set save {-anchor 1 -text 1} - } - namespace eval ::widgets::$site_3_0.02 { - array set save {-cursor 1 -state 1 -textvariable 1} - } - namespace eval ::widgets::$base.cpd80 { - array set save {-borderwidth 1 -height 1} - } - set site_3_0 $base.cpd80 - namespace eval ::widgets::$site_3_0.01 { - array set save {-anchor 1 -text 1} - } - namespace eval ::widgets::$site_3_0.02 { - array set save {-cursor 1 -state 1 -textvariable 1} - } - namespace eval ::widgets::$base.cpd60 { - array set save {-_tooltip 1 -command 1 -text 1} - } - namespace eval ::widgets::$base.but60 { - array set save {-_tooltip 1 -command 1 -text 1} - } - namespace eval ::widgets::$base.but61 { - array set save {-_tooltip 1 -command 1 -text 1} - } - namespace eval ::widgets::$base.but62 { - array set save {-_tooltip 1 -command 1 -text 1} - } - namespace eval ::widgets::$base.but64 { - array set save {-command 1 -text 1} - } - namespace eval ::widgets_bindings { - set tagslist {_TopLevel _vTclBalloon} - } - namespace eval ::vTcl::modules::main { - set procs { - init - main - _act:log - lls - docmd - runsyn - runflow - runpr - runsim - simbuild - simclean - synclean - prclean - } - set compounds { - } - set projectType single - } -} -} - -################################# -# USER DEFINED PROCEDURES -# -############################################################################# -## Procedure: main - -proc ::main {argc argv} { -global grproject project_name synbatch prbatch simprog simmenu -global simbatch syntool synmenu prmenu prtool prbatch -global board tech device - -set grproject [lindex $argv 0] -set tech [lindex $argv 1] -set device [lindex $argv 2] -set board [lindex $argv 3] - -set project_name $grproject - -set synbatch 0 -set syntool "synplify" -set synmenu "Synplify" -set prbatch 0 -set simprog "vsim" -set simmenu "Modelsim" -set simbatch 0 -set prbatch 0 -set prmenu "None" -set prtool "none" -} -############################################################################# -## Procedure: _act:log - -proc ::_act:log {} { -global widget - - global input run_next_cmd - if [eof $input] { - catch [close $input] - set run_next_cmd 1 - } else { - gets $input line - Text2 insert end $line\n - Text2 see end - } -} -############################################################################# -## Procedure: lls - -proc ::lls {} { -global widget - -global input run_next_cmd - - variable command "ls -l" - if [catch {open "|$command "} input] { - Text2 insert end "Can't find the executable.\n" - } else { - set run_next_cmd 0 - fileevent $input readable {_act:log} - Text2 insert end $command\n - vwait run_next_cmd - } -} -############################################################################# -## Procedure: docmd - -proc ::docmd {cmd} { -global widget - -global input run_next_cmd - - variable command $cmd - if [catch {open "|$command "} input] { - Text2 insert end "Can't find the executable.\n" - } else { - set run_next_cmd 0 - fileevent $input readable {_act:log} - Text2 insert end $command\n - vwait run_next_cmd - } -} -############################################################################# -## Procedure: runsyn - -proc ::runsyn {} { -global widget grproject syntool synbatch - - if {$synbatch == "0"} { - docmd "make $syntool-launch" - } else { - docmd "make $syntool-map" - } -} -############################################################################# -## Procedure: runflow - -proc ::runflow {} { -global widget grproject syntool synbatch prtool - - switch $syntool { - "synplify" { - switch $prtool { - "none" {docmd "make synplify"} - "designer" {docmd "fpgaax"} - "quartus" {docmd "make fpgaq"} - "ise" {docmd "make fpgasynp"} - } - } - "xst" { - switch $prtool { - "none" {docmd "make xst"} - "ise" {docmd "make fpgaxst"} - default {} - } - } - default {} - } -} -############################################################################# -## Procedure: runpr - -proc ::runpr {} { -global widget grproject syntool prbatch prtool - -if {$prbatch == "0"} { - switch $prtool { - "actel" { docmd "make actel-launch"} - "quartus" { - if {$syntool == "synplify"} {docmd "make quartus-launch-synp"} - if {$syntool == "quartus"} {docmd "make quartus-launch"} - } - "ise" { - if {$syntool == "synplify"} {docmd "make ise-launch-synp"} - if {$syntool == "xst"} {docmd "make ise-launch"} - } - } -} - -if {$prbatch != "0"} { - switch $prtool { - "actel" { docmd "make actel"} - "quartus" { - if {$syntool == "synplify"} {docmd "make quartus-synp"} - if {$syntool == "quartus"} {docmd "make quartus-route"} - } - "ise" { - if {$syntool == "synplify"} {docmd "make ise-synp"} - if {$syntool == "xst"} {docmd "make ise"} - } - } -} -} -############################################################################# -## Procedure: runsim - -proc ::runsim {} { -global widget grproject simprog simbatch - - if {$simbatch == "0"} { - docmd "make $simprog-launch" - } else { - docmd "make $simprog-run" - } -} -############################################################################# -## Procedure: simbuild - -proc ::simbuild {} { -global widget grproject simprog simbatch - -docmd "make $simprog" -} -############################################################################# -## Procedure: simclean - -proc ::simclean {} { -global widget grproject simprog simbatch - -docmd "make $simprog-clean" -} -############################################################################# -## Procedure: synclean - -proc ::synclean {} { -global widget grproject syntool synbatch - - docmd "make $syntool-clean" -} -############################################################################# -## Procedure: prclean - -proc ::prclean {} { -global widget grproject prtool synbatch - - docmd "make $prtool-clean" -} - -############################################################################# -## Initialization Procedure: init - -proc ::init {argc argv} { -global input run_next_cmd grproject - -set run_next_cmd 1 -} - -init $argc $argv - -################################# -# VTCL GENERATED GUI PROCEDURES -# - -proc vTclWindow. {base} { - if {$base == ""} { - set base . - } - ################### - # CREATING WIDGETS - ################### - wm focusmodel $top passive - wm geometry $top 1x1+0+0; update - wm maxsize $top 1265 994 - wm minsize $top 1 1 - wm overrideredirect $top 0 - wm resizable $top 1 1 - wm withdraw $top - wm title $top "vtcl.tcl" - bindtags $top "$top Vtcl.tcl all" - vTcl:FireEvent $top <> - wm protocol $top WM_DELETE_WINDOW "vTcl:FireEvent $top <>" - - ################### - # SETTING GEOMETRY - ################### - - vTcl:FireEvent $base <> -} - -proc vTclWindow.top60 {base} { - if {$base == ""} { - set base .top60 - } - if {[winfo exists $base]} { - wm deiconify $base; return - } - set top $base - ################### - # CREATING WIDGETS - ################### - vTcl:toplevel $top -class Toplevel \ - -menu "$top.m78" -highlightcolor black - wm focusmodel $top passive - wm geometry $top 609x477+358+121; update - wm maxsize $top 1009 738 - wm minsize $top 1 1 - wm overrideredirect $top 0 - wm resizable $top 1 1 - wm deiconify $top - wm title $top "GRLIB Implementation Tool" - vTcl:DefineAlias "$top" "Toplevel1" vTcl:Toplevel:WidgetProc "" 1 - bindtags $top "$top Toplevel all _TopLevel" - vTcl:FireEvent $top <> - wm protocol $top WM_DELETE_WINDOW "vTcl:FireEvent $top <>" - - menu $top.m78 \ - -tearoff 1 - $top.m78 add cascade \ - -menu "$top.m78.men79" -command {} -label File - set site_3_0 $top.m78 - menu $site_3_0.men79 \ - -tearoff 0 - $site_3_0.men79 add command \ - -accelerator Ctrl-Q -command exit -label Quit - frame $top.cpd86 \ - -borderwidth 2 - vTcl:DefineAlias "$top.cpd86" "Frame3" vTcl:WidgetProc "Toplevel1" 1 - set site_3_0 $top.cpd86 - frame $site_3_0.01 \ - -borderwidth 2 -relief groove -height 98 -width 125 - vTcl:DefineAlias "$site_3_0.01" "Frame4" vTcl:WidgetProc "Toplevel1" 1 - set site_4_0 $site_3_0.01 - frame $site_4_0.fra82 \ - -borderwidth 2 -height 10 - vTcl:DefineAlias "$site_4_0.fra82" "Frame5" vTcl:WidgetProc "Toplevel1" 1 - frame $site_4_0.cpd88 \ - -height 219 -width 584 - vTcl:DefineAlias "$site_4_0.cpd88" "Frame7" vTcl:WidgetProc "Toplevel1" 1 - set site_5_0 $site_4_0.cpd88 - scrollbar $site_5_0.01 \ - -command "$site_5_0.03 xview" -orient horizontal - vTcl:DefineAlias "$site_5_0.01" "Scrollbar3" vTcl:WidgetProc "Toplevel1" 1 - scrollbar $site_5_0.02 \ - -command "$site_5_0.03 yview" - vTcl:DefineAlias "$site_5_0.02" "Scrollbar4" vTcl:WidgetProc "Toplevel1" 1 - text $site_5_0.03 \ - -font {Courier -12} -height 14 -width 80 \ - -xscrollcommand "$site_5_0.01 set" -yscrollcommand "$site_5_0.02 set" - vTcl:DefineAlias "$site_5_0.03" "Text2" vTcl:WidgetProc "Toplevel1" 1 - grid $site_5_0.01 \ - -in $site_5_0 -column 0 -row 1 -columnspan 1 -rowspan 1 -sticky ew - grid $site_5_0.02 \ - -in $site_5_0 -column 1 -row 0 -columnspan 1 -rowspan 1 -sticky ns - grid $site_5_0.03 \ - -in $site_5_0 -column 0 -row 0 -columnspan 1 -rowspan 1 -sticky nesw - pack $site_4_0.fra82 \ - -in $site_4_0 -anchor center -expand 0 -fill none -side top - place $site_4_0.cpd88 \ - -in $site_4_0 -x 9 -y 14 -width 584 -height 219 -anchor nw \ - -bordermode inside - label $site_3_0.02 \ - -borderwidth 1 -text Console - vTcl:DefineAlias "$site_3_0.02" "Label3" vTcl:WidgetProc "Toplevel1" 1 - pack $site_3_0.01 \ - -in $site_3_0 -anchor center -expand 1 -fill both -padx 5 -pady 5 \ - -side top - place $site_3_0.02 \ - -in $site_3_0 -x 15 -y 0 -anchor nw -bordermode ignore - button $top.but65 \ - -command exit -foreground #ff0000 -text Quit - vTcl:DefineAlias "$top.but65" "Button3" vTcl:WidgetProc "Toplevel1" 1 - labelframe $top.lab61 \ - -foreground black -text Simulation -highlightcolor black - vTcl:DefineAlias "$top.lab61" "Labelframe1" vTcl:WidgetProc "Toplevel1" 1 - set site_3_0 $top.lab61 - button $site_3_0.but62 \ - -command runsim -foreground #0000ff -text Run - vTcl:DefineAlias "$site_3_0.but62" "Button5" vTcl:WidgetProc "Toplevel1" 1 - menubutton $site_3_0.men63 \ - -menu "$site_3_0.men63.m" -padx 5 -pady 4 -relief raised \ - -text Modelsim -textvariable simmenu - vTcl:DefineAlias "$site_3_0.men63" "Menubutton1" vTcl:WidgetProc "Toplevel1" 1 - menu $site_3_0.men63.m \ - -tearoff 0 - $site_3_0.men63.m add command \ - \ - -command {global simprog simmenu -set simprog "vsim" -set simmenu "Modelsim"} \ - -label Modelsim - $site_3_0.men63.m add command \ - \ - -command {global simprog simmenu -set simprog "ncsim" -set simmenu "Ncsim"} \ - -label Ncsim - $site_3_0.men63.m add command \ - \ - -command {global simprog simmenu -set simprog "ghdl" -set simmenu "GHDL"} \ - -label GHDL - $site_3_0.men63.m add command \ - \ - -command {global simprog simmenu -set simprog "libero" -set simmenu "Libero"} \ - -label Libero - $site_3_0.men63.m add command \ - \ - -command {global simprog simmenu -set simprog "riviera" -set simmenu "Riviera"} \ - -label Riviera - $site_3_0.men63.m add command \ - \ - -command {global simprog simmenu -set simprog "avhdl" -set simmenu "Active-HDL GUI"} \ - -label {Active-HDL GUI} - $site_3_0.men63.m add command \ - \ - -command {global simprog simmenu -set simprog "vsimsa" -set simmenu "Active-HDL batch"} \ - -label {Active-HDL batch} - $site_3_0.men63.m add command \ - \ - -command {# TODO: Your menu handler hereglobal simprog simmenu -set simprog "sonata" -set simmenu "Sonata"} \ - -label Sonata - button $site_3_0.but74 \ - -command simbuild -compound none -default disabled \ - -foreground #009900 -height 26 -text Build - vTcl:DefineAlias "$site_3_0.but74" "Button8" vTcl:WidgetProc "Toplevel1" 1 - bindtags $site_3_0.but74 "$site_3_0.but74 Button $top all _vTclBalloon" - bind $site_3_0.but74 <> { - set ::vTcl::balloon::%W {compile grlib and local design} - } - checkbutton $site_3_0.che62 \ - -disabledforeground #a3a3a3 -text Batch -variable simbatch - vTcl:DefineAlias "$site_3_0.che62" "Checkbutton1" vTcl:WidgetProc "Toplevel1" 1 - button $site_3_0.but63 \ - -command simclean -text Clean - vTcl:DefineAlias "$site_3_0.but63" "Button9" vTcl:WidgetProc "Toplevel1" 1 - bindtags $site_3_0.but63 "$site_3_0.but63 Button $top all _vTclBalloon" - bind $site_3_0.but63 <> { - set ::vTcl::balloon::%W {remove generated files for selected tool} - } - place $site_3_0.but62 \ - -in $site_3_0 -x 125 -y 20 -width 49 -height 26 -anchor nw \ - -bordermode ignore - place $site_3_0.men63 \ - -in $site_3_0 -x 10 -y 20 -width 101 -height 26 -anchor nw \ - -bordermode ignore - place $site_3_0.but74 \ - -in $site_3_0 -x 331 -y 20 -width 50 -height 26 -anchor nw \ - -bordermode ignore - place $site_3_0.che62 \ - -in $site_3_0 -x 189 -y 22 -width 61 -height 22 -anchor nw \ - -bordermode ignore - place $site_3_0.but63 \ - -in $site_3_0 -x 261 -y 20 -width 58 -height 26 -anchor nw \ - -bordermode ignore - labelframe $top.lab67 \ - -foreground black -text {Place & route} -highlightcolor black - vTcl:DefineAlias "$top.lab67" "Labelframe2" vTcl:WidgetProc "Toplevel1" 1 - set site_3_0 $top.lab67 - menubutton $site_3_0.men68 \ - -menu "$site_3_0.men68.m" -padx 5 -pady 4 -relief raised -text None \ - -textvariable prmenu - vTcl:DefineAlias "$site_3_0.men68" "Menubutton3" vTcl:WidgetProc "Toplevel1" 1 - menu $site_3_0.men68.m \ - -tearoff 0 - $site_3_0.men68.m add command \ - -command {global prmenu prtool -set prmenu "None" -set prtool "none"} \ - -label None - $site_3_0.men68.m add command \ - \ - -command {global prmenu prtool -set prmenu "Actel Designer" -set prtool "actel"} \ - -label {Actel Designer} - $site_3_0.men68.m add command \ - \ - -command {global prmenu prtool -set prmenu "Quartus" -set prtool "quartus"} \ - -label Quartus - $site_3_0.men68.m add command \ - \ - -command {global prmenu prtool -set prmenu "Xilinx ISE" -set prtool "ise"} \ - -label {Xilinx ISE} - button $site_3_0.but69 \ - -command runpr -foreground #0000ff -text Run - vTcl:DefineAlias "$site_3_0.but69" "Button6" vTcl:WidgetProc "Toplevel1" 1 - checkbutton $site_3_0.che70 \ - -text Batch -variable prbatch - vTcl:DefineAlias "$site_3_0.che70" "Checkbutton2" vTcl:WidgetProc "Toplevel1" 1 - button $site_3_0.but61 \ - -command prclean -text Clean - vTcl:DefineAlias "$site_3_0.but61" "Button2" vTcl:WidgetProc "Toplevel1" 1 - bindtags $site_3_0.but61 "$site_3_0.but61 Button $top all _vTclBalloon" - bind $site_3_0.but61 <> { - set ::vTcl::balloon::%W {remove generated files for selected tool} - } - place $site_3_0.men68 \ - -in $site_3_0 -x 10 -y 20 -width 101 -height 26 -anchor nw \ - -bordermode ignore - place $site_3_0.but69 \ - -in $site_3_0 -x 125 -y 20 -width 49 -height 26 -anchor nw \ - -bordermode ignore - place $site_3_0.che70 \ - -in $site_3_0 -x 185 -y 20 -width 61 -height 22 -anchor nw \ - -bordermode ignore - place $site_3_0.but61 \ - -in $site_3_0 -x 261 -y 20 -width 58 -height 26 -anchor nw \ - -bordermode ignore - labelframe $top.lab71 \ - -foreground black -text Synthesis -highlightcolor black - vTcl:DefineAlias "$top.lab71" "Labelframe3" vTcl:WidgetProc "Toplevel1" 1 - set site_3_0 $top.lab71 - menubutton $site_3_0.men72 \ - -menu "$site_3_0.men72.m" -padx 5 -pady 4 -relief raised \ - -text Synplify -textvariable synmenu - vTcl:DefineAlias "$site_3_0.men72" "Menubutton2" vTcl:WidgetProc "Toplevel1" 1 - menu $site_3_0.men72.m \ - -tearoff 0 - $site_3_0.men72.m add command \ - \ - -command {global synmenu syntool -set synmenu "Synplify" -set syntool "synplify"} \ - -label Synplify - $site_3_0.men72.m add command \ - \ - -command {global synmenu syntool -set synmenu "Quartus" -set syntool "quartus"} \ - -label Quartus - $site_3_0.men72.m add command \ - \ - -command {global synmenu syntool -set synmenu "Xilinx ISE" -set syntool "xst"} \ - -label {Xilinx ISE} - $site_3_0.men72.m add command \ - \ - -command {global synmenu syntool -set synmenu "Precision" -set syntool "precision"} \ - -label Precision - $site_3_0.men72.m add command \ - \ - -command {global synmenu syntool -set synmenu "Libero" -set syntool "libero"} \ - -label Libero - button $site_3_0.but73 \ - -command runsyn -foreground #0000ff -text Run - vTcl:DefineAlias "$site_3_0.but73" "Button7" vTcl:WidgetProc "Toplevel1" 1 - checkbutton $site_3_0.che75 \ - -text Batch -variable synbatch - vTcl:DefineAlias "$site_3_0.che75" "Checkbutton3" vTcl:WidgetProc "Toplevel1" 1 - button $site_3_0.but60 \ - -command synclean -text Clean - vTcl:DefineAlias "$site_3_0.but60" "Button1" vTcl:WidgetProc "Toplevel1" 1 - bindtags $site_3_0.but60 "$site_3_0.but60 Button $top all _vTclBalloon" - bind $site_3_0.but60 <> { - set ::vTcl::balloon::%W {remove generated files for selected tool} - } - place $site_3_0.men72 \ - -in $site_3_0 -x 10 -y 20 -width 101 -height 26 -anchor nw \ - -bordermode ignore - place $site_3_0.but73 \ - -in $site_3_0 -x 125 -y 20 -width 49 -height 26 -anchor nw \ - -bordermode ignore - place $site_3_0.che75 \ - -in $site_3_0 -x 187 -y 21 -width 61 -height 22 -anchor nw \ - -bordermode ignore - place $site_3_0.but60 \ - -in $site_3_0 -x 261 -y 20 -width 58 -height 26 -anchor nw \ - -bordermode ignore - frame $top.cpd77 \ - -borderwidth 1 -height 30 - vTcl:DefineAlias "$top.cpd77" "Frame6" vTcl:WidgetProc "Toplevel1" 1 - set site_3_0 $top.cpd77 - label $site_3_0.01 \ - -anchor w -text Tech: - vTcl:DefineAlias "$site_3_0.01" "Label2" vTcl:WidgetProc "Toplevel1" 1 - entry $site_3_0.02 \ - -cursor {} -state readonly -textvariable tech - vTcl:DefineAlias "$site_3_0.02" "Entry2" vTcl:WidgetProc "Toplevel1" 1 - pack $site_3_0.01 \ - -in $site_3_0 -anchor center -expand 0 -fill none -padx 2 -pady 2 \ - -side left - pack $site_3_0.02 \ - -in $site_3_0 -anchor center -expand 1 -fill x -padx 2 -pady 2 \ - -side right - frame $top.cpd78 \ - -borderwidth 1 -height 30 - vTcl:DefineAlias "$top.cpd78" "Frame8" vTcl:WidgetProc "Toplevel1" 1 - set site_3_0 $top.cpd78 - label $site_3_0.01 \ - -anchor w -text Device: - vTcl:DefineAlias "$site_3_0.01" "Label4" vTcl:WidgetProc "Toplevel1" 1 - entry $site_3_0.02 \ - -cursor {} -state readonly -textvariable device - vTcl:DefineAlias "$site_3_0.02" "Entry3" vTcl:WidgetProc "Toplevel1" 1 - pack $site_3_0.01 \ - -in $site_3_0 -anchor center -expand 0 -fill none -padx 2 -pady 2 \ - -side left - pack $site_3_0.02 \ - -in $site_3_0 -anchor center -expand 1 -fill x -padx 2 -pady 2 \ - -side right - frame $top.cpd79 \ - -borderwidth 1 -height 30 - vTcl:DefineAlias "$top.cpd79" "Frame9" vTcl:WidgetProc "Toplevel1" 1 - set site_3_0 $top.cpd79 - label $site_3_0.01 \ - -anchor w -text Board: - vTcl:DefineAlias "$site_3_0.01" "Label6" vTcl:WidgetProc "Toplevel1" 1 - entry $site_3_0.02 \ - -cursor {} -state readonly -textvariable board - vTcl:DefineAlias "$site_3_0.02" "Entry4" vTcl:WidgetProc "Toplevel1" 1 - pack $site_3_0.01 \ - -in $site_3_0 -anchor center -expand 0 -fill none -padx 2 -pady 2 \ - -side left - pack $site_3_0.02 \ - -in $site_3_0 -anchor center -expand 1 -fill x -padx 2 -pady 2 \ - -side right - frame $top.cpd80 \ - -borderwidth 1 -height 30 - vTcl:DefineAlias "$top.cpd80" "Frame10" vTcl:WidgetProc "Toplevel1" 1 - set site_3_0 $top.cpd80 - label $site_3_0.01 \ - -anchor w -text Project: - vTcl:DefineAlias "$site_3_0.01" "Label5" vTcl:WidgetProc "Toplevel1" 1 - entry $site_3_0.02 \ - -cursor {} -state readonly -textvariable project_name - vTcl:DefineAlias "$site_3_0.02" "Entry1" vTcl:WidgetProc "Toplevel1" 1 - pack $site_3_0.01 \ - -in $site_3_0 -anchor center -expand 0 -fill none -padx 2 -pady 2 \ - -side left - pack $site_3_0.02 \ - -in $site_3_0 -anchor center -expand 1 -fill x -padx 2 -pady 2 \ - -side right - button $top.cpd60 \ - -command {docmd "make xconfig"} -text xconfig - vTcl:DefineAlias "$top.cpd60" "Button4" vTcl:WidgetProc "Toplevel1" 1 - bindtags $top.cpd60 "$top.cpd60 Button $top all _vTclBalloon" - bind $top.cpd60 <> { - set ::vTcl::balloon::%W {run grlib/leon3 configuration tool} - } - button $top.but60 \ - -command {docmd "make ise-prog-prom"} -text {prog prom} - vTcl:DefineAlias "$top.but60" "buildvermod" vTcl:WidgetProc "Toplevel1" 1 - bindtags $top.but60 "$top.but60 Button $top all _vTclBalloon" - bind $top.but60 <> { - set ::vTcl::balloon::%W {Program FPGA prom} - } - button $top.but61 \ - -command {docmd "make clean"} -text {clean all} - vTcl:DefineAlias "$top.but61" "Button10" vTcl:WidgetProc "Toplevel1" 1 - bindtags $top.but61 "$top.but61 Button $top all _vTclBalloon" - bind $top.but61 <> { - set ::vTcl::balloon::%W {remove all generated files except compile scripts} - } - button $top.but62 \ - -command {docmd "make distclean"} -text distclean - vTcl:DefineAlias "$top.but62" "Button11" vTcl:WidgetProc "Toplevel1" 1 - bindtags $top.but62 "$top.but62 Button $top all _vTclBalloon" - bind $top.but62 <> { - set ::vTcl::balloon::%W {remove all generated file} - } - button $top.but64 \ - -command {docmd "make scripts"} -text scripts - vTcl:DefineAlias "$top.but64" "Button12" vTcl:WidgetProc "Toplevel1" 1 - ################### - # SETTING GEOMETRY - ################### - place $top.cpd86 \ - -in $top -x 0 -y 220 -width 612 -height 254 -anchor nw \ - -bordermode inside - place $top.but65 \ - -in $top -x 528 -y 60 -width 66 -height 26 -anchor nw \ - -bordermode ignore - place $top.lab61 \ - -in $top -x 20 -y 10 -width 396 -height 56 -anchor nw \ - -bordermode ignore - place $top.lab67 \ - -in $top -x 20 -y 150 -width 336 -height 56 -anchor nw \ - -bordermode ignore - place $top.lab71 \ - -in $top -x 20 -y 80 -width 336 -height 56 -anchor nw \ - -bordermode ignore - place $top.cpd77 \ - -in $top -x 404 -y 133 -width 197 -height 28 -anchor nw \ - -bordermode ignore - place $top.cpd78 \ - -in $top -x 392 -y 161 -width 209 -height 28 -anchor nw \ - -bordermode ignore - place $top.cpd79 \ - -in $top -x 398 -y 189 -width 203 -height 28 -anchor nw \ - -bordermode ignore - place $top.cpd80 \ - -in $top -x 391 -y 105 -width 210 -height 28 -anchor nw \ - -bordermode ignore - place $top.cpd60 \ - -in $top -x 528 -y 10 -width 66 -height 26 -anchor nw \ - -bordermode ignore - place $top.but60 \ - -in $top -x 450 -y 10 -width 79 -height 26 -anchor nw \ - -bordermode ignore - place $top.but61 \ - -in $top -x 450 -y 35 -width 79 -height 26 -anchor nw \ - -bordermode ignore - place $top.but62 \ - -in $top -x 450 -y 60 -width 79 -height 26 -anchor nw \ - -bordermode ignore - place $top.but64 \ - -in $top -x 528 -y 35 -width 66 -height 26 -anchor nw \ - -bordermode ignore - - vTcl:FireEvent $base <> -} - -############################################################################# -## Binding tag: _TopLevel - -bind "_TopLevel" <> { - if {![info exists _topcount]} {set _topcount 0}; incr _topcount -} -bind "_TopLevel" <> { - if {[set ::%W::_modal]} { - vTcl:Toplevel:WidgetProc %W endmodal - } else { - destroy %W; if {$_topcount == 0} {exit} - } -} -bind "_TopLevel" { - if {[winfo toplevel %W] == "%W"} {incr _topcount -1} -} -############################################################################# -## Binding tag: _vTclBalloon - - -if {![info exists vTcl(sourcing)]} { -bind "_vTclBalloon" <> { - namespace eval ::vTcl::balloon { - after cancel $id - if {[winfo exists .vTcl.balloon]} { - destroy .vTcl.balloon - } - set set 0 - } -} -bind "_vTclBalloon" <> { - if {$::vTcl::balloon::first != 1} {break} - - namespace eval ::vTcl::balloon { - set first 2 - if {![winfo exists .vTcl]} { - toplevel .vTcl; wm withdraw .vTcl - } - if {![winfo exists .vTcl.balloon]} { - toplevel .vTcl.balloon -bg black - } - wm overrideredirect .vTcl.balloon 1 - label .vTcl.balloon.l -text ${%W} -relief flat -bg #ffffaa -fg black -padx 2 -pady 0 -anchor w - pack .vTcl.balloon.l -side left -padx 1 -pady 1 - wm geometry .vTcl.balloon +[expr {[winfo rootx %W]+[winfo width %W]/2}]+[expr {[winfo rooty %W]+[winfo height %W]+4}] - set set 1 - } -} -bind "_vTclBalloon"