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DMA engine implementation with support for unaligned addresses and arbitrary number of bytes to transfer. Developed for the DRAC project.
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ilham lasfar / SafeSU
MIT LicenseUpdated -
HPES_HW / HDL_IP / EdgeSU
MIT LicenseUpdated -
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ampere-sw / WP2 / DART
GNU General Public License v3.0 or laterUpdated -
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Marc Solé i Bonet / Vortex Bender
Apache License 2.0Updated -
Set of AXI utility modules that I have needed to develop for several projects. This repo depends on the pulp axi interfaces https://github.com/pulp-platform/axi
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