- 26 Nov, 2019 1 commit
-
-
Guillem authored
-
- 14 Nov, 2019 1 commit
-
-
Guillem authored
TODO:individual TB and extend general PMU TB
-
- 12 Nov, 2019 1 commit
-
-
Guillem authored
They will kill execution of pwd
-
- 11 Nov, 2019 1 commit
-
-
Guillem authored
Cores seem to enter in deadlock, this disappears removing disacble_pmu, changing -O2 to -O1, etc
-
- 10 Nov, 2019 1 commit
-
-
Guillem authored
include RTL and software changes to run multicore SIMULATIONS with pmu, no FPGA tested. Includes yosys scripts for area calculation
-
- 18 Sep, 2019 2 commits
- 17 Sep, 2019 1 commit
-
-
Guillem authored
-
- 16 Sep, 2019 18 commits
-
-
Guillem authored
-
Guillem authored
-
Guillem authored
-
Guillem authored
Testbench showing commands and minimum functionalities of the unit
-
Guillem authored
-
Guillem authored
-
Guillem authored
For the TB an AXI-LITE master from verilog.pro has been added
-
Guillem authored
A set of unit tests are need for PMU and MCCU
-
Guillem authored
-
Guillem authored
Still a multidriven problem and need to implement refresh of write protected registers of MCCU and Low bits of main configuration registers
-
Guillem authored
non usable yet
-
Guillem authored
-
Guillem authored
conditions may be checking previous values or type mismatch is causing trubles
-
Guillem authored
BMC test of formal properties
-
Guillem authored
Basic functionality is shown in verilator TB
-
Guillem authored
Verilator not compiling, logic not tested
-
Guillem authored
-
Guillem authored
-
- 11 Sep, 2019 3 commits
- 06 Sep, 2019 1 commit
-
-
Guillem authored
-
- 04 Sep, 2019 1 commit
-
-
Guillem authored
For the TB an AXI-LITE master from verilog.pro has been added
-
- 02 Sep, 2019 1 commit
-
-
Guillem authored
A set of unit tests are need for PMU and MCCU
-
- 27 Aug, 2019 1 commit
-
-
Guillem authored
-
- 23 Aug, 2019 2 commits
- 29 Jul, 2019 3 commits
- 25 Jul, 2019 1 commit
-
-
Guillem authored
conditions may be checking previous values or type mismatch is causing trubles
-
- 23 Jul, 2019 1 commit
-
-
Guillem authored
BMC test of formal properties
-