- 23 Mar, 2021 1 commit
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GuillemCabo authored
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- 22 Mar, 2021 1 commit
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GuillemCabo authored
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- 01 Feb, 2021 2 commits
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Guillem Cabo authored
flip inverted signal pairs See merge request !5
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GuillemCabo authored
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- 22 Dec, 2020 3 commits
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GuillemCabo authored
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Guillem Cabo authored
Corrections See merge request !4
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- 09 Dec, 2020 1 commit
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GuillemCabo authored
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- 01 Dec, 2020 2 commits
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Guillem Cabo authored
add crossbar parameters
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GuillemCabo authored
not self-checking
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- 24 Nov, 2020 2 commits
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Guillem Cabo authored
Crossbar integration, TB and Docs See merge request !3
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GuillemCabo authored
Integrate crossbar Add crossbar test case Add specs
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- 23 Nov, 2020 2 commits
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GuillemCabo authored
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Guillem Cabo authored
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- 23 Sep, 2020 1 commit
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GuillemCabo authored
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- 22 Sep, 2020 3 commits
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GuillemCabo authored
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GuillemCabo authored
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GuillemCabo authored
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- 16 Sep, 2020 7 commits
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GuillemCabo authored
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GuillemCabo authored
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GuillemCabo authored
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GuillemCabo authored
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GuillemCabo authored
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GuillemCabo authored
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Guillem authored
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- 03 Sep, 2020 1 commit
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Guillem authored
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- 25 Aug, 2020 3 commits
- 11 Aug, 2020 1 commit
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Guillem authored
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- 29 Jul, 2020 1 commit
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Guillem authored
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- 22 Jul, 2020 1 commit
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Guillem authored
parametrize counters Docs and signal remap
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- 10 Jul, 2020 1 commit
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Guillem authored
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- 26 Jun, 2020 1 commit
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Guillem authored
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- 15 Jun, 2020 1 commit
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Guillem authored
When two writes happen consecutively the first write may not update the counter in the internal registers of the counter. Counters didn't bypass the results of the write, since counters are registered twice, one in the couynter module and once in the registers fo the wrapper, without the bypass the output was oscilating between the new value and the last value of the counter
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- 11 Jun, 2020 3 commits
- 10 Jun, 2020 1 commit
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Guillem authored
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- 12 May, 2020 1 commit
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Guillem authored
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