- 24 Nov, 2020 1 commit
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GuillemCabo authored
Integrate crossbar Add crossbar test case Add specs
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- 23 Nov, 2020 2 commits
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GuillemCabo authored
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Guillem Cabo authored
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- 23 Sep, 2020 1 commit
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GuillemCabo authored
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- 22 Sep, 2020 3 commits
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GuillemCabo authored
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GuillemCabo authored
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GuillemCabo authored
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- 16 Sep, 2020 7 commits
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GuillemCabo authored
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GuillemCabo authored
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GuillemCabo authored
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GuillemCabo authored
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GuillemCabo authored
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GuillemCabo authored
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Guillem authored
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- 03 Sep, 2020 1 commit
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Guillem authored
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- 25 Aug, 2020 3 commits
- 11 Aug, 2020 1 commit
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Guillem authored
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- 29 Jul, 2020 1 commit
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Guillem authored
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- 22 Jul, 2020 1 commit
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Guillem authored
parametrize counters Docs and signal remap
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- 10 Jul, 2020 1 commit
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Guillem authored
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- 26 Jun, 2020 1 commit
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Guillem authored
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- 15 Jun, 2020 1 commit
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Guillem authored
When two writes happen consecutively the first write may not update the counter in the internal registers of the counter. Counters didn't bypass the results of the write, since counters are registered twice, one in the couynter module and once in the registers fo the wrapper, without the bypass the output was oscilating between the new value and the last value of the counter
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- 11 Jun, 2020 3 commits
- 10 Jun, 2020 1 commit
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Guillem authored
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- 12 May, 2020 1 commit
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Guillem authored
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- 04 May, 2020 1 commit
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Guillem authored
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- 27 Apr, 2020 1 commit
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Guillem authored
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- 24 Apr, 2020 1 commit
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Guillem authored
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- 23 Apr, 2020 1 commit
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Guillem authored
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- 19 Apr, 2020 1 commit
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Guillem authored
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- 14 Apr, 2020 1 commit
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Guillem authored
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- 13 Apr, 2020 1 commit
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Guillem authored
Untested integration. Linting pass
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- 09 Apr, 2020 1 commit
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Guillem authored
Added color output to SBY and SVA assertions
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- 06 Apr, 2020 1 commit
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Guillem authored
no burst supported
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- 30 Mar, 2020 1 commit
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Guillem authored
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- 29 Mar, 2020 1 commit
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Guillem authored
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