1. 24 Mar, 2020 1 commit
  2. 23 Mar, 2020 1 commit
  3. 19 Mar, 2020 1 commit
  4. 27 Nov, 2019 1 commit
  5. 26 Nov, 2019 3 commits
  6. 14 Nov, 2019 1 commit
  7. 12 Nov, 2019 1 commit
  8. 11 Nov, 2019 1 commit
    • Guillem's avatar
      Deadlock lw lw · 42a3168d
      Guillem authored
      Cores seem to enter in deadlock, this disappears removing disacble_pmu, changing -O2 to -O1, etc
      42a3168d
  9. 10 Nov, 2019 1 commit
    • Guillem's avatar
      Dualcore setup & area synth · 099b58d1
      Guillem authored
      include RTL and software changes to run multicore SIMULATIONS with pmu, no FPGA tested. Includes yosys scripts for area calculation
      099b58d1
  10. 18 Sep, 2019 2 commits
  11. 17 Sep, 2019 1 commit
  12. 16 Sep, 2019 18 commits
  13. 11 Sep, 2019 3 commits
  14. 06 Sep, 2019 1 commit
  15. 04 Sep, 2019 1 commit
  16. 02 Sep, 2019 1 commit
  17. 27 Aug, 2019 1 commit
  18. 23 Aug, 2019 1 commit
    • Guillem's avatar
      WIP: solved linting problems · 078356cb
      Guillem authored
      Still a multidriven problem and need to implement refresh of write protected registers of MCCU and Low bits of main configuration registers
      078356cb