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CAOS_HW
HDL_IP
SafeSU
Commits
f0fdbe5b
Commit
f0fdbe5b
authored
Feb 03, 2022
by
salcaide
Browse files
Fixed bug in crossbar configuration
parent
86907eee
Changes
6
Show whitespace changes
Inline
Side-by-side
drivers/4-core/pmu_hw.c
View file @
f0fdbe5b
...
...
@@ -71,32 +71,30 @@ unsigned pmu_configure_crossbar(unsigned int output, unsigned int event_index) {
#endif
return
(
1
);
}
unsigned
int
ev_idx
=
(
event_index
&
CROSSBAR_INPUTS
);
//?
unsigned
int
ev_idx
=
event_index
;
unsigned
int
fieldw
=
log2
(
CROSSBAR_INPUTS
);
//Blank Mask. It will reset any configuration field
unsigned
int
bmask
;
bmask
=
(
1
<<
fieldw
)
-
1
;
unsigned
int
tmp
,
reg_idx
,
field_idx
;
//Get the bit position if all registers where concatenated
unsigned
tmp
,
reg_idx
,
field_idx
;
tmp
=
event_index
*
fieldw
;
tmp
=
output
*
fieldw
;
//Get the register index given a register width
reg_idx
=
tmp
/
REG_WIDTH
;
//Get the position of the crossbar configuration field
field_idx
=
(
int
)
tmp
%
REG_WIDTH
;
// check if the configuration field has bits in two different registers
unsigned
fieldw1
=
fieldw
;
// Bits in first register
unsigned
fieldw2
=
0
;
//Bits in second register
unsigned
int
fieldw1
=
fieldw
;
// Bits in first register
unsigned
int
fieldw2
=
0
;
//Bits in second register
if
((
field_idx
+
fieldw
)
>
REG_WIDTH
)
{
fieldw1
=
REG_WIDTH
-
field_idx
;
fieldw2
=
fieldw
-
fieldw1
;
// Clear previous field
_PMU_CROSSBAR
[
reg_idx
]
&=
(
~
((
1
<<
fieldw1
)
-
1
)
<<
field_idx
);
_PMU_CROSSBAR
[
reg_idx
]
&=
(
~
((
(
1
<<
fieldw1
)
-
1
)
<<
field_idx
)
)
;
_PMU_CROSSBAR
[
reg_idx
+
1
]
&=
~
((
1
<<
fieldw2
)
-
1
);
//Set new values
_PMU_CROSSBAR
[
reg_idx
]
|=
ev_idx
<<
field_idx
;
_PMU_CROSSBAR
[
reg_idx
]
|=
(
ev_idx
>>
fieldw1
);
_PMU_CROSSBAR
[
reg_idx
+
1
]
|=
(
ev_idx
>>
fieldw1
);
}
else
{
_PMU_CROSSBAR
[
reg_idx
]
&=
(
~
((
bmask
)
<<
field_idx
));
// Erease the output field
_PMU_CROSSBAR
[
reg_idx
]
|=
ev_idx
<<
field_idx
;
// Write into the output field
...
...
drivers/4-core/pmu_hw.h
View file @
f0fdbe5b
...
...
@@ -17,7 +17,7 @@
// ========================
//base addres for PMU on SoC
#define PMU_ADDR 0x80
2
00000
#define PMU_ADDR 0x80
1
00000
// ========================
// General pourpose functions
...
...
drivers/4-core/pmu_vars.h
View file @
f0fdbe5b
...
...
@@ -69,7 +69,7 @@
// PMU base address
#define _PMUREG (_PMU_REG_TYPE(PMU_ADDR))
// PMU counter base address
#define _PMU_COUNTERS (_PMU_REG_TYPE(PMU_ADDR + R2A * BASE_C
FG
))
#define _PMU_COUNTERS (_PMU_REG_TYPE(PMU_ADDR + R2A * BASE_C
OUNTERS
))
// PMU crossbar base address
#define _PMU_CROSSBAR (_PMU_REG_TYPE(PMU_ADDR + R2A * BASE_CROSSBAR))
...
...
@@ -82,6 +82,8 @@
#define CROSSBAR_REG1 (_PMU_CROSSBAR[1]) // Crossbar output register 1
#define CROSSBAR_REG2 (_PMU_CROSSBAR[2]) // Crossbar output register 2
#define CROSSBAR_REG3 (_PMU_CROSSBAR[3]) // Crossbar output register 3
#define CROSSBAR_REG4 (_PMU_CROSSBAR[4]) // Crossbar output register 4
#define CROSSBAR_REG5 (_PMU_CROSSBAR[5]) // Crossbar output register 5
// PMU overflow (I)nterrupt (E)nable register
#define PMU_OVERLFOW_IE (_PMU_OVERFLOW[0])
...
...
drivers/6-core/pmu_hw.c
View file @
f0fdbe5b
...
...
@@ -71,32 +71,30 @@ unsigned pmu_configure_crossbar(unsigned int output, unsigned int event_index) {
#endif
return
(
1
);
}
unsigned
int
ev_idx
=
(
event_index
&
CROSSBAR_INPUTS
);
//?
unsigned
int
ev_idx
=
event_index
;
unsigned
int
fieldw
=
log2
(
CROSSBAR_INPUTS
);
//Blank Mask. It will reset any configuration field
unsigned
int
bmask
;
bmask
=
(
1
<<
fieldw
)
-
1
;
unsigned
int
tmp
,
reg_idx
,
field_idx
;
//Get the bit position if all registers where concatenated
unsigned
tmp
,
reg_idx
,
field_idx
;
tmp
=
event_index
*
fieldw
;
tmp
=
output
*
fieldw
;
//Get the register index given a register width
reg_idx
=
tmp
/
REG_WIDTH
;
//Get the position of the crossbar configuration field
field_idx
=
(
int
)
tmp
%
REG_WIDTH
;
// check if the configuration field has bits in two different registers
unsigned
fieldw1
=
fieldw
;
// Bits in first register
unsigned
fieldw2
=
0
;
//Bits in second register
unsigned
int
fieldw1
=
fieldw
;
// Bits in first register
unsigned
int
fieldw2
=
0
;
//Bits in second register
if
((
field_idx
+
fieldw
)
>
REG_WIDTH
)
{
fieldw1
=
REG_WIDTH
-
field_idx
;
fieldw2
=
fieldw
-
fieldw1
;
// Clear previous field
_PMU_CROSSBAR
[
reg_idx
]
&=
(
~
((
1
<<
fieldw1
)
-
1
)
<<
field_idx
);
_PMU_CROSSBAR
[
reg_idx
]
&=
(
~
((
(
1
<<
fieldw1
)
-
1
)
<<
field_idx
)
)
;
_PMU_CROSSBAR
[
reg_idx
+
1
]
&=
~
((
1
<<
fieldw2
)
-
1
);
//Set new values
_PMU_CROSSBAR
[
reg_idx
]
|=
ev_idx
<<
field_idx
;
_PMU_CROSSBAR
[
reg_idx
]
|=
(
ev_idx
>>
fieldw1
);
_PMU_CROSSBAR
[
reg_idx
+
1
]
|=
(
ev_idx
>>
fieldw1
);
}
else
{
_PMU_CROSSBAR
[
reg_idx
]
&=
(
~
((
bmask
)
<<
field_idx
));
// Erease the output field
_PMU_CROSSBAR
[
reg_idx
]
|=
ev_idx
<<
field_idx
;
// Write into the output field
...
...
drivers/6-core/pmu_hw.h
View file @
f0fdbe5b
...
...
@@ -17,7 +17,7 @@
// ========================
//base addres for PMU on SoC
#define PMU_ADDR 0x80
2
00000
#define PMU_ADDR 0x80
1
00000
// ========================
// General pourpose functions
...
...
drivers/6-core/pmu_vars.h
View file @
f0fdbe5b
...
...
@@ -69,7 +69,7 @@
// PMU base address
#define _PMUREG (_PMU_REG_TYPE(PMU_ADDR))
// PMU counter base address
#define _PMU_COUNTERS (_PMU_REG_TYPE(PMU_ADDR + R2A * BASE_C
FG
))
#define _PMU_COUNTERS (_PMU_REG_TYPE(PMU_ADDR + R2A * BASE_C
OUNTERS
))
// PMU crossbar base address
#define _PMU_CROSSBAR (_PMU_REG_TYPE(PMU_ADDR + R2A * BASE_CROSSBAR))
...
...
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