Commit ac05594e authored by GuillemCabo's avatar GuillemCabo
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add PMU_counters spec

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\section{General purpose of the module}
Submodule of the PMU to handle event counters. This module contains generic adders with reset and simple control logic to ease interface with other modules.\\
\\
New values for the counters is provided through regs\_i and output of the counters is provided through regs\_o.\\
\\
Counter results are internally registered.
\section{Design placement}
\label{chapter2}
This modules is meant to be instantiated by the interface agnostic PMU (PMU\_raw.sv). Only one instance of this module is required. The application-specific interface shall take care of the write enable of this module.
%This module is meant to be a blackbox inside the chisel code. It belongs to the Drac class in the \emph{rocket.scala} file. We can have as many instances of this module as cores are instantiated in the SoC. Currently only single core operation has been tested.
\section{Parameters}
\label{chapter3}
This module requires two integer parameters.REG\_WIDTH and N\_COUNTERS. \\
\textbf{REG\_WIDTH} defines the number of bits that a counter has.\\
\textbf{N\_COUNTERS} defines the amount of counters that are available in the PMU.\\
\\
Given the previous parameters the unit shall generate correct RTL without any manual modification to the source code.\\
\\
\section{Interface}\label{interface}
\label{chapter 4}
Interface signals of the module are listed in the table below.
%TODO
%\begin{table}[H]
% \centering
% \begin{tabular}{lllll}
% \hline
% Port\_Name & Direction & Width & Index & Description \\
% \hline
% CLK & INPUT & 1 & - & Main clock, up to 200MHz \\
% RST & INPUT & 1 & - & Hard reset. Active LOW \\
% SOFT\_RST & INPUT & 1 & - & Soft reset. Active LOW \\
% RESET\_ADDRESS & INPUT & 40 & - & Inital address of PC after soft or hard reset \\
% CSR\_RW\_RDATA & INPUT & 64 & - & - \\
% \end{tabular}
%\end{table}
\section{Reset behavior}
The module contains two reset signals. One synchronous active high reset enabled by software called softrst\_i, the other is the global reset, called rstn\_i it is asynchronous and active low.\\
\\
Any reset when active shall clear any internal register and set them to 0. Interruptions shall become inactive while the unit is in reset.
\section{What could not happen}
When a write is performed to any of the counter values fo the PMU regs\_o shall show the most up to date value of the counters, rather than the internally registered value of the counters. Otherwise the value of the counter may oscillate between the last value and new one.
\section{Behavior}
The module uses generate loops to parametrically implement the amount of counters required. The output of the adders is stored in slv\_reg. the adder takes the last value of the counter (slv\_reg[n]) and adds one to it if the unit is enabled and the event n is active. Events and counters share the same index, meaning that event[0] will map to slv\_reg[0].\\
\\
The outputs of the adders are stored in slv\_reg. If counters need to be updated externally the write enable signal (we\_i) will be high. When we\_i is high the input regs\_i will be bypassed to regs\_o ignoring the current value of the counters, also each slv\_reg will be updated with regs\_i rather than the ouput of the adders.\\
\\
\subsection{Packages and structures}
No packages and structures are used in this module.
\section{Special cases, corner cases}
No special cases or corner cases have been considered.
\ No newline at end of file
CC=pdflatex
all: spec
spec: main.tex 1-Section.tex 2-Section.tex 3-Section.tex 4-Section.tex 5-Section.tex 6-Section.tex 7-Section.tex 8-Section.tex
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\title{
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\huge PMU\_counters specification version v1 \\ % The assignment title
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\author{ Guillem Cabo Pitarch} % Your name
\date{\today} % Today's date or a custom date
\begin{document}
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//-----------------------------------------------------
// ProjectName: LEON3_kc705_pmu
// Function : Submodule of the PMU to handle counters
// Description: This module is contains the adders and registers for the PMU
// Function : Submodule of the PMU to handle event counters
// Description: This module contains the adders and registers for the PMU
// the registers are exposed through the interface to the modules
// other modules of the PMU and passed through to the PMU wrapper
// through the module PMU_raw
......
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