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CAOS_HW
HDL_IP
SafeSU
Commits
6ccadf04
Commit
6ccadf04
authored
Jun 30, 2021
by
GuillemCabo
Committed by
Guillem
Nov 23, 2021
Browse files
add we_i protection, fix lint.sh, update docs
fix no FT by default
parent
dc286162
Changes
5
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docs/fault_tolerance_ahbpmu/main.pdf
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6ccadf04
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docs/ft-items.ods
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6ccadf04
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hdl/PMU_raw.sv
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6ccadf04
...
...
@@ -37,7 +37,7 @@
// Configuration registers
parameter
integer
N_CONF_REGS
=
1
,
// Fault tolerance mechanisms (FT==0 -> FT disabled)
parameter
integer
FT
=
1
,
parameter
integer
FT
=
0
,
//------------- Internal Parameters
...
...
@@ -420,6 +420,7 @@ end
//----------------------------------------------
//TODO: What happen if we is active but no write is done to the range of the
//counters?
logic
counters_fte2
;
PMU_counters
#
(
.
REG_WIDTH
(
REG_WIDTH
),
.
N_COUNTERS
(
N_COUNTERS
)
...
...
@@ -432,7 +433,8 @@ end
.
we_i
(
wrapper_we_i
),
.
regs_i
(
counter_regs_int
),
.
regs_o
(
counter_regs_o
),
.
events_i
(
events_int
)
.
events_i
(
events_int
),
.
intr_FT2_o
(
counters_fte2
)
);
//----------------------------------------------
...
...
@@ -858,7 +860,7 @@ end
Rdctrip
.
MCCU_watermark_fte2
,
Rdctrip
.
intr_RDC_fte2
,
Rdctrip
.
interruption_rdc_fte2
,
Rdctrip
.
RDC_enable_fte2
,
MCCU_intr_FT2
,
Ft_mccu_rst
.
MCCU_rstn_fte2
,
Rdctrip
.
RDC_rstn_fte2
Rdctrip
.
RDC_rstn_fte2
,
counters_fte2
}
;
end
/////////////////////////////////////////////////////////////////////////////////
...
...
hdl/pmu_ahb.sv
View file @
6ccadf04
...
...
@@ -34,7 +34,7 @@
// Total amount of registers (use ahb_pmu_mem_map.ods)
parameter
integer
N_REGS
=
55
,
// Fault tolerance mechanisms (FT==0 -> FT disabled)
parameter
integer
FT
=
1
,
parameter
integer
FT
=
0
,
// -- Local parameters
//haddr width
localparam
integer
HADDR_WIDTH
=
32
,
...
...
submodules/counters/PMU_counters.sv
View file @
6ccadf04
...
...
@@ -21,6 +21,8 @@ module PMU_counters #
(
// Width of registers data bus
parameter
integer
REG_WIDTH
=
32
,
// Fault tolerance mechanisms (FT==0 -> FT disabled)
parameter
integer
FT
=
0
,
// Amount of counters
parameter
integer
N_COUNTERS
=
9
)
...
...
@@ -47,7 +49,9 @@ module PMU_counters #
input
wire
[
REG_WIDTH
-
1
:
0
]
regs_i
[
0
:
N_COUNTERS
-
1
],
output
logic
[
REG_WIDTH
-
1
:
0
]
regs_o
[
0
:
N_COUNTERS
-
1
],
//external signals from Soc events
input
wire
[
N_COUNTERS
-
1
:
0
]
events_i
input
wire
[
N_COUNTERS
-
1
:
0
]
events_i
,
// FT (Fault tolerance) interrupt, error detected but not recoverable
output
wire
intr_FT2_o
);
reg
[
REG_WIDTH
-
1
:
0
]
slv_reg
[
0
:
N_COUNTERS
-
1
]
/*verilator public*/
;
wire
[
REG_WIDTH
-
1
:
0
]
adder_out
[
0
:
N_COUNTERS
-
1
]
/*verilator public*/
;
...
...
@@ -88,7 +92,24 @@ module PMU_counters #
regs_o
=
adder_out
;
end
end
//TODO: fill formal propperties
//FT mechanisms and intr
if
(
FT
==
0
)
begin
assign
intr_FT2_o
=
1'b0
;
end
else
begin
//register last we_i in the negative and positive edges of clock
// For 200MHz, transients of width < 2500ps shall be detected
// For 500MHz, transients of width < 1000ps shall be detected
// Expected transients < 900ps
com_tr
#(
.
IN_WIDTH
(
1
)
)
dut_com_tr
(
.
clk_i
(
clk_i
),
.
dclk_i
(
~
clk_i
),
.
rstn_i
(
rstn_i
),
.
signal_i
(
we_i
),
.
error_o
(
intr_FT2_o
)
);
end
///////////////////////////////////////////////////////////////////////////////
//
// Formal Verification section begins here.
...
...
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