Commit 0e09c23b authored by Guillermo Gil's avatar Guillermo Gil
Browse files

Update driver's documentation and driver's lib

parent f4d2cb52
......@@ -42,6 +42,23 @@
\item \texttt{report\_pmu(void)}
\end{itemize}
\newpage
\subsection{SafePMU driver guidelines}
\begin{figure}[H]
\includegraphics[]{pmu_configuration.pdf}
\centering
\caption{Graphic description of the SafePMU driver.}
\label{fig:GraphicDriver}
\end{figure}
The figure \ref{fig:GraphicDriver} is a diagram that shows in a glance of what can be done with the SafePMU and with its driver.
\newline
\\
All the functions in the driver start with \texttt{pmu\_*} prefix and continue with the name of the submodule (counters, crossbar, overflow, MCCU, and RDC), i.e. \texttt{pmu\_crossbar\_*}. Every submodule has a reset, enable, and disable function.
% %%%%%%%%%%%%%%%%%%%%%%%%%%%
% Counter drivers
% %%%%%%%%%%%%%%%%%%%%%%%%%%%
......@@ -52,9 +69,9 @@
The Counter module is used for counting hardware events. For more information refer to \textbf{SafePMU User Manual} section 2.5. The following functions are used to control and reset the counters as well as printing their values:
% Reset counters
\subsubsection{\texttt{pmu\_reset\_counters()}}
\subsubsection{\texttt{pmu\_counters\_reset()}}
\begin{lstlisting}[style=codeline]
void pmu_reset_counters(void)
void pmu_counters_reset(void)
\end{lstlisting}
\paragraph{Functionality} Sets all counter registers to 0's.
......@@ -63,9 +80,9 @@ void pmu_reset_counters(void)
% Enable counters
\subsubsection{\texttt{pmu\_enable\_counters()}}
\subsubsection{\texttt{pmu\_counters\_enable()}}
\begin{lstlisting}[style=codeline]
void pmu_enable_counters(void)
void pmu_counters_enable(void)
\end{lstlisting}
\paragraph{Functionality} Enables all the counters. Counters start to count events.
......@@ -74,9 +91,9 @@ void pmu_enable_counters(void)
% Disable counters
\subsubsection{\texttt{pmu\_disable\_counters()}}
\subsubsection{\texttt{pmu\_counters\_disable()}}
\begin{lstlisting}[style=codeline]
void pmu_disable_counters(void)
void pmu_counters_disable(void)
\end{lstlisting}
\paragraph{Functionality} Disables all the counters. Counters stop counting events.
......@@ -346,7 +363,7 @@ void configure_crossbar(unsigned int output, unsigned int event_index)
\paragraph{Parameters}
\begin{itemize}
\item \texttt{output}. Output counter index for routing a selected event.
\item \texttt{event\_index}. It sets the event index to be routed to a given counter. This event must have been wired before in the HDL. For more information refer to \textbf{SafePMU User's Manual}
\item \texttt{event\_index}. It sets the event index to be routed to a given counter. This event must have been wired before in the HDL. For more information refer to \textbf{SafePMU User's Manual}.
\end{itemize}
\paragraph{Return value} None
......
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......@@ -39,6 +39,9 @@
\usepackage[]{hyperref} %link collor
\usepackage{graphicx}
\graphicspath{ {./src/} }
%talbe layout to the right
%\usepackage[labelfont=bf]{caption}
%\captionsetup[table]{labelsep=space,justification=raggedright,singlelinecheck=off}
......
......@@ -6,104 +6,105 @@
\contentsline {paragraph}{\nonumberline RDC functions}{3}{section*.5}%
\contentsline {paragraph}{\nonumberline Crossbar functions}{3}{section*.6}%
\contentsline {paragraph}{\nonumberline Other functions}{3}{section*.7}%
\contentsline {subsection}{\numberline {1.1}Counter driver}{4}{subsection.1.1}%
\contentsline {subsubsection}{\numberline {1.1.1}\texttt {pmu\_reset\_counters()}}{4}{subsubsection.1.1.1}%
\contentsline {paragraph}{\nonumberline Functionality}{4}{section*.8}%
\contentsline {paragraph}{\nonumberline Parameters}{4}{section*.9}%
\contentsline {paragraph}{\nonumberline Return value}{4}{section*.10}%
\contentsline {subsubsection}{\numberline {1.1.2}\texttt {pmu\_enable\_counters()}}{4}{subsubsection.1.1.2}%
\contentsline {paragraph}{\nonumberline Functionality}{4}{section*.11}%
\contentsline {paragraph}{\nonumberline Parameters}{4}{section*.12}%
\contentsline {paragraph}{\nonumberline Return value}{4}{section*.13}%
\contentsline {subsubsection}{\numberline {1.1.3}\texttt {pmu\_disable\_counters()}}{4}{subsubsection.1.1.3}%
\contentsline {paragraph}{\nonumberline Functionality}{4}{section*.14}%
\contentsline {paragraph}{\nonumberline Parameters}{4}{section*.15}%
\contentsline {paragraph}{\nonumberline Return value}{4}{section*.16}%
\contentsline {subsection}{\numberline {1.2}Overflow driver}{5}{subsection.1.2}%
\contentsline {subsubsection}{\numberline {1.2.1}\texttt {pmu\_oveflow\_reset()}}{5}{subsubsection.1.2.1}%
\contentsline {paragraph}{\nonumberline Functionality}{5}{section*.17}%
\contentsline {paragraph}{\nonumberline Parameters}{5}{section*.18}%
\contentsline {paragraph}{\nonumberline Return value}{5}{section*.19}%
\contentsline {subsubsection}{\numberline {1.2.2}\texttt {pmu\_overflow\_enable()}}{5}{subsubsection.1.2.2}%
\contentsline {paragraph}{\nonumberline Functionality}{5}{section*.20}%
\contentsline {paragraph}{\nonumberline Parameters}{5}{section*.21}%
\contentsline {paragraph}{\nonumberline Return value}{5}{section*.22}%
\contentsline {subsubsection}{\numberline {1.2.3}\texttt {pmu\_overflow\_disable()}}{5}{subsubsection.1.2.3}%
\contentsline {paragraph}{\nonumberline Functionality}{5}{section*.23}%
\contentsline {paragraph}{\nonumberline Parameters}{5}{section*.24}%
\contentsline {paragraph}{\nonumberline Return value}{5}{section*.25}%
\contentsline {subsubsection}{\numberline {1.2.4}\texttt {pmu\_overflow\_get\_interrupt()}}{5}{subsubsection.1.2.4}%
\contentsline {paragraph}{\nonumberline Functionality}{6}{section*.26}%
\contentsline {paragraph}{\nonumberline Parameters}{6}{section*.27}%
\contentsline {paragraph}{\nonumberline Return value}{6}{section*.28}%
\contentsline {subsubsection}{\numberline {1.2.5}\texttt {pmu\_overflow\_get\_iv()}}{6}{subsubsection.1.2.5}%
\contentsline {paragraph}{\nonumberline Functionality}{6}{section*.29}%
\contentsline {paragraph}{\nonumberline Parameters}{6}{section*.30}%
\contentsline {paragraph}{\nonumberline Return value}{6}{section*.31}%
\contentsline {subsection}{\numberline {1.3}MCCU driver}{7}{subsection.1.3}%
\contentsline {subsubsection}{\numberline {1.3.1}\texttt {pmu\_mccu\_reset()}}{7}{subsubsection.1.3.1}%
\contentsline {paragraph}{\nonumberline Functionality}{7}{section*.32}%
\contentsline {paragraph}{\nonumberline Parameters}{7}{section*.33}%
\contentsline {paragraph}{\nonumberline Return value}{7}{section*.34}%
\contentsline {subsubsection}{\numberline {1.3.2}\texttt {pmu\_mccu\_enable()}}{7}{subsubsection.1.3.2}%
\contentsline {paragraph}{\nonumberline Functionality}{7}{section*.35}%
\contentsline {paragraph}{\nonumberline Parameters}{7}{section*.36}%
\contentsline {paragraph}{\nonumberline Return value}{7}{section*.37}%
\contentsline {subsubsection}{\numberline {1.3.3}\texttt {pmu\_mccu\_disable()}}{7}{subsubsection.1.3.3}%
\contentsline {paragraph}{\nonumberline Functionality}{7}{section*.38}%
\contentsline {paragraph}{\nonumberline Parameters}{7}{section*.39}%
\contentsline {paragraph}{\nonumberline Return value}{7}{section*.40}%
\contentsline {subsubsection}{\numberline {1.3.4}\texttt {pmu\_mccu\_set\_quota\_limit()}}{7}{subsubsection.1.3.4}%
\contentsline {paragraph}{\nonumberline Functionality}{8}{section*.41}%
\contentsline {paragraph}{\nonumberline Parameters}{8}{section*.42}%
\contentsline {paragraph}{\nonumberline Return value}{8}{section*.43}%
\contentsline {subsubsection}{\numberline {1.3.5}\texttt {pmu\_mccu\_get\_quota\_remaining()}}{8}{subsubsection.1.3.5}%
\contentsline {paragraph}{\nonumberline Functionality}{8}{section*.44}%
\contentsline {paragraph}{\nonumberline Parameters}{8}{section*.45}%
\contentsline {paragraph}{\nonumberline Return value}{8}{section*.46}%
\contentsline {subsubsection}{\numberline {1.3.6}\texttt {pmu\_mccu\_set\_event\_weights()}}{8}{subsubsection.1.3.6}%
\contentsline {paragraph}{\nonumberline Functionality}{8}{section*.47}%
\contentsline {paragraph}{\nonumberline Parameters}{8}{section*.48}%
\contentsline {paragraph}{\nonumberline Return value}{8}{section*.49}%
\contentsline {subsection}{\numberline {1.4}RDC driver}{9}{subsection.1.4}%
\contentsline {subsubsection}{\numberline {1.4.1}\texttt {pmu\_rdc\_reset()}}{9}{subsubsection.1.4.1}%
\contentsline {paragraph}{\nonumberline Functionality}{9}{section*.50}%
\contentsline {paragraph}{\nonumberline Parameters}{9}{section*.51}%
\contentsline {paragraph}{\nonumberline Return value}{9}{section*.52}%
\contentsline {subsubsection}{\numberline {1.4.2}\texttt {pmu\_rdc\_enable()}}{9}{subsubsection.1.4.2}%
\contentsline {paragraph}{\nonumberline Functionality}{9}{section*.53}%
\contentsline {paragraph}{\nonumberline Parameters}{9}{section*.54}%
\contentsline {paragraph}{\nonumberline Return value}{9}{section*.55}%
\contentsline {subsubsection}{\numberline {1.4.3}\texttt {pmu\_rdc\_disable()}}{9}{subsubsection.1.4.3}%
\contentsline {paragraph}{\nonumberline Functionality}{9}{section*.56}%
\contentsline {paragraph}{\nonumberline Parameters}{9}{section*.57}%
\contentsline {paragraph}{\nonumberline Return value}{9}{section*.58}%
\contentsline {subsubsection}{\numberline {1.4.4}\texttt {pmu\_rdc\_read\_watermark()}}{10}{subsubsection.1.4.4}%
\contentsline {paragraph}{\nonumberline Functionality}{10}{section*.59}%
\contentsline {paragraph}{\nonumberline Parameters}{10}{section*.60}%
\contentsline {paragraph}{\nonumberline Return value}{10}{section*.61}%
\contentsline {subsubsection}{\numberline {1.4.5}\texttt {pmu\_rdc\_read\_iv()}}{10}{subsubsection.1.4.5}%
\contentsline {paragraph}{\nonumberline Functionality}{10}{section*.62}%
\contentsline {paragraph}{\nonumberline Parameters}{10}{section*.63}%
\contentsline {paragraph}{\nonumberline Return value}{10}{section*.64}%
\contentsline {subsubsection}{\numberline {1.4.6}\texttt {pmu\_rdc\_get\_interrupt()}}{10}{subsubsection.1.4.6}%
\contentsline {paragraph}{\nonumberline Functionality}{10}{section*.65}%
\contentsline {paragraph}{\nonumberline Parameters}{10}{section*.66}%
\contentsline {paragraph}{\nonumberline Return value}{10}{section*.67}%
\contentsline {subsection}{\numberline {1.5}Crossbar driver}{11}{subsection.1.5}%
\contentsline {subsubsection}{\numberline {1.5.1}\texttt {configure\_crossbar()}}{11}{subsubsection.1.5.1}%
\contentsline {paragraph}{\nonumberline Functionality}{11}{section*.68}%
\contentsline {paragraph}{\nonumberline Parameters}{11}{section*.69}%
\contentsline {paragraph}{\nonumberline Return value}{11}{section*.70}%
\contentsline {subsubsection}{\numberline {1.5.2}\texttt {register\_events()}}{11}{subsubsection.1.5.2}%
\contentsline {paragraph}{\nonumberline Functionality}{11}{section*.71}%
\contentsline {paragraph}{\nonumberline Parameters}{11}{section*.72}%
\contentsline {paragraph}{\nonumberline Return value}{11}{section*.73}%
\contentsline {subsection}{\numberline {1.6}Definitions and types}{12}{subsection.1.6}%
\contentsline {subsubsection}{\numberline {1.6.1}Crossbar Event Struct}{12}{subsubsection.1.6.1}%
\contentsline {paragraph}{\nonumberline Fields}{12}{section*.74}%
\contentsline {subsubsection}{\numberline {1.6.2}Crossbar output}{12}{subsubsection.1.6.2}%
\contentsline {subsubsection}{\numberline {1.6.3}Events}{13}{subsubsection.1.6.3}%
\contentsline {subsubsection}{\numberline {1.6.4}Default event table}{13}{subsubsection.1.6.4}%
\contentsline {section}{\numberline {2}Examples}{15}{section.2}%
\contentsline {subsection}{\numberline {2.1}Using the counters}{15}{subsection.2.1}%
\contentsline {subsection}{\numberline {1.1}SafePMU driver guidelines}{4}{subsection.1.1}%
\contentsline {subsection}{\numberline {1.2}Counter driver}{5}{subsection.1.2}%
\contentsline {subsubsection}{\numberline {1.2.1}\texttt {pmu\_counters\_reset()}}{5}{subsubsection.1.2.1}%
\contentsline {paragraph}{\nonumberline Functionality}{5}{section*.9}%
\contentsline {paragraph}{\nonumberline Parameters}{5}{section*.10}%
\contentsline {paragraph}{\nonumberline Return value}{5}{section*.11}%
\contentsline {subsubsection}{\numberline {1.2.2}\texttt {pmu\_counters\_enable()}}{5}{subsubsection.1.2.2}%
\contentsline {paragraph}{\nonumberline Functionality}{5}{section*.12}%
\contentsline {paragraph}{\nonumberline Parameters}{5}{section*.13}%
\contentsline {paragraph}{\nonumberline Return value}{5}{section*.14}%
\contentsline {subsubsection}{\numberline {1.2.3}\texttt {pmu\_counters\_disable()}}{5}{subsubsection.1.2.3}%
\contentsline {paragraph}{\nonumberline Functionality}{5}{section*.15}%
\contentsline {paragraph}{\nonumberline Parameters}{5}{section*.16}%
\contentsline {paragraph}{\nonumberline Return value}{5}{section*.17}%
\contentsline {subsection}{\numberline {1.3}Overflow driver}{6}{subsection.1.3}%
\contentsline {subsubsection}{\numberline {1.3.1}\texttt {pmu\_oveflow\_reset()}}{6}{subsubsection.1.3.1}%
\contentsline {paragraph}{\nonumberline Functionality}{6}{section*.18}%
\contentsline {paragraph}{\nonumberline Parameters}{6}{section*.19}%
\contentsline {paragraph}{\nonumberline Return value}{6}{section*.20}%
\contentsline {subsubsection}{\numberline {1.3.2}\texttt {pmu\_overflow\_enable()}}{6}{subsubsection.1.3.2}%
\contentsline {paragraph}{\nonumberline Functionality}{6}{section*.21}%
\contentsline {paragraph}{\nonumberline Parameters}{6}{section*.22}%
\contentsline {paragraph}{\nonumberline Return value}{6}{section*.23}%
\contentsline {subsubsection}{\numberline {1.3.3}\texttt {pmu\_overflow\_disable()}}{6}{subsubsection.1.3.3}%
\contentsline {paragraph}{\nonumberline Functionality}{6}{section*.24}%
\contentsline {paragraph}{\nonumberline Parameters}{6}{section*.25}%
\contentsline {paragraph}{\nonumberline Return value}{6}{section*.26}%
\contentsline {subsubsection}{\numberline {1.3.4}\texttt {pmu\_overflow\_get\_interrupt()}}{6}{subsubsection.1.3.4}%
\contentsline {paragraph}{\nonumberline Functionality}{7}{section*.27}%
\contentsline {paragraph}{\nonumberline Parameters}{7}{section*.28}%
\contentsline {paragraph}{\nonumberline Return value}{7}{section*.29}%
\contentsline {subsubsection}{\numberline {1.3.5}\texttt {pmu\_overflow\_get\_iv()}}{7}{subsubsection.1.3.5}%
\contentsline {paragraph}{\nonumberline Functionality}{7}{section*.30}%
\contentsline {paragraph}{\nonumberline Parameters}{7}{section*.31}%
\contentsline {paragraph}{\nonumberline Return value}{7}{section*.32}%
\contentsline {subsection}{\numberline {1.4}MCCU driver}{8}{subsection.1.4}%
\contentsline {subsubsection}{\numberline {1.4.1}\texttt {pmu\_mccu\_reset()}}{8}{subsubsection.1.4.1}%
\contentsline {paragraph}{\nonumberline Functionality}{8}{section*.33}%
\contentsline {paragraph}{\nonumberline Parameters}{8}{section*.34}%
\contentsline {paragraph}{\nonumberline Return value}{8}{section*.35}%
\contentsline {subsubsection}{\numberline {1.4.2}\texttt {pmu\_mccu\_enable()}}{8}{subsubsection.1.4.2}%
\contentsline {paragraph}{\nonumberline Functionality}{8}{section*.36}%
\contentsline {paragraph}{\nonumberline Parameters}{8}{section*.37}%
\contentsline {paragraph}{\nonumberline Return value}{8}{section*.38}%
\contentsline {subsubsection}{\numberline {1.4.3}\texttt {pmu\_mccu\_disable()}}{8}{subsubsection.1.4.3}%
\contentsline {paragraph}{\nonumberline Functionality}{8}{section*.39}%
\contentsline {paragraph}{\nonumberline Parameters}{8}{section*.40}%
\contentsline {paragraph}{\nonumberline Return value}{8}{section*.41}%
\contentsline {subsubsection}{\numberline {1.4.4}\texttt {pmu\_mccu\_set\_quota\_limit()}}{8}{subsubsection.1.4.4}%
\contentsline {paragraph}{\nonumberline Functionality}{9}{section*.42}%
\contentsline {paragraph}{\nonumberline Parameters}{9}{section*.43}%
\contentsline {paragraph}{\nonumberline Return value}{9}{section*.44}%
\contentsline {subsubsection}{\numberline {1.4.5}\texttt {pmu\_mccu\_get\_quota\_remaining()}}{9}{subsubsection.1.4.5}%
\contentsline {paragraph}{\nonumberline Functionality}{9}{section*.45}%
\contentsline {paragraph}{\nonumberline Parameters}{9}{section*.46}%
\contentsline {paragraph}{\nonumberline Return value}{9}{section*.47}%
\contentsline {subsubsection}{\numberline {1.4.6}\texttt {pmu\_mccu\_set\_event\_weights()}}{9}{subsubsection.1.4.6}%
\contentsline {paragraph}{\nonumberline Functionality}{9}{section*.48}%
\contentsline {paragraph}{\nonumberline Parameters}{9}{section*.49}%
\contentsline {paragraph}{\nonumberline Return value}{9}{section*.50}%
\contentsline {subsection}{\numberline {1.5}RDC driver}{10}{subsection.1.5}%
\contentsline {subsubsection}{\numberline {1.5.1}\texttt {pmu\_rdc\_reset()}}{10}{subsubsection.1.5.1}%
\contentsline {paragraph}{\nonumberline Functionality}{10}{section*.51}%
\contentsline {paragraph}{\nonumberline Parameters}{10}{section*.52}%
\contentsline {paragraph}{\nonumberline Return value}{10}{section*.53}%
\contentsline {subsubsection}{\numberline {1.5.2}\texttt {pmu\_rdc\_enable()}}{10}{subsubsection.1.5.2}%
\contentsline {paragraph}{\nonumberline Functionality}{10}{section*.54}%
\contentsline {paragraph}{\nonumberline Parameters}{10}{section*.55}%
\contentsline {paragraph}{\nonumberline Return value}{10}{section*.56}%
\contentsline {subsubsection}{\numberline {1.5.3}\texttt {pmu\_rdc\_disable()}}{10}{subsubsection.1.5.3}%
\contentsline {paragraph}{\nonumberline Functionality}{10}{section*.57}%
\contentsline {paragraph}{\nonumberline Parameters}{10}{section*.58}%
\contentsline {paragraph}{\nonumberline Return value}{10}{section*.59}%
\contentsline {subsubsection}{\numberline {1.5.4}\texttt {pmu\_rdc\_read\_watermark()}}{11}{subsubsection.1.5.4}%
\contentsline {paragraph}{\nonumberline Functionality}{11}{section*.60}%
\contentsline {paragraph}{\nonumberline Parameters}{11}{section*.61}%
\contentsline {paragraph}{\nonumberline Return value}{11}{section*.62}%
\contentsline {subsubsection}{\numberline {1.5.5}\texttt {pmu\_rdc\_read\_iv()}}{11}{subsubsection.1.5.5}%
\contentsline {paragraph}{\nonumberline Functionality}{11}{section*.63}%
\contentsline {paragraph}{\nonumberline Parameters}{11}{section*.64}%
\contentsline {paragraph}{\nonumberline Return value}{11}{section*.65}%
\contentsline {subsubsection}{\numberline {1.5.6}\texttt {pmu\_rdc\_get\_interrupt()}}{11}{subsubsection.1.5.6}%
\contentsline {paragraph}{\nonumberline Functionality}{11}{section*.66}%
\contentsline {paragraph}{\nonumberline Parameters}{11}{section*.67}%
\contentsline {paragraph}{\nonumberline Return value}{11}{section*.68}%
\contentsline {subsection}{\numberline {1.6}Crossbar driver}{12}{subsection.1.6}%
\contentsline {subsubsection}{\numberline {1.6.1}\texttt {configure\_crossbar()}}{12}{subsubsection.1.6.1}%
\contentsline {paragraph}{\nonumberline Functionality}{12}{section*.69}%
\contentsline {paragraph}{\nonumberline Parameters}{12}{section*.70}%
\contentsline {paragraph}{\nonumberline Return value}{12}{section*.71}%
\contentsline {subsubsection}{\numberline {1.6.2}\texttt {register\_events()}}{12}{subsubsection.1.6.2}%
\contentsline {paragraph}{\nonumberline Functionality}{12}{section*.72}%
\contentsline {paragraph}{\nonumberline Parameters}{12}{section*.73}%
\contentsline {paragraph}{\nonumberline Return value}{12}{section*.74}%
\contentsline {subsection}{\numberline {1.7}Definitions and types}{13}{subsection.1.7}%
\contentsline {subsubsection}{\numberline {1.7.1}Crossbar Event Struct}{13}{subsubsection.1.7.1}%
\contentsline {paragraph}{\nonumberline Fields}{13}{section*.75}%
\contentsline {subsubsection}{\numberline {1.7.2}Crossbar output}{13}{subsubsection.1.7.2}%
\contentsline {subsubsection}{\numberline {1.7.3}Events}{14}{subsubsection.1.7.3}%
\contentsline {subsubsection}{\numberline {1.7.4}Default event table}{14}{subsubsection.1.7.4}%
\contentsline {section}{\numberline {2}Examples}{16}{section.2}%
\contentsline {subsection}{\numberline {2.1}Using the counters}{16}{subsection.2.1}%
......@@ -106,7 +106,7 @@
* Parameters : None
* Return : None
*/
void pmu_enable_counters(void)
void pmu_counters_enable(void)
{
PMUCFG0 |= 0x00000001;
#ifdef __PMU_LIB_DEBUG__
......@@ -123,7 +123,7 @@ void pmu_enable_counters(void)
* Parameters : None
* Return : None
*/
void pmu_disable_counters(void)
void pmu_counters_disable(void)
{
PMUCFG0 &= 0xFFFFFFFE;
#ifdef __PMU_LIB_DEBUG__
......
......@@ -205,42 +205,6 @@ void read_crossbar_registers();
// ** Register all events from a crossbar_event_t table
void pmu_register_events(const crossbar_event_t *ev_table, unsigned int event_count);
#define EV_CNT_HIGH (EVENT_0) // Constant HIGH signal
#define EV_CNT_LOW (EVENT_1) // Constant LOW signal
#define EV_ICNT0_P0 (EVENT_2) // Core 0. Instruction count pipeline 0
#define EV_ICNT0_P1 (EVENT_3) // Core 0. Instruction count pipeline 1
#define EV_PMU_ICMISS0 (EVENT_4) // Core 0. Instruction cache miss
#define EV_PMU_BPMISS0 (EVENT_5) // Core 0. Branch Predictor miss
#define EV_PMU_DCMISS0 (EVENT_6) // Core 0. Data cache L1 miss
#define EV_PMU_DCHIT0 (EVENT_7) // Core 0. Data cache L1 hit
#define EV_PMU_DCMISS1 (EVENT_8) // Core 1. Data cache L1 miss
#define EV_PMU_DCMISS2 (EVENT_9) // Core 2. Data cache L1 miss
#define EV_PMU_DCMISS3 (EVENT_10) // Core 3. Data cache L1 miss
#define EV_L2_MISS (EVENT_11) // Cache L2 miss
#define EV_L2_ACCESS (EVENT_12) // Cache L2 access
#define EV_CSSCONT_RD_C1VC0 (EVENT_13) // Contention of core 1 over core 0 on read access
#define EV_CSSCONT_WR_C1VC0 (EVENT_14) // Contention of core 1 over core 0 on write access
#define EV_CCSCONT_RD_C2VC0 (EVENT_15) // Contention of core 2 over core 0 on read access
#define EV_CSSCONT_WR_C2VC0 (EVENT_16) // Contention of core 2 over core 0 on write access
#define EV_CSSCONT_RD_C3VC0 (EVENT_17) // Contention of core 3 over core 0 on read access
#define EV_CSSCONT_WR_C3VC0 (EVENT_18) // Contention of core 3 over core 0 on write access
#define EV_CCSLATC0_ICMISS (EVENT_19) // Latency experienced by core 0 between a instruction cache miss and the reception of the data
#define EV_CCSLATC0_DCMISS (EVENT_20) // Latency experienced by core 0 between a data cache miss and the reception of the data
#define EV_CCSLATC0_WR (EVENT_21) // Latency experienced by core 0 between the start of a write and its termination
#define EV_CCSLATC1_ICMISS (EVENT_22) // Latency experienced by core 1 between a instruction cache miss and the reception of the data
#define EV_CCSLATC1_DCMISS (EVENT_23) // Latency experienced by core 1 between a data cache miss and the reception of the data
#define EV_CCSLATC1_WR (EVENT_24) // Latency experienced by core 1 between the start of a write and its termination
#define EV_CCSLATC2_ICMISS (EVENT_25) // Latency experienced by core 2 between a instruction cache miss and the reception of the data
#define EV_CCSLATC2_DCMISS (EVENT_26) // Latency experienced by core 2 between a data cache miss and the reception of the data
#define EV_CCSLATC2_WR (EVENT_27) // Latency experienced by core 2 between the start of a write and its termination
#define EV_CCSLATC3_ICMISS (EVENT_28) // Latency experienced by core 3 between a instruction cache miss and the reception of the data
#define EV_CCSLATC3_DCMISS (EVENT_29) // Latency experienced by core 3 between a data cache miss and the reception of the data
#define EV_CCSLATC3_WR (EVENT_30) // Latency experienced by core 3 between the start of a write and its termination
// #define EV_CSSCONT_RD_C0VC1 () // Contention of core 0 over core 1 on read access
// #define EV_CSSCONT_WR_C0VC1 () // Contention of core 0 over core 1 on write access
......@@ -275,6 +239,47 @@ void pmu_print_counters(const crossbar_event_t *table, unsigned int event_count)
void mccu_set_quota(const unsigned int core, const unsigned int quota);
void mccu_set_event_weigths(const unsigned int input, const unsigned int weigth);
#define PMU_DEFAULT_EVENT_COUNT (25U)
const crossbar_event_t pmu_default_event_table [] = {
{CROSSBAR_OUTPUT_0, EVENT_0, "Constant High"},
{CROSSBAR_OUTPUT_1, EVENT_1, "Constant Low"},
{CROSSBAR_OUTPUT_2, EVENT_2, "Instruction count pipeline 0"},
{CROSSBAR_OUTPUT_3, EVENT_3, "Instruction count pipeline 1"},
{CROSSBAR_OUTPUT_4, EVENT_4, "Instruction cache miss on core 0"},
{CROSSBAR_OUTPUT_5, EVENT_5, "Data cache miss on core 0"},
{CROSSBAR_OUTPUT_6, EVENT_6, "Branch predictor miss on core 0"},
{CROSSBAR_OUTPUT_7, EVENT_7, "Contention of core 1 over core 0 on ramdom access"},
{CROSSBAR_OUTPUT_8, EVENT_8, "Contention of core 1 over core 0 on read access"},
{CROSSBAR_OUTPUT_9, EVENT_9, "Contention of core 1 over core 1 on write acccess"},
{CROSSBAR_OUTPUT_10, EVENT_10, "Total latency on core 0"},
{CROSSBAR_OUTPUT_11, EVENT_11, "Latency caused by a data cache miss on core 0"},
{CROSSBAR_OUTPUT_12, EVENT_12, "Latency caused by a instruction cache miss on core 0"},
{CROSSBAR_OUTPUT_13, EVENT_13, "Latency caused by a write transaction on core 0"},
{CROSSBAR_OUTPUT_14, EVENT_14, "Data cache miss on core 1"},
{CROSSBAR_OUTPUT_15, EVENT_15, "Contention of core 0 over core 1 on ramdom access"},
{CROSSBAR_OUTPUT_16, EVENT_16, "Contention of core 0 over core 1 on write access"},
{CROSSBAR_OUTPUT_17, EVENT_17, "Total latency on core 1"},
{CROSSBAR_OUTPUT_18, EVENT_18, "Latency caused by a data cache miss on core 1"},
{CROSSBAR_OUTPUT_19, EVENT_19, "Latency caused by a write transaction on core 1"},
{CROSSBAR_OUTPUT_20, EVENT_20, "Data cache miss on core 2"},
{CROSSBAR_OUTPUT_21, EVENT_21, "Contention of core 0 over core 2 on ramdom access"},
{CROSSBAR_OUTPUT_22, EVENT_22, "Contention of core 0 over core 2 on write access"},
{CROSSBAR_OUTPUT_23, EVENT_23, "Total latency on core 2"},
{CROSSBAR_OUTPUT_24, EVENT_24, "Latency caused by a data cache miss on core 2"}
};
/* **********************************
COUNTERS SUBMODULE
* **********************************/
void pmu_counters_reset (void);
void pmu_ounters_enable (void);
void pmu_counters_disable (void);
/* **********************************
OVERFLOW SUBMODULE
* **********************************/
......@@ -314,37 +319,7 @@ unsigned int pmu_rdc_read_watermark(unsigned int input);
unsigned int pmu_rdc_read_iv();
unsigned int pmu_rdc_get_interrupt(unsigned int core);
/*
* Table example (include copy into main program file)
*/
// const crossbar_event_t crossbar_event_table [] = {
// {CROSSBAR_OUTPUT_0, EV_CNT_HIGH, "Constant HIGH signal"},
// {CROSSBAR_OUTPUT_1, EV_CNT_LOW, "Constant LOW signal"},
// {CROSSBAR_OUTPUT_2, EV_ICNT0_P0, "Core 0. Instruction count pipeline 0 "},
// {CROSSBAR_OUTPUT_3, EV_ICNT0_P1, "Core 0. Instruction count pipeline 1 "},
// {CROSSBAR_OUTPUT_4, EV_PMU_ICMISS0, "Core 0. Instruction cache miss"},
// {CROSSBAR_OUTPUT_5, EV_PMU_BPMISS0, "Core 0. Branch Predictor miss"},
// {CROSSBAR_OUTPUT_6, EV_PMU_DCMISS0, "Core 0. Data cache miss"},
// {CROSSBAR_OUTPUT_7, EV_CSSCONT_RD_C1VC0, "Contention of core 1 over core 0 on read access"},
// {CROSSBAR_OUTPUT_8, EV_CSSCONT_WR_C1VC0, "Contention of core 1 over core 0 on write access"},
// {CROSSBAR_OUTPUT_9, EV_CCSLATC0_ICMISS, "Core 0. CCS instruction cache miss latency"},
// {CROSSBAR_OUTPUT_10, EV_CCSLATC0_DCMISS, "Core 0. CCS data cache miss latency"},
// {CROSSBAR_OUTPUT_11, EV_CCSLATC0_WR, "Core 0. CSS write latency"},
// {CROSSBAR_OUTPUT_12, EV_PMU_DCMISS1, "Core 1, Data cache miss"},
// {CROSSBAR_OUTPUT_13, EV_CCSCONT_RD_C2VC0, "Contention of core 2 over core 0 on read access"},
// {CROSSBAR_OUTPUT_14, EV_CSSCONT_WR_C2VC0, "Contention of core 2 over core 0 on write access"},
// {CROSSBAR_OUTPUT_15, EV_CCSLATC1_ICMISS, "Core 1. CCS instruction cache miss latency"},
// {CROSSBAR_OUTPUT_16, EV_CCSLATC1_DCMISS, "Core 1. CCS data cache miss latency"},
// {CROSSBAR_OUTPUT_17, EV_CCSLATC1_WR, "Core 1. CSS write latency"},
// {CROSSBAR_OUTPUT_18, EV_PMU_DCMISS2, "Core 2. Data cache L1 miss"},
// {CROSSBAR_OUTPUT_19, EV_CSSCONT_RD_C3VC0, "Contention of core 3 over core 0 on read access"},
// {CROSSBAR_OUTPUT_20, EV_CSSCONT_WR_C3VC0, "Contention of core 3 over core 0 on write access"},
// {CROSSBAR_OUTPUT_21, EV_CCSLATC2_ICMISS, "Core 2. CCS instruction cache miss latency"},
// {CROSSBAR_OUTPUT_22, EV_CCSLATC2_DCMISS, "Core 2. CCS data cache miss latency"},
// {CROSSBAR_OUTPUT_23, EV_CCSLATC2_WR, "Core 1. CSS write latency"},
// {CROSSBAR_OUTPUT_24, EV_PMU_DCMISS3, "Core 3. Data cache L1 miss"}
// };
#endif
......
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