Commit 099b58d1 authored by Guillem's avatar Guillem
Browse files

Dualcore setup & area synth

include RTL and software changes to run multicore SIMULATIONS with pmu, no FPGA tested. Includes yosys scripts for area calculation
parent 4e60307f
../p/link.ld
\ No newline at end of file
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/*======================================================================*/
/* Proxy kernel linker script */
/*======================================================================*/
/* This is the linker script used when building the proxy kernel. */
/*----------------------------------------------------------------------*/
/* Setup */
/*----------------------------------------------------------------------*/
/* The OUTPUT_ARCH command specifies the machine architecture where the
argument is one of the names used in the BFD library. More
specifically one of the entires in bfd/cpu-mips.c */
OUTPUT_ARCH( "riscv" )
/*----------------------------------------------------------------------*/
/* Sections */
/*----------------------------------------------------------------------*/
SECTIONS
{
/* text: test code section */
. = 0x100;
.text :
{
crt.o(.text)
*(.text)
}
/* data segment */
.data : { *(.data) }
.sdata : {
_gp = . + 0x800;
*(.srodata.cst16) *(.srodata.cst8) *(.srodata.cst4) *(.srodata.cst2) *(.srodata*)
*(.sdata .sdata.* .gnu.linkonce.s.*)
}
/* bss segment */
.sbss : {
*(.sbss .sbss.* .gnu.linkonce.sb.*)
*(.scommon)
}
.bss : { *(.bss) }
/* thread-local data segment */
.tdata :
{
_tls_data = .;
crt.o(.tdata.begin)
*(.tdata)
crt.o(.tdata.end)
}
.tbss :
{
*(.tbss)
crt.o(.tbss.end)
}
/* End of uninitalized data segement */
_end = .;
}
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